da506ad9b5
* Updated links in documentation. (#328) Updated to reflect new GitHub organization. Fixed broken links to GitHub pages. Signed-off-by: David Galiffi <David.Galiffi@amd.com> * update branch for 2.x documentation builds Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * update checkout action and use concurrency instead of cancel-workflow-action Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * test addition of user option for container launch Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * remove --user option for container, try chown instead Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * fixing yaml syntax Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * reorder job step - start with checkout Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * restore missing run directive Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * Update workloads to include log.txt Add missing MI200 workloads Signed-off-by: Jose Santos <josantos@amd.com> * Signed-off-by: Jose Santos <josantos@amd.com> Add vcopy workload for tests * Change exit codes for caught failures Signed-off-by: Jose Santos <josantos@amd.com> * reformat Signed-off-by: Jose Santos <josantos@amd.com> * Add pytest-xdist for pytest -n Signed-off-by: Jose Santos <josantos@amd.com> --------- Signed-off-by: David Galiffi <David.Galiffi@amd.com> Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> Signed-off-by: Jose Santos <josantos@amd.com> Co-authored-by: David Galiffi <David.Galiffi@amd.com> Co-authored-by: Karl W. Schulz <karl.schulz@amd.com>
1.6 KiB
1.6 KiB
| 1 | Dispatch_ID | Kernel_Name | GPU_ID | Grid_Size | Workgroup_Size | LDS_Per_Workgroup | Scratch_Per_Workitem | Arch_VGPR | Accum_VGPR | SGPR | wave_size | obj | SQ_INSTS_VALU_ADD_F64 | SQ_INSTS_VALU_MUL_F64 | SQ_INSTS_VALU_FMA_F64 | SQ_INSTS_VALU_TRANS_F64 | SQ_INSTS_VALU_MFMA_MOPS_F16 | SQ_INSTS_VALU_MFMA_MOPS_BF16 | SQ_INSTS_VALU_MFMA_MOPS_F32 | SQ_INSTS_VALU_MFMA_MOPS_F64 | TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum | wave_size_1 | obj_1 | SQ_LDS_IDX_ACTIVE | SQ_LDS_BANK_CONFLICT | wave_size_2 | obj_2 | SQ_INSTS_VALU_ADD_F16 | SQ_INSTS_VALU_MUL_F16 | SQ_INSTS_VALU_FMA_F16 | SQ_INSTS_VALU_TRANS_F16 | SQ_INSTS_VALU_ADD_F32 | SQ_INSTS_VALU_MUL_F32 | SQ_INSTS_VALU_FMA_F32 | SQ_INSTS_VALU_TRANS_F32 | TCP_TCC_READ_REQ_sum | TCP_TOTAL_CACHE_ACCESSES_sum | TCP_TCC_WRITE_REQ_sum | TCP_TCC_ATOMIC_WITH_RET_REQ_sum | TCC_EA_RDREQ_32B_sum | TCC_EA_RDREQ_sum | TCC_EA_WRREQ_64B_sum | TCC_EA_WRREQ_sum | Start_Timestamp | End_Timestamp |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2 | 0 | vecCopy(double*, double*, double*, int, int) [clone .kd] | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f79a6568ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 64 | 0x7f964ade8ec0 | 0 | 0 | 64 | 0x7f8ceb5a8ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 131072.0 | 524288.0 | 131072.0 | 0.0 | 0.0 | 131080.0 | 131072.0 | 131072.0 | 1412081937504773 | 1412081937524933 |
| 3 | 1 | vecCopy(double*, double*, double*, int, int) [clone .kd] | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f79a6568ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 64 | 0x7f964ade8ec0 | 0 | 0 | 64 | 0x7f8ceb5a8ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 131072.0 | 524288.0 | 131072.0 | 0.0 | 0.0 | 131073.0 | 91142.0 | 91142.0 | 1412081937544293 | 1412081937559973 |
| 4 | 2 | vecCopy(double*, double*, double*, int, int) [clone .kd] | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f79a6568ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 64 | 0x7f964ade8ec0 | 0 | 0 | 64 | 0x7f8ceb5a8ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 131072.0 | 524288.0 | 131072.0 | 0.0 | 0.0 | 131081.0 | 91346.0 | 91346.0 | 1412081937618533 | 1412081937635173 |