rocm-systems/tests/workloads_old/vcopy/mi200/pmc_perf_14.csv

1	Dispatch_ID	Kernel_Name	GPU_ID	queue-id	queue-index	pid	tid	grd	Workgroup_Size	LDS_Per_Workgroup	scr	arch_vgpr	accum_vgpr	SGPR	wave_size	sig	obj	TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]	TCC_EA_WRREQ_GMI_CREDIT_STALL[0]	TCC_EA_WRREQ_IO_CREDIT_STALL[0]	TCC_EA_WRREQ_LEVEL[0]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[1]	TCC_EA_WRREQ_GMI_CREDIT_STALL[1]	TCC_EA_WRREQ_IO_CREDIT_STALL[1]	TCC_EA_WRREQ_LEVEL[1]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[2]	TCC_EA_WRREQ_GMI_CREDIT_STALL[2]	TCC_EA_WRREQ_IO_CREDIT_STALL[2]	TCC_EA_WRREQ_LEVEL[2]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[3]	TCC_EA_WRREQ_GMI_CREDIT_STALL[3]	TCC_EA_WRREQ_IO_CREDIT_STALL[3]	TCC_EA_WRREQ_LEVEL[3]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[4]	TCC_EA_WRREQ_GMI_CREDIT_STALL[4]	TCC_EA_WRREQ_IO_CREDIT_STALL[4]	TCC_EA_WRREQ_LEVEL[4]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[5]	TCC_EA_WRREQ_GMI_CREDIT_STALL[5]	TCC_EA_WRREQ_IO_CREDIT_STALL[5]	TCC_EA_WRREQ_LEVEL[5]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[6]	TCC_EA_WRREQ_GMI_CREDIT_STALL[6]	TCC_EA_WRREQ_IO_CREDIT_STALL[6]	TCC_EA_WRREQ_LEVEL[6]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[7]	TCC_EA_WRREQ_GMI_CREDIT_STALL[7]	TCC_EA_WRREQ_IO_CREDIT_STALL[7]	TCC_EA_WRREQ_LEVEL[7]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[8]	TCC_EA_WRREQ_GMI_CREDIT_STALL[8]	TCC_EA_WRREQ_IO_CREDIT_STALL[8]	TCC_EA_WRREQ_LEVEL[8]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[9]	TCC_EA_WRREQ_GMI_CREDIT_STALL[9]	TCC_EA_WRREQ_IO_CREDIT_STALL[9]	TCC_EA_WRREQ_LEVEL[9]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[10]	TCC_EA_WRREQ_GMI_CREDIT_STALL[10]	TCC_EA_WRREQ_IO_CREDIT_STALL[10]	TCC_EA_WRREQ_LEVEL[10]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[11]	TCC_EA_WRREQ_GMI_CREDIT_STALL[11]	TCC_EA_WRREQ_IO_CREDIT_STALL[11]	TCC_EA_WRREQ_LEVEL[11]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[12]	TCC_EA_WRREQ_GMI_CREDIT_STALL[12]	TCC_EA_WRREQ_IO_CREDIT_STALL[12]	TCC_EA_WRREQ_LEVEL[12]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[13]	TCC_EA_WRREQ_GMI_CREDIT_STALL[13]	TCC_EA_WRREQ_IO_CREDIT_STALL[13]	TCC_EA_WRREQ_LEVEL[13]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[14]	TCC_EA_WRREQ_GMI_CREDIT_STALL[14]	TCC_EA_WRREQ_IO_CREDIT_STALL[14]	TCC_EA_WRREQ_LEVEL[14]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[15]	TCC_EA_WRREQ_GMI_CREDIT_STALL[15]	TCC_EA_WRREQ_IO_CREDIT_STALL[15]	TCC_EA_WRREQ_LEVEL[15]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[16]	TCC_EA_WRREQ_GMI_CREDIT_STALL[16]	TCC_EA_WRREQ_IO_CREDIT_STALL[16]	TCC_EA_WRREQ_LEVEL[16]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[17]	TCC_EA_WRREQ_GMI_CREDIT_STALL[17]	TCC_EA_WRREQ_IO_CREDIT_STALL[17]	TCC_EA_WRREQ_LEVEL[17]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[18]	TCC_EA_WRREQ_GMI_CREDIT_STALL[18]	TCC_EA_WRREQ_IO_CREDIT_STALL[18]	TCC_EA_WRREQ_LEVEL[18]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[19]	TCC_EA_WRREQ_GMI_CREDIT_STALL[19]	TCC_EA_WRREQ_IO_CREDIT_STALL[19]	TCC_EA_WRREQ_LEVEL[19]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[20]	TCC_EA_WRREQ_GMI_CREDIT_STALL[20]	TCC_EA_WRREQ_IO_CREDIT_STALL[20]	TCC_EA_WRREQ_LEVEL[20]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[21]	TCC_EA_WRREQ_GMI_CREDIT_STALL[21]	TCC_EA_WRREQ_IO_CREDIT_STALL[21]	TCC_EA_WRREQ_LEVEL[21]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[22]	TCC_EA_WRREQ_GMI_CREDIT_STALL[22]	TCC_EA_WRREQ_IO_CREDIT_STALL[22]	TCC_EA_WRREQ_LEVEL[22]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[23]	TCC_EA_WRREQ_GMI_CREDIT_STALL[23]	TCC_EA_WRREQ_IO_CREDIT_STALL[23]	TCC_EA_WRREQ_LEVEL[23]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[24]	TCC_EA_WRREQ_GMI_CREDIT_STALL[24]	TCC_EA_WRREQ_IO_CREDIT_STALL[24]	TCC_EA_WRREQ_LEVEL[24]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[25]	TCC_EA_WRREQ_GMI_CREDIT_STALL[25]	TCC_EA_WRREQ_IO_CREDIT_STALL[25]	TCC_EA_WRREQ_LEVEL[25]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[26]	TCC_EA_WRREQ_GMI_CREDIT_STALL[26]	TCC_EA_WRREQ_IO_CREDIT_STALL[26]	TCC_EA_WRREQ_LEVEL[26]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[27]	TCC_EA_WRREQ_GMI_CREDIT_STALL[27]	TCC_EA_WRREQ_IO_CREDIT_STALL[27]	TCC_EA_WRREQ_LEVEL[27]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[28]	TCC_EA_WRREQ_GMI_CREDIT_STALL[28]	TCC_EA_WRREQ_IO_CREDIT_STALL[28]	TCC_EA_WRREQ_LEVEL[28]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[29]	TCC_EA_WRREQ_GMI_CREDIT_STALL[29]	TCC_EA_WRREQ_IO_CREDIT_STALL[29]	TCC_EA_WRREQ_LEVEL[29]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[30]	TCC_EA_WRREQ_GMI_CREDIT_STALL[30]	TCC_EA_WRREQ_IO_CREDIT_STALL[30]	TCC_EA_WRREQ_LEVEL[30]	TCC_EA_WRREQ_DRAM_CREDIT_STALL[31]	TCC_EA_WRREQ_GMI_CREDIT_STALL[31]	TCC_EA_WRREQ_IO_CREDIT_STALL[31]	TCC_EA_WRREQ_LEVEL[31]	DispatchNs	Start_Timestamp	End_Timestamp	CompleteNs
2	0	vecCopy(double*, double*, double*, int, int)	2	0	0	186022	186022	1046016	256	0	0	8	8	16	64	0x0	0x7fad31b34900	1543	0	0	1775710	3049	0	0	2012359	2234	0	0	1923221	1897	0	0	1776784	804	0	0	1695337	1099	0	0	1592425	573	0	0	1609050	1265	0	0	1749524	2139	0	0	1910507	2144	0	0	1958065	1555	0	0	1822994	1053	0	0	1638701	4160	0	0	1973109	722	0	0	1767281	1416	0	0	1839198	9128	0	0	2424807	3626	0	0	1954616	1866	0	0	1825681	1068	0	0	1723385	1200	0	0	1755096	949	0	0	1683680	1318	0	0	1776912	2306	0	0	1854211	1169	0	0	1889251	1752	0	0	1708621	635	0	0	1622777	5166	0	0	2191709	3408	0	0	1978738	1896	0	0	1845524	1786	0	0	1747018	1787	0	0	1822316	1660	0	0	1784217	170467815059135	170459569892517	170459569917477	170467822816651