spolifroni-amd
6cc30f12a4
* initial commit of changes to the installation and landing pages * deleted original install; fixed the toc; fixed typos * fixed some wording issues; fixed some formatting issues * adding back install.rst to try to fix the conflict --------- Co-authored-by: Aryan Salmanpour <aryan.salmanpour@amd.com>
27 baris
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27 baris
1.5 KiB
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.. meta::
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:description: What is rocDecode?
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:keywords: video decoding, rocDecode, AMD, ROCm
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********************************************************************
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What is rocDecode?
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********************************************************************
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AMD GPUs contain one or more media engines (VCNs) that provide fully accelerated, hardware-based
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video decoding. Hardware decoders consume lower power than CPU-based decoders. Dedicated
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hardware decoders offload decoding tasks from the CPU, boosting overall decoding throughput. With
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proper power management, decoding on hardware decoders can lower the overall system power
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consumption and improve decoding performance.
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Using the rocDecode API, you can decode compressed video streams while keeping the resulting YUV
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frames in video memory. With decoded frames in video memory, you can run video post-processing
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using ROCm HIP, thereby avoiding unnecessary data copies via the PCIe bus. You can post-process video
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frames using scaling or color conversion and augmentation kernels (on a GPU or host) in a format for
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GPU/CPU-accelerated inferencing and training.
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In addition, you can use the rocDecode API to create multiple instances of video decoder based on the
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number of available VCNs in a GPU device. By configuring the decoder for a device, all available
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VCNs can be used seamlessly for decoding a batch of video streams in parallel.
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For more information, refer to the
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:doc:`Video decoding pipeline <./conceptual/video-decoding-pipeline>`.
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