Sylvain Jeaugey
b6475625fb
Add support for alternating rings, allow for cross-nic rings without cross-rail communication. Add support for user buffer registration for network send/recv. Optimize aggregated operations to better utilize all channels. Add flattening for BCM PCI gen5 switches. Add support for inter-node NVLink communication Add support for port fusion in NET/IB. Add support for ReduceScatter and AllGather using Collnet. Update net API to v8. Fix hang during A2A connection.
18 lines
591 B
C
18 lines
591 B
C
/*************************************************************************
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* See LICENSE.txt for license information
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************************************************************************/
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#ifndef NCCL_ARGCHECK_H_
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#define NCCL_ARGCHECK_H_
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#include "core.h"
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#include "info.h"
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ncclResult_t PtrCheck(void* ptr, const char* opname, const char* ptrname);
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ncclResult_t ArgsCheck(struct ncclInfo* info);
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ncclResult_t CudaPtrCheck(const void* pointer, struct ncclComm* comm, const char* ptrname, const char* opname);
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#endif
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