David Yat Sin
126 lines
4.1 KiB
C++
126 lines
4.1 KiB
C++
/*
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* =============================================================================
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* ROC Runtime Conformance Release License
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* =============================================================================
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* The University of Illinois/NCSA
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* Open Source License (NCSA)
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*
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* Copyright (c) 2017, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Developed by:
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*
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* AMD Research and AMD ROC Software Development
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*
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* Advanced Micro Devices, Inc.
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*
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* www.amd.com
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal with the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimers.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimers in
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* the documentation and/or other materials provided with the distribution.
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* - Neither the names of <Name of Development Group, Name of Institution>,
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* nor the names of its contributors may be used to endorse or promote
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* products derived from this Software without specific prior written
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* permission.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS WITH THE SOFTWARE.
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*
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*/
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#ifndef ROCRTST_SUITES_FUNCTIONAL_IPC_H_
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#define ROCRTST_SUITES_FUNCTIONAL_IPC_H_
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#include <sys/types.h>
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#include <unistd.h>
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#include <atomic>
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#include "common/base_rocr.h"
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#include "hsa/hsa.h"
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#include "suites/test_common/test_base.h"
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struct Shared {
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std::atomic<int> token;
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std::atomic<int> count;
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std::atomic<size_t> size;
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std::atomic<int> child_status;
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std::atomic<int> parent_status;
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hsa_amd_ipc_memory_t handle;
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hsa_amd_ipc_signal_t signal_handle;
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};
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class IPCTest : public TestBase {
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public:
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IPCTest();
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// @Brief: Destructor for test case of TestExample
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virtual ~IPCTest();
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// @Brief: Setup the environment for measurement
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virtual void SetUp();
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// @Brief: Core measurement execution
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virtual void Run();
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// @Brief: Clean up and retrive the resource
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virtual void Close();
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// @Brief: Display results
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virtual void DisplayResults() const;
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// @Brief: Display information about what this test does
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virtual void DisplayTestInfo(void);
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// @Brief: Implements child process exclusive logic
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void ChildProcessImpl();
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// @Brief: Implements parent process exclusive logic
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void ParentProcessImpl();
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// @Brief: Implements the check to see if buffer has expected
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// value if so updates it with new values
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void CheckAndFillBuffer(void* gpu_src_ptr, uint32_t exp_cur_val, uint32_t new_val);
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private:
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// @Brief: Bind number of iterations to run per user specification
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uint32_t RealIterationNum(void);
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// @Brief: Collect and print verbose messages to enable debugging
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void PrintVerboseMesg(void);
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// @Brief: Values used to initialize framebuffer that is shared
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uint32_t first_val_ = 0x01;
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uint32_t second_val_ = 0x02;
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uint32_t third_val_ = 0x03;
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uint32_t fourth_val_ = 0x04;
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uint32_t fifth_val_ = 0x05;
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int child_;
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Shared* shared_;
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bool parentProcess_;
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size_t gpu_mem_granule;
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// Supports user triggered failure
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int32_t usr_fail_val_ = 0xFFFFFFFF;
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// Specifies timeout period for parent/child processes
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int32_t timeout_ = 0x20000;
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};
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#endif // ROCRTST_SUITES_FUNCTIONAL_IPC_H_
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