Ma, Bing
b20803e95d
1. Move all new gfx12 block enums to aql_profile_v2.h. hsa_ven_amd_aqlprofile.h will be left untouched. 2. Re-org counter info in gfx12_block_info.h to be purely alphabetic-ordered for easy comparison between different IP versions. Also use auto-gen block name from IP header files whenever possible to reduce manual editing. 3. Remove unused counter info from graphics blocks. 4. Added UTCL2 and VML2 support 5. Added all gfx12 blocks to ctrl test
82 wiersze
3.0 KiB
C++
82 wiersze
3.0 KiB
C++
// MIT License
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//
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// Copyright (c) 2017-2025 Advanced Micro Devices, Inc.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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#include "core/gfx9_factory.h"
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#include "def/gfx908_def.h"
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#include "pm4/gfx9_cmd_builder.h"
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#include "pm4/pmc_builder.h"
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#include "pm4/sqtt_builder.h"
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namespace aql_profile {
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const GpuBlockInfo* Mi100Factory::block_table_[AQLPROFILE_BLOCKS_NUMBER] = {};
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Mi100Factory::Mi100Factory(const AgentInfo* agent_info)
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: Gfx9Factory(block_table_, sizeof(block_table_), agent_info) {
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for (unsigned i = 0; i < AQLPROFILE_BLOCKS_NUMBER; ++i) {
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const GpuBlockInfo* base_table_ptr = Gfx9Factory::block_table_[i];
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if (base_table_ptr == NULL) continue;
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GpuBlockInfo* block_info = nullptr;
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if (i == HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_RPB)
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block_info = new GpuBlockInfo(RpbCounterBlockInfo);
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else
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block_info = new GpuBlockInfo(*base_table_ptr);
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block_table_[i] = block_info;
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// overwrite block info for any update from gfx9 to mi100
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switch (block_info->id) {
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case SqCounterBlockId:
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block_info->event_id_max = 303;
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break;
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case TcpCounterBlockId:
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block_info->event_id_max = 87;
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break;
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case TccCounterBlockId:
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block_info->instance_count = 32;
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block_info->event_id_max = 295;
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break;
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case TcaCounterBlockId:
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block_info->instance_count = 32;
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block_info->event_id_max = 58;
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break;
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case GceaCounterBlockId:
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block_info->instance_count = 32;
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block_info->event_id_max = 83;
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break;
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case SdmaCounterBlockId:
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block_info->instance_count = gfx9_cntx_prim::SDMA_COUNTER_BLOCK_NUM_INSTANCES;
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break;
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case UmcCounterBlockId:
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block_info->counter_count = 6;
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break;
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}
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}
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}
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Pm4Factory* Pm4Factory::Mi100Create(const AgentInfo* agent_info) {
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auto p = new Mi100Factory(agent_info);
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if (p == NULL) throw aql_profile_exc_msg("Mi100Factory allocation failed");
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return p;
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}
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} // namespace aql_profile
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