foreman
c80c8964ff
SWDEV-165161 - Update OpenCL runtime to control RGP capture based on new RGP protocol. - Added logic to control the dispatch capture frame. Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palgpuopen.cpp#11 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palgpuopen.hpp#8 edit
411 라인
15 KiB
C++
411 라인
15 KiB
C++
/*
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***********************************************************************************************************************
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*
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* Trade secret of Advanced Micro Devices, Inc.
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* Copyright (c) 2016 Advanced Micro Devices, Inc. (unpublished)
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*
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* All rights reserved. This notice is intended as a precaution against inadvertent publication and
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* does not imply publication or any waiver of confidentiality. The year included in the foregoing
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* notice is the year of creation of the work.
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*
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***********************************************************************************************************************
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*/
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#pragma once
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#include <queue>
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#include "device/pal/paldefs.hpp"
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#include "platform/commandqueue.hpp"
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#include "protocols/rgpServer.h"
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#include "device/blit.hpp"
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// PAL headers
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#include "palUtil.h"
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#include "palPlatform.h"
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#include "palCmdBuffer.h"
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#include "palCmdAllocator.h"
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#include "palQueue.h"
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#include "palFence.h"
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#include "palLinearAllocator.h"
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#include "palHashMap.h"
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#include "palQueue.h"
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#include "palUtil.h"
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// gpuopen headers
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#include "gpuopen.h"
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// PAL forward declarations
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namespace Pal
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{
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class ICmdBuffer;
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class IFence;
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class IQueueSemaphore;
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struct PalPublicSettings;
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}
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// GpuUtil forward declarations
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namespace GpuUtil
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{
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class GpaSession;
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};
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// GPUOpen forward declarations
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namespace DevDriver
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{
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class DevDriverServer;
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class IMsgChannel;
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struct MessageBuffer;
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namespace DriverControlProtocol
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{
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enum struct DeviceClockMode : uint32_t;
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class HandlerServer;
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}
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namespace SettingsProtocol
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{
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class HandlerServer;
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}
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}
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namespace pal
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{
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class Settings;
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class Device;
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class VirtualGPU;
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class HSAILKernel;
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// ================================================================================================
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// RgpSqttMarkerIdentifier - Identifiers for RGP SQ thread-tracing markers (Table 1)
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enum RgpSqttMarkerIdentifier : uint32_t
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{
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RgpSqttMarkerIdentifierEvent = 0x0,
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RgpSqttMarkerIdentifierCbStart = 0x1,
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RgpSqttMarkerIdentifierCbEnd = 0x2,
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RgpSqttMarkerIdentifierBarrierStart = 0x3,
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RgpSqttMarkerIdentifierBarrierEnd = 0x4,
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RgpSqttMarkerIdentifierUserEvent = 0x5,
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RgpSqttMarkerIdentifierGeneralApi = 0x6,
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RgpSqttMarkerIdentifierSync = 0x7,
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RgpSqttMarkerIdentifierPresent = 0x8,
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RgpSqttMarkerIdentifierLayoutTransition = 0x9,
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RgpSqttMarkerIdentifierRenderPass = 0xA,
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RgpSqttMarkerIdentifierReserved2 = 0xB,
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RgpSqttMarkerIdentifierReserved3 = 0xC,
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RgpSqttMarkerIdentifierReserved4 = 0xD,
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RgpSqttMarkerIdentifierReserved5 = 0xE,
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RgpSqttMarkerIdentifierReserved6 = 0xF
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};
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// ================================================================================================
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enum class RgpSqttMarkerEventType : uint32_t
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{
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CmdNDRangeKernel = 0,
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CmdScheduler = 1,
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CmdCopyBuffer = 2,
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CmdCopyImageToBuffer = 3,
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CmdCopyBufferToImage = 4,
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CmdFillBuffer = 5,
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CmdCopyImage = 6,
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CmdFillImage = 7,
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CmdPipelineBarrier = 8,
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InternalUnknown = 26,
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Invalid = 0xffffffff
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};
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// ================================================================================================
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enum class RgpSqqtBarrierReason : uint32_t
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{
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Invalid = 0,
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MemDependency = 0xC0000000,
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ProfilingControl = 0xC0000001,
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SignalSubmit = 0xC0000002,
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PostDeviceEnqueue = 0xC0000003,
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Unknown = 0xffffffff
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};
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// ================================================================================================
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// RgpSqttMarkerEvent - "Event (Per-draw/dispatch)" RGP SQ thread-tracing marker.
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// These are generated ahead of draws or dispatches for commands that trigger generation of waves
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// i.e. draws/dispatches (Table 4).
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struct RgpSqttMarkerEvent
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{
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union
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{
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struct
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{
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uint32_t identifier : 4; // Identifier for this marker
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uint32_t extDwords : 3; // Number of extra dwords following this marker
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uint32_t apiType : 24; // The API type for this command
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uint32_t hasThreadDims : 1; // Whether thread dimensions are included
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};
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uint32_t dword01; // The first dword
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};
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union
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{
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// Some information about the vertex/instance/draw register indices. These values are not
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// always valid because they are not available for one reason or another:
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//
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// - If vertex offset index or instance offset index are not (together) valid, they are both
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// equal to 0
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// - If draw index is not valid, it is equal to the vertex offset index
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struct
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{
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uint32_t cbID : 20; // Command buffer ID for this marker
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uint32_t vertexOffsetRegIdx : 4; // SPI userdata register index for the first vertex offset
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uint32_t instanceOffsetRegIdx : 4; // SPI userdata register index for the first instance offset
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uint32_t drawIndexRegIdx : 4; // SPI userdata register index for the draw index (multi draw indirect)
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};
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uint32_t dword02; // The second dword
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};
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union
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{
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uint32_t cmdID; // Command index within the command buffer
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uint32_t dword03; // The third dword
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};
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};
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// ================================================================================================
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// RgpSqttMarkerEventWithDims - Per-dispatch specific marker where workgroup dims are included
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struct RgpSqttMarkerEventWithDims
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{
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RgpSqttMarkerEvent event; // Per-draw/dispatch marker. API type should be Dispatch, threadDim = 1
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uint32_t threadX; // Work group count in X
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uint32_t threadY; // Work group count in Y
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uint32_t threadZ; // Work group count in Z
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};
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// ================================================================================================
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// RgpSqttMarkerBarrierStart - "Barrier Start" RGP SQTT instrumentation marker (Table 5)
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struct RgpSqttMarkerBarrierStart
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{
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union
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{
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struct
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{
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uint32_t identifier : 4; // Identifier for this marker
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uint32_t extDwords : 3; // Number of extra dwords following this marker
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uint32_t cbId : 20; // Command buffer ID within queue
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uint32_t reserved : 5; // Reserved
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};
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uint32_t dword01; // The first dword
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};
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union
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{
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struct
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{
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uint32_t driverReason : 31;
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uint32_t internal: 1;
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};
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uint32_t dword02; // The second dword
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};
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};
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// ================================================================================================
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// RgpSqttMarkerBarrierEnd - "Barrier End" RGP SQTT instrumentation marker (Table 6)
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struct RgpSqttMarkerBarrierEnd
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{
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union
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{
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struct
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{
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uint32_t identifier : 4; // Identifier for this marker
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uint32_t extDwords : 3; // Number of extra dwords following this marker
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uint32_t cbId : 20; // Command buffer ID within queue
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uint32_t waitOnEopTs : 1; // Issued EOP_TS VGT event followed by a WAIT_REG_MEM for that timestamp
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// to be written. Quintessential full pipeline stall.
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uint32_t vsPartialFlush : 1; // Stall at ME waiting for all prior VS waves to complete.
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uint32_t psPartialFlush : 1; // Stall at ME waiting for all prior PS waves to complete.
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uint32_t csPartialFlush : 1; // Stall at ME waiting for all prior CS waves to complete.
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uint32_t pfpSyncMe : 1; // Stall PFP until ME is at same point in command stream.
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};
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uint32_t dword01; // The first dword
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};
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union
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{
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struct
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{
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uint32_t syncCpDma : 1; // Issue dummy CP-DMA command to confirm all prior CP-DMAs have completed.
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uint32_t invalTcp : 1; // Invalidate the L1 vector caches.
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uint32_t invalSqI : 1; // Invalidate the SQ instruction caches
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uint32_t invalSqK : 1; // Invalidate the SQ constant caches (i.e. L1 scalar caches)
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uint32_t flushTcc : 1; // Flush L2
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uint32_t invalTcc : 1; // Invalidate L2
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uint32_t flushCb : 1; // Flush CB caches (including DCC, cmask, fmask)
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uint32_t invalCb : 1; // Invalidate CB caches (including DCC, cmask, fmask)
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uint32_t flushDb : 1; // Flush DB caches (including htile)
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uint32_t invalDb : 1; // Invalidate DB caches (including htile)
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uint32_t numLayoutTransitions : 16; // Number of layout transitions following this packet
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uint32_t reserved : 6; // Reserved for future expansion. Always 0
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};
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uint32_t dword02; // The second dword
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};
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};
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// RGP SQTT Instrumentation Specification version (API-independent)
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constexpr uint32_t RgpSqttInstrumentationSpecVersion = 1;
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// RGP SQTT Instrumentation Specification version for Vulkan-specific tables
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constexpr uint32_t RgpSqttInstrumentationApiVersion = 0;
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// RgpSqttMarkeUserEventDataType - Data types used in RGP SQ thread-tracing markers for an user event
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enum RgpSqttMarkerUserEventType : uint32_t
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{
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RgpSqttMarkerUserEventTrigger = 0x0,
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RgpSqttMarkerUserEventPop = 0x1,
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RgpSqttMarkerUserEventPush = 0x2,
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RgpSqttMarkerUserEventObjectName = 0x3,
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RgpSqttMarkerUserEventReserved1 = 0x4,
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RgpSqttMarkerUserEventReserved2 = 0x5,
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RgpSqttMarkerUserEventReserved3 = 0x6,
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RgpSqttMarkerUserEventReserved4 = 0x7,
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};
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// RgpSqttMarkerUserEvent - RGP SQ thread-tracing marker for an user event.
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union RgpSqttMarkerUserEvent
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{
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struct
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{
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uint32_t identifier : 4; // Identifier for this marker
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uint32_t extDwords : 8; // Number of extra dwords following this marker
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uint32_t dataType : 8; // The type for this marker
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uint32_t reserved : 12; // reserved
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};
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uint32_t dword01; // The first dword
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};
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constexpr uint32_t RgpSqttMarkerUserEventWordCount = 1;
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// The max lengths of frame marker strings
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static constexpr size_t RgpSqttMaxUserEventStringLengthInDwords = 1024;
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// RgpSqttMarkerUserEvent - RGP SQ thread-tracing marker for an user event with a string (push and trigger data types)
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struct RgpSqttMarkerUserEventWithString
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{
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RgpSqttMarkerUserEvent header;
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uint32_t stringLength; // Length of the string (in characters)
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uint32_t stringData[RgpSqttMaxUserEventStringLengthInDwords]; // String data in UTF-8 format
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};
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// ================================================================================================
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// This class provides functionality to interact with the GPU Open Developer Mode message passing
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// service and the rest of the driver.
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class RgpCaptureMgr
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{
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public:
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~RgpCaptureMgr();
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static RgpCaptureMgr* Create(Pal::IPlatform* platform, const Device& device);
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void Finalize();
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void PreDispatch(VirtualGPU* gpu, const HSAILKernel& kernel, size_t x, size_t y, size_t z);
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void PostDispatch(VirtualGPU* gpu);
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void WaitForDriverResume();
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void PostDeviceCreate();
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void PreDeviceDestroy();
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void FinishRGPTrace(VirtualGPU* gpu, bool aborted);
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bool IsQueueTimingActive() const;
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void WriteBarrierStartMarker(
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const VirtualGPU* gpu, const Pal::Developer::BarrierData& data) const;
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void WriteBarrierEndMarker(
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const VirtualGPU* gpu, const Pal::Developer::BarrierData& data) const;
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bool RegisterTimedQueue(uint32_t queue_id, Pal::IQueue* iQueue, bool* debug_vmid) const;
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Pal::Result TimedQueueSubmit(
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Pal::IQueue* queue, uint64_t cmdId, const Pal::SubmitInfo& submitInfo) const;
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private:
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// Steps that an RGP trace goes through
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enum class TraceStatus
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{
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Idle = 0, // No active trace and none requested
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Preparing, // A trace has been requested but is not active yet because we are
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// currently sampling timing information over some number of lead frames.
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Running, // SQTT and queue timing is currently active for all command buffer submits.
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WaitingForSqtt,
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WaitingForResults // Tracing is no longer active, but all results are not yet ready.
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};
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// All per-device state to support RGP tracing
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struct TraceState
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{
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TraceStatus status_; // Current trace status (idle, running, etc.)
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GpuEvent begin_sqtt_event_; // Event that is signaled when a trace-end cmdbuf retires
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GpuEvent end_sqtt_event_; // Event that is signaled when a trace-end cmdbuf retires
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GpuEvent end_event_; // Event that is signaled when a trace-end cmdbuf retires
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VirtualGPU* prepare_queue_; // The queue that triggered the full start of a trace
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VirtualGPU* begin_queue_; // The queue that triggered starting SQTT
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GpuUtil::GpaSession* gpa_session_; // GPA session helper object for building RGP data
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uint32_t gpa_sample_id_; // Sample ID associated with the current trace
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bool queue_timing_; // Queue timing is enabled
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uint32_t prepared_disp_count_; // Number of dispatches counted while preparing for a trace
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uint32_t sqtt_disp_count_; // Number of dispatches counted while SQTT tracing is active
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mutable uint32_t current_event_id_; // Current event ID
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};
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RgpCaptureMgr(Pal::IPlatform* platform, const Device& device);
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bool Init(Pal::IPlatform* platform);
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Pal::Result PrepareRGPTrace(VirtualGPU* pQueue);
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Pal::Result BeginRGPTrace(VirtualGPU* pQueue);
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Pal::Result EndRGPHardwareTrace(VirtualGPU* pQueue);
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Pal::Result EndRGPTrace(VirtualGPU* pQueue);
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void DestroyRGPTracing();
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Pal::Result CheckForTraceResults();
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static bool GpuSupportsTracing(const Pal::DeviceProperties& props, const Settings& settings);
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RgpSqttMarkerEvent BuildEventMarker(const VirtualGPU* gpu, RgpSqttMarkerEventType api_type) const;
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void WriteMarker(const VirtualGPU* gpu, const void* data, size_t data_size) const;
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void WriteEventWithDimsMarker(const VirtualGPU* gpu, RgpSqttMarkerEventType apiType,
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uint32_t x, uint32_t y, uint32_t z) const;
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void WriteUserEventMarker(const VirtualGPU* gpu, RgpSqttMarkerUserEventType eventType,
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const std::string& name) const;
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const Device& device_;
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DevDriver::DevDriverServer* dev_driver_server_;
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DevDriver::RGPProtocol::RGPServer* rgp_server_;
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mutable amd::Monitor trace_mutex_;
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TraceState trace_;
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RgpSqttMarkerUserEventWithString* user_event_;
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uint32_t num_prep_disp_;
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uint32_t max_sqtt_disp_; // Maximum number of the dispatches allowed in the trace
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uint32_t trace_gpu_mem_limit_;
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uint32_t global_disp_count_;
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bool trace_enabled_; // True if tracing is currently enabled (master flag)
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bool inst_tracing_enabled_; // Enable instruction-level SQTT tokens
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PAL_DISALLOW_DEFAULT_CTOR(RgpCaptureMgr);
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PAL_DISALLOW_COPY_AND_ASSIGN(RgpCaptureMgr);
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};
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// ================================================================================================
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// Returns true if queue operations are currently being timed by RGP traces.
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inline bool RgpCaptureMgr::IsQueueTimingActive() const
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{
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return (trace_.queue_timing_ &&
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(trace_.status_ == TraceStatus::Running ||
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trace_.status_ == TraceStatus::Preparing ||
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trace_.status_ == TraceStatus::WaitingForSqtt));
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}
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};
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