hkasivis
5e7210980e
* libhsakmt: Update hsakmt_fmm_get_handle to support address range Currently, hsakmt_fmm_get_handle works only if the address is allocated (staring) value. Update it so it can find the handle if address falls in the valid allocated range. This is useful for AMD infinity storage feature where data needs to be transferred to any memory within in the allocated range Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> * libhsakmt: Introduce AMD Infinity Storage (AIS) API Add hsaKmtAisReadWriteFile() API to support AMD Infinity Storage. The API moves data directly from GPU VRAM to a file. v2: Add in/out ioctl arguments to provide more status information to user space. Modify hsaKmt API also accordingly. Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> * rocr: Initial implementation of AMD Infinity Storage (AIS) Implement first two API: hsa_amd_ais_file_write and hsa_amd_ais_file_read v2: Change API from hsa_amd_ to hsa_amd_ais_ Change API to take in handle instead of fd for compatibility accross different platforms Original Author: Chris Freehill <Chris.Freehill@amd.com> Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> --------- Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
107 righe
4.5 KiB
C
107 righe
4.5 KiB
C
/*
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* Copyright © 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including
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* the next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef FMM_H_
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#define FMM_H_
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#include "hsakmt/hsakmttypes.h"
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#include <stddef.h>
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typedef enum {
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FMM_FIRST_APERTURE_TYPE = 0,
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FMM_GPUVM = FMM_FIRST_APERTURE_TYPE,
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FMM_LDS,
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FMM_SCRATCH,
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FMM_SVM,
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FMM_MMIO,
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FMM_LAST_APERTURE_TYPE
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} aperture_type_e;
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typedef struct {
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aperture_type_e app_type;
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uint64_t size;
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void *start_address;
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} aperture_properties_t;
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HSAKMT_STATUS hsakmt_fmm_get_amdgpu_device_handle(uint32_t node_id, HsaAMDGPUDeviceHandle *DeviceHandle);
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HSAKMT_STATUS hsakmt_fmm_init_process_apertures(unsigned int NumNodes);
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void hsakmt_fmm_destroy_process_apertures(void);
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/* Memory interface */
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void *hsakmt_fmm_allocate_scratch(uint32_t gpu_id, void *address, uint64_t MemorySizeInBytes);
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void *hsakmt_fmm_allocate_device(uint32_t gpu_id, uint32_t node_id, void *address,
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uint64_t MemorySizeInBytes, uint64_t alignment, HsaMemFlags flags);
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void *hsakmt_fmm_allocate_doorbell(uint32_t gpu_id, uint64_t MemorySizeInBytes, uint64_t doorbell_offset);
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void *hsakmt_fmm_allocate_host(uint32_t gpu_id, uint32_t node_id, void *address, uint64_t MemorySizeInBytes,
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uint64_t alignment, HsaMemFlags flags);
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void hsakmt_fmm_print(uint32_t node);
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HSAKMT_STATUS hsakmt_fmm_release(void *address);
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HSAKMT_STATUS hsakmt_fmm_map_to_gpu(void *address, uint64_t size, uint64_t *gpuvm_address);
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int hsakmt_fmm_unmap_from_gpu(void *address);
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bool hsakmt_fmm_get_handle(void *address, uint64_t *handle, uint64_t *size_offset);
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HSAKMT_STATUS hsakmt_fmm_get_mem_info(const void *address, HsaPointerInfo *info);
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HSAKMT_STATUS hsakmt_fmm_set_mem_user_data(const void *mem, void *usr_data);
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#ifdef SANITIZER_AMDGPU
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HSAKMT_STATUS hsakmt_fmm_replace_asan_header_page(void* address);
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HSAKMT_STATUS hsakmt_fmm_return_asan_header_page(void* address);
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#endif
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/* Topology interface*/
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HSAKMT_STATUS hsakmt_fmm_get_aperture_base_and_limit(aperture_type_e aperture_type, HSAuint32 gpu_id,
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HSAuint64 *aperture_base, HSAuint64 *aperture_limit);
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HSAKMT_STATUS hsakmt_fmm_register_memory(void *address, uint64_t size_in_bytes,
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uint32_t *gpu_id_array,
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uint32_t gpu_id_array_size,
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bool coarse_grain,
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bool ext_coherent);
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HSAKMT_STATUS hsakmt_fmm_register_graphics_handle(HSAuint64 GraphicsResourceHandle,
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HsaGraphicsResourceInfo *GraphicsResourceInfo,
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uint32_t *gpu_id_array,
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uint32_t gpu_id_array_size,
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HSA_REGISTER_MEM_FLAGS RegisterFlags);
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HSAKMT_STATUS hsakmt_fmm_deregister_memory(void *address);
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HSAKMT_STATUS hsakmt_fmm_export_dma_buf_fd(void *MemoryAddress,
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HSAuint64 MemorySizeInBytes,
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int *DMABufFd,
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HSAuint64 *Offset);
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HSAKMT_STATUS hsakmt_fmm_share_memory(void *MemoryAddress,
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HSAuint64 SizeInBytes,
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HsaSharedMemoryHandle *SharedMemoryHandle);
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HSAKMT_STATUS hsakmt_fmm_register_shared_memory(const HsaSharedMemoryHandle *SharedMemoryHandle,
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HSAuint64 *SizeInBytes,
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void **MemoryAddress,
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uint32_t *gpu_id_array,
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uint32_t gpu_id_array_size);
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HSAKMT_STATUS hsakmt_fmm_map_to_gpu_nodes(void *address, uint64_t size,
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uint32_t *nodes_to_map, uint64_t num_of_nodes, uint64_t *gpuvm_address);
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int hsakmt_open_drm_render_device(int minor);
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void *hsakmt_mmap_allocate_aligned(int prot, int flags, uint64_t size, uint64_t align,
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uint64_t guard_size, void *aper_base, void *aper_limit, int fd);
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extern int (*hsakmt_fn_amdgpu_device_get_fd)(HsaAMDGPUDeviceHandle device_handle);
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#endif /* FMM_H_ */
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