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rocm-systems/tests/workloads/vcopy/MI350/SQ_LEVEL_WAVES.csv
T
vedithal-amd f9aa7be97c Support MI 350 profiling (#632) 
* Add MI 350 hardware information

* Refactor MI GPU YAML file and corresponding interface

* Add SoC file for gfx950 architecture

* Add analysis report configs for MI 350 containing existing metrics

* Add placeholder None valued metrics for previous architectures to make
  baseline comparison work

* Enable testing on MI 350

* Analysis config metric changes
    - SPI changes
        - Update metric formula for default SPI pipe counter
             - Use efficiently collected pipe wise SPI counters
        - Add SPI Wave Occupancy
        - Add Scheduler-Pipe Wave Utilization
        - Update formula for VGPR Writes
        - Add Scheduler-Pipe FIFO Full Rate
   - CPC changes
	- Add CPC SYNC FIFO Full Rate
	- Add CPC CANE Stall Rate
        - Add CPC ADC Utilization
   - SQ changes
        - Add VALU co-issue efficiency
        - Add F6F4 datatype metrics
        - Update formula for total FLOPs by adding F6F4 counters
        - Add LDS STORE / LOAD / ATOMIC metrics
        - Add LDS STORE / LOAD / ATOMIC bandwidth
        - Add LDS FIFO and TA ADDR / CMD / DATA FIFO full rates

* Collect TCP_TCP_LATENCY_sum only for gfx950 (MI 350)

* Do not inject SQ_ACCUM_PREV_HIRES unnecesarily

* Do not hardcode memory and shader clock speeds

* Write num_hbm_channels to sysinfo.csv instead of hbm_bw while profiling

* Move generate sysinfo.csv to pre processing step of profiling

* Add warnings to use --specs-correction for missing sysinfo.csv values during analysis phase

* Update CHANGELOG

* Analysis phase warning to use --specs-correction when needed
2025-04-03 02:21:18 -04:00

7.7 KiB
Czysty Wina Historia

1Dispatch_IDGPU_IDQueue_IDPIDTIDGrid_SizeWorkgroup_SizeLDS_Per_WorkgroupScratch_Per_WorkitemArch_VGPRAccum_VGPRSGPRWave_SizeKernel_NameStart_TimestampEnd_TimestampCorrelation_IDKernel_IDCPC_CPC_TCIU_IDLECPC_TG_SENDCPF_CPF_TCIU_IDLESPI_CS0_BUSYSPI_CS1_BUSYSPI_CS2_BUSYSPI_CS3_BUSYSQ_INSTS_LDSSQ_INSTS_LDS_LOAD_BANDWIDTHSQ_INSTS_VALU_ADD_F16SQ_INSTS_VALU_FMA_F16SQ_LDS_IDX_ACTIVESQ_LEVEL_WAVESSQ_WAVE_CYCLESTA_BUFFER_ATOMIC_WAVEFRONTS_sumTA_FLAT_ATOMIC_WAVEFRONTS_sumTCC_BUBBLE_sumTCC_EA0_ATOMIC_LEVEL[0]TCC_EA0_ATOMIC_LEVEL[11]TCC_EA0_ATOMIC_LEVEL[12]TCC_EA0_ATOMIC_LEVEL[13]TCC_EA0_ATOMIC_LEVEL[14]TCC_EA0_ATOMIC_LEVEL[16]TCC_EA0_ATOMIC_LEVEL[17]TCC_EA0_ATOMIC_LEVEL[18]TCC_EA0_ATOMIC_LEVEL[19]TCC_EA0_ATOMIC_LEVEL[1]TCC_EA0_ATOMIC_LEVEL[22]TCC_EA0_ATOMIC_LEVEL[23]TCC_EA0_ATOMIC_LEVEL[24]TCC_EA0_ATOMIC_LEVEL[25]TCC_EA0_ATOMIC_LEVEL[27]TCC_EA0_ATOMIC_LEVEL[28]TCC_EA0_ATOMIC_LEVEL[29]TCC_EA0_ATOMIC_LEVEL[2]TCC_EA0_ATOMIC_LEVEL[30]TCC_EA0_ATOMIC_LEVEL[32]TCC_EA0_ATOMIC_LEVEL[33]TCC_EA0_ATOMIC_LEVEL[34]TCC_EA0_ATOMIC_LEVEL[35]TCC_EA0_ATOMIC_LEVEL[37]TCC_EA0_ATOMIC_LEVEL[38]TCC_EA0_ATOMIC_LEVEL[39]TCC_EA0_ATOMIC_LEVEL[3]TCC_EA0_ATOMIC_LEVEL[40]TCC_EA0_ATOMIC_LEVEL[43]TCC_EA0_ATOMIC_LEVEL[44]TCC_EA0_ATOMIC_LEVEL[45]TCC_EA0_ATOMIC_LEVEL[46]TCC_EA0_ATOMIC_LEVEL[48]TCC_EA0_ATOMIC_LEVEL[49]TCC_EA0_ATOMIC_LEVEL[4]TCC_EA0_ATOMIC_LEVEL[50]TCC_EA0_ATOMIC_LEVEL[51]TCC_EA0_ATOMIC_LEVEL[53]TCC_EA0_ATOMIC_LEVEL[54]TCC_EA0_ATOMIC_LEVEL[55]TCC_EA0_ATOMIC_LEVEL[56]TCC_EA0_ATOMIC_LEVEL[58]TCC_EA0_ATOMIC_LEVEL[59]TCC_EA0_ATOMIC_LEVEL[60]TCC_EA0_ATOMIC_LEVEL[61]TCC_EA0_ATOMIC_LEVEL[6]TCC_EA0_ATOMIC_LEVEL[7]TCC_EA0_ATOMIC_LEVEL[8]TCC_EA0_ATOMIC_LEVEL[9]TCC_EA0_RDREQ_LEVEL[0]TCC_EA0_RDREQ_LEVEL[11]TCC_EA0_RDREQ_LEVEL[12]TCC_EA0_RDREQ_LEVEL[13]TCC_EA0_RDREQ_LEVEL[14]TCC_EA0_RDREQ_LEVEL[16]TCC_EA0_RDREQ_LEVEL[17]TCC_EA0_RDREQ_LEVEL[18]TCC_EA0_RDREQ_LEVEL[19]TCC_EA0_RDREQ_LEVEL[1]TCC_EA0_RDREQ_LEVEL[22]TCC_EA0_RDREQ_LEVEL[23]TCC_EA0_RDREQ_LEVEL[24]TCC_EA0_RDREQ_LEVEL[25]TCC_EA0_RDREQ_LEVEL[27]TCC_EA0_RDREQ_LEVEL[28]TCC_EA0_RDREQ_LEVEL[29]TCC_EA0_RDREQ_LEVEL[2]TCC_EA0_RDREQ_LEVEL[30]TCC_EA0_RDREQ_LEVEL[32]TCC_EA0_RDREQ_LEVEL[33]TCC_EA0_RDREQ_LEVEL[34]TCC_EA0_RDREQ_LEVEL[35]TCC_EA0_RDREQ_LEVEL[37]TCC_EA0_RDREQ_LEVEL[38]TCC_EA0_RDREQ_LEVEL[39]TCC_EA0_RDREQ_LEVEL[3]TCC_EA0_RDREQ_LEVEL[40]TCC_EA0_RDREQ_LEVEL[43]TCC_EA0_RDREQ_LEVEL[44]TCC_EA0_RDREQ_LEVEL[45]TCC_EA0_RDREQ_LEVEL[46]TCC_EA0_RDREQ_LEVEL[48]TCC_EA0_RDREQ_LEVEL[49]TCC_EA0_RDREQ_LEVEL[4]TCC_EA0_RDREQ_LEVEL[50]TCC_EA0_RDREQ_LEVEL[51]TCC_EA0_RDREQ_LEVEL[53]TCC_EA0_RDREQ_LEVEL[54]TCC_EA0_RDREQ_LEVEL[55]TCC_EA0_RDREQ_LEVEL[56]TCC_EA0_RDREQ_LEVEL[58]TCC_EA0_RDREQ_LEVEL[59]TCC_EA0_RDREQ_LEVEL[60]TCC_EA0_RDREQ_LEVEL[61]TCC_EA0_RDREQ_LEVEL[6]TCC_EA0_RDREQ_LEVEL[7]TCC_EA0_RDREQ_LEVEL[8]TCC_EA0_RDREQ_LEVEL[9]TCC_TOO_MANY_EA_WRREQS_STALL[0]TCC_TOO_MANY_EA_WRREQS_STALL[11]TCC_TOO_MANY_EA_WRREQS_STALL[12]TCC_TOO_MANY_EA_WRREQS_STALL[13]TCC_TOO_MANY_EA_WRREQS_STALL[14]TCC_TOO_MANY_EA_WRREQS_STALL[16]TCC_TOO_MANY_EA_WRREQS_STALL[17]TCC_TOO_MANY_EA_WRREQS_STALL[18]TCC_TOO_MANY_EA_WRREQS_STALL[19]TCC_TOO_MANY_EA_WRREQS_STALL[1]TCC_TOO_MANY_EA_WRREQS_STALL[22]TCC_TOO_MANY_EA_WRREQS_STALL[23]TCC_TOO_MANY_EA_WRREQS_STALL[24]TCC_TOO_MANY_EA_WRREQS_STALL[25]TCC_TOO_MANY_EA_WRREQS_STALL[27]TCC_TOO_MANY_EA_WRREQS_STALL[28]TCC_TOO_MANY_EA_WRREQS_STALL[29]TCC_TOO_MANY_EA_WRREQS_STALL[2]TCC_TOO_MANY_EA_WRREQS_STALL[30]TCC_TOO_MANY_EA_WRREQS_STALL[32]TCC_TOO_MANY_EA_WRREQS_STALL[33]TCC_TOO_MANY_EA_WRREQS_STALL[34]TCC_TOO_MANY_EA_WRREQS_STALL[35]TCC_TOO_MANY_EA_WRREQS_STALL[37]TCC_TOO_MANY_EA_WRREQS_STALL[38]TCC_TOO_MANY_EA_WRREQS_STALL[39]TCC_TOO_MANY_EA_WRREQS_STALL[3]TCC_TOO_MANY_EA_WRREQS_STALL[40]TCC_TOO_MANY_EA_WRREQS_STALL[43]TCC_TOO_MANY_EA_WRREQS_STALL[44]TCC_TOO_MANY_EA_WRREQS_STALL[45]TCC_TOO_MANY_EA_WRREQS_STALL[46]TCC_TOO_MANY_EA_WRREQS_STALL[48]TCC_TOO_MANY_EA_WRREQS_STALL[49]TCC_TOO_MANY_EA_WRREQS_STALL[4]TCC_TOO_MANY_EA_WRREQS_STALL[50]TCC_TOO_MANY_EA_WRREQS_STALL[51]TCC_TOO_MANY_EA_WRREQS_STALL[53]TCC_TOO_MANY_EA_WRREQS_STALL[54]TCC_TOO_MANY_EA_WRREQS_STALL[55]TCC_TOO_MANY_EA_WRREQS_STALL[56]TCC_TOO_MANY_EA_WRREQS_STALL[58]TCC_TOO_MANY_EA_WRREQS_STALL[59]TCC_TOO_MANY_EA_WRREQS_STALL[60]TCC_TOO_MANY_EA_WRREQS_STALL[61]TCC_TOO_MANY_EA_WRREQS_STALL[6]TCC_TOO_MANY_EA_WRREQS_STALL[7]TCC_TOO_MANY_EA_WRREQS_STALL[8]TCC_TOO_MANY_EA_WRREQS_STALL[9]TCP_GATE_EN2_sumTCP_TCC_RW_WRITE_REQ_sumTCP_TCC_UC_ATOMIC_REQ_sumTCP_TOTAL_CACHE_ACCESSES_sumTD_TD_BUSY_sum
20011576515765104857625600401664vecCopy(double*, double*, double*, int, int)1248226695430472124822669545211211376230.04096.074700.0146248.00.00.00.00.00.00.00.00.00.06406528.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.0366347.0357772.0356963.0349090.0376766.0737844.0674665.0709219.0678639.0690427.0343990.0324671.0343293.0346854.0381616.0358883.0363344.0703259.0361957.0743500.0699149.0680115.0684746.0338927.0323941.0341659.0662566.0341692.0342216.0362540.0345698.0325196.0670504.0706680.0336552.0689433.0668474.0338628.0351132.0343139.0331632.0367394.0363667.0344667.0324349.0343830.0339430.0345257.0339020.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.0823402.0131072.00.0524288.0816209.0
31011576515765104857625600401664vecCopy(double*, double*, double*, int, int)1248226696169603124822669618660321366030.04096.064509.0108920.00.00.00.00.00.00.00.00.00.04413902.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.0168628.0188771.0180374.0166979.0187051.0341252.0347378.0366453.0358634.0349942.0166901.0185540.0167789.0186890.0195821.0191987.0161167.0349386.0173327.0351353.0362889.0349396.0340194.0166112.0162174.0179731.0326950.0183560.0167731.0191528.0159788.0174031.0333041.0347181.0191522.0361391.0371374.0166146.0185780.0171148.0183365.0196992.0178416.0168290.0169604.0172663.0165574.0182558.0177592.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.0647210.0131072.00.0524288.0639099.0
42011576515765104857625600401664vecCopy(double*, double*, double*, int, int)1248226696801619124822669681833931361716.04096.060350.0107896.00.00.00.00.00.00.00.00.00.04337140.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.0192457.0179283.0183607.0168303.0188445.0363907.0353513.0336506.0358454.0357389.0166113.0175264.0165655.0198953.0179626.0182508.0166395.0349820.0187371.0369566.0387313.0340202.0353747.0167292.0163935.0187961.0331568.0189609.0166929.0186667.0164998.0190238.0336870.0380054.0177919.0357408.0351545.0166698.0185523.0186549.0188624.0178890.0183734.0165658.0163188.0167422.0177959.0191058.0197686.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.00.0648321.0131072.00.0524288.0640253.0
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