2d1f73ad11
* updating workloads Signed-off-by: Jose Santos <josantos@amd.com> * updating workloads Signed-off-by: Jose Santos <josantos@amd.com> * Adding generate workloads script Signed-off-by: Jose Santos <josantos@amd.com> * Changing output workloads dir in shell script Signed-off-by: Jose Santos <josantos@amd.com> --------- Signed-off-by: Jose Santos <josantos@amd.com>
4.0 KiB
4.0 KiB
| 1 | Dispatch_ID | Kernel_Name | GPU_ID | Grid_Size | Workgroup_Size | LDS_Per_Workgroup | Scratch_Per_Workitem | Arch_VGPR | Accum_VGPR | SGPR | wave_size | obj | SQC_DCACHE_REQ_READ_16 | SQC_ICACHE_REQ | SQC_ICACHE_HITS | SQC_ICACHE_MISSES | SQC_ICACHE_MISSES_DUPLICATE | SQC_DCACHE_INPUT_VALID_READYB | SQC_DCACHE_ATOMIC | SQC_DCACHE_REQ_READ_8 | SPI_RA_WVLIM_STALL_CSN | SPI_SWC_CSC_WR | wave_size_1 | obj_1 | SQ_INSTS_SMEM | SQ_INSTS_FLAT | SQ_INSTS_LDS | SQ_INSTS_GDS | SQ_INSTS_EXP_GDS | SQ_INSTS_BRANCH | SQ_INSTS_SENDMSG | SQ_INSTS | GRBM_SPI_BUSY | SPI_CSN_NUM_THREADGROUPS | SPI_CSN_WAVE | wave_size_2 | obj_2 | SQ_WAVE_CYCLES | SQ_WAIT_ANY | SQ_WAIT_INST_ANY | SQ_ACTIVE_INST_ANY | SQ_BUSY_CU_CYCLES | SQ_INSTS_VALU | SQ_ACTIVE_INST_VMEM | SQ_ACTIVE_INST_LDS | SPI_RA_REQ_NO_ALLOC | SPI_RA_REQ_NO_ALLOC_CSN | wave_size_3 | obj_3 | SQ_WAVES_LT_48 | SQ_WAVES_LT_32 | SQ_WAVES_LT_16 | SQ_ITEMS | SQ_LDS_MEM_VIOLATIONS | SQ_LDS_ATOMIC_RETURN | SQ_LDS_IDX_ACTIVE | SQ_WAVES_RESTORED | SPI_RA_SGPR_SIMD_FULL_CSN | SPI_RA_LDS_CU_FULL_CSN | wave_size_4 | obj_4 | SQ_ACTIVE_INST_VALU | SQ_ACTIVE_INST_SCA | SQ_ACTIVE_INST_EXP_GDS | SQ_ACTIVE_INST_MISC | SQ_ACTIVE_INST_FLAT | SQ_INST_CYCLES_VMEM_WR | SQ_INST_CYCLES_VMEM_RD | SQ_INST_CYCLES_SMEM | SPI_RA_RES_STALL_CSN | SPI_RA_TMP_STALL_CSN | wave_size_5 | obj_5 | SQ_INST_CYCLES_SALU | SQ_THREAD_CYCLES_VALU | SQ_IFETCH | SQ_LDS_BANK_CONFLICT | SQ_LDS_ADDR_CONFLICT | SQ_LDS_UNALIGNED_STALL | SQ_WAVES_EQ_64 | SQ_WAVES_LT_64 | SPI_RA_WAVE_SIMD_FULL_CSN | SPI_RA_VGPR_SIMD_FULL_CSN | wave_size_6 | obj_6 | SQ_WAVES_SAVED | SQ_INSTS_SMEM_NORM | SQC_TC_INST_REQ | SQC_TC_DATA_READ_REQ | SQC_TC_DATA_WRITE_REQ | SQC_TC_DATA_ATOMIC_REQ | SQC_TC_STALL | SQC_TC_REQ | SPI_RA_BAR_CU_FULL_CSN | SPI_RA_TGLIM_CU_FULL_CSN | wave_size_7 | obj_7 | SQ_CYCLES | SQ_BUSY_CYCLES | SQ_WAVES | SQ_INSTS_VMEM_WR | SQ_INSTS_VMEM_RD | SQ_INSTS_VMEM | SQ_INSTS_SALU | SQ_INSTS_VSKIPPED | GRBM_COUNT | GRBM_GUI_ACTIVE | SPI_CSN_WINDOW_VALID | SPI_CSN_BUSY | wave_size_8 | obj_8 | SQC_DCACHE_REQ | SQC_DCACHE_HITS | SQC_DCACHE_MISSES | SQC_DCACHE_MISSES_DUPLICATE | SQC_DCACHE_REQ_READ_1 | SQC_DCACHE_REQ_READ_2 | SQC_DCACHE_REQ_READ_4 | SPI_VWC_CSC_WR | SPI_RA_BULKY_CU_FULL_CSN | Start_Timestamp | End_Timestamp |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2 | 0 | vecCopy(double*, double*, double*, int, int) | 2 | 1048576 | 256 | 0 | 0 | 8 | 8 | 16 | 64 | 0x7fa2103a6e80 | 0 | 65536 | 64391 | 48 | 1497 | 192943 | 0 | 0 | 0 | 81920 | 64 | 0x7f430ddece80 | 65536 | 32768 | 0 | 0 | 0 | 16384 | 16384 | 393216 | 31585 | 4096 | 16384 | 64 | 0x7fede21a2e80 | 25229679 | 21724755 | 3144476 | 360448 | 3493834 | 163840 | 0 | 0 | 12949 | 29333 | 64 | 0x7f61f3754e80 | 0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 0 | 64 | 0x7f59e033ae80 | 180224 | 114688 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 0 | 0 | 64 | 0x7f05728a6e80 | 49152 | 11534336 | 65536 | 0 | 0 | 0 | 16384 | 0 | 0 | 0 | 64 | 0x7f44ff8a0e80 | 0 | 131072 | 144 | 48 | 0 | 0 | 0 | 192 | 0 | 0 | 64 | 0x7f5f88bdce80 | 388920 | 240086 | 16384 | 16384 | 16384 | 32768 | 49152 | 0 | 48614 | 48614 | 387207 | 250014 | 64 | 0x7f8c261ece80 | 65536 | 64048 | 48 | 1440 | 32768 | 32768 | 0 | 16384 | 0 | 2187761447977782 | 2187761448002422 |
| 3 | 1 | vecCopy(double*, double*, double*, int, int) | 2 | 1048576 | 256 | 0 | 0 | 8 | 8 | 16 | 64 | 0x7fa2103a6e80 | 0 | 65536 | 65536 | 0 | 0 | 191587 | 0 | 0 | 0 | 81920 | 64 | 0x7f430ddece80 | 65536 | 32768 | 0 | 0 | 0 | 16384 | 16384 | 393216 | 30644 | 4096 | 16384 | 64 | 0x7fede21a2e80 | 24015717 | 21450671 | 2204598 | 360448 | 3356936 | 163840 | 0 | 0 | 11134 | 27518 | 64 | 0x7f61f3754e80 | 0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 0 | 64 | 0x7f59e033ae80 | 180224 | 114688 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 0 | 0 | 64 | 0x7f05728a6e80 | 49152 | 11534336 | 65536 | 0 | 0 | 0 | 16384 | 0 | 0 | 0 | 64 | 0x7f44ff8a0e80 | 0 | 131072 | 0 | 48 | 0 | 0 | 0 | 48 | 0 | 0 | 64 | 0x7f5f88bdce80 | 347136 | 232950 | 16384 | 16384 | 16384 | 32768 | 49152 | 0 | 43391 | 43391 | 347128 | 242717 | 64 | 0x7f8c261ece80 | 65536 | 64048 | 48 | 1440 | 32768 | 32768 | 0 | 16384 | 0 | 2187761448100342 | 2187761448119222 |
| 4 | 2 | vecCopy(double*, double*, double*, int, int) | 2 | 1048576 | 256 | 0 | 0 | 8 | 8 | 16 | 64 | 0x7fa2103a6e80 | 0 | 65536 | 65536 | 0 | 0 | 169423 | 0 | 0 | 0 | 81920 | 64 | 0x7f430ddece80 | 65536 | 32768 | 0 | 0 | 0 | 16384 | 16384 | 393216 | 31546 | 4096 | 16384 | 64 | 0x7fede21a2e80 | 23967997 | 20854288 | 2753261 | 360448 | 3361755 | 163840 | 0 | 0 | 12302 | 28686 | 64 | 0x7f61f3754e80 | 0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 0 | 64 | 0x7f59e033ae80 | 180224 | 114688 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 0 | 0 | 64 | 0x7f05728a6e80 | 49152 | 11534336 | 65536 | 0 | 0 | 0 | 16384 | 0 | 0 | 0 | 64 | 0x7f44ff8a0e80 | 0 | 131072 | 0 | 48 | 0 | 0 | 0 | 48 | 0 | 0 | 64 | 0x7f5f88bdce80 | 340640 | 225223 | 16384 | 16384 | 16384 | 32768 | 49152 | 0 | 42579 | 42579 | 340632 | 235011 | 64 | 0x7f8c261ece80 | 65536 | 64048 | 48 | 1440 | 32768 | 32768 | 0 | 16384 | 0 | 2187761448139702 | 2187761448158742 |