01aa4c4ffb
Change-Id: I356c6406eb5c2a1755202dc562298b30cb7acc06
358 sor
14 KiB
C++
358 sor
14 KiB
C++
/**********************************************************************
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Copyright ©2013 Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without modification, are permitted
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provided that the following conditions are met:
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<95> Redistributions of source code must retain the above copyright notice, this list of
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conditions and the following disclaimer.
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<95> Redistributions in binary form must reproduce the above copyright notice, this list of
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conditions and the following disclaimer in the documentation and/or
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other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
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IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
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SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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********************************************************************/
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#ifndef TEST_UTIL_HSA_RSRC_FACTORY_H_
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#define TEST_UTIL_HSA_RSRC_FACTORY_H_
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#include <hsa.h>
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#include <hsa_ext_amd.h>
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#include <hsa_ext_finalize.h>
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#include <hsa_ven_amd_aqlprofile.h>
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#include <hsa_ven_amd_loader.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <iostream>
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#include <mutex>
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#include <map>
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#include <string>
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#include <vector>
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#define HSA_ARGUMENT_ALIGN_BYTES 16
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#define HSA_QUEUE_ALIGN_BYTES 64
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#define HSA_PACKET_ALIGN_BYTES 64
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#define CHECK_STATUS(msg, status) do { \
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if ((status) != HSA_STATUS_SUCCESS) { \
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const char* emsg = 0; \
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hsa_status_string(status, &emsg); \
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printf("%s: %s\n", msg, emsg ? emsg : "<unknown error>"); \
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abort(); \
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} \
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} while (0)
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#define CHECK_ITER_STATUS(msg, status) do { \
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if ((status) != HSA_STATUS_INFO_BREAK) { \
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const char* emsg = 0; \
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hsa_status_string(status, &emsg); \
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printf("%s: %s\n", msg, emsg ? emsg : "<unknown error>"); \
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abort(); \
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} \
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} while (0)
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static const size_t MEM_PAGE_BYTES = 0x1000;
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static const size_t MEM_PAGE_MASK = MEM_PAGE_BYTES - 1;
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typedef decltype(hsa_agent_t::handle) hsa_agent_handle_t;
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// Encapsulates information about a Hsa Agent such as its
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// handle, name, max queue size, max wavefront size, etc.
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struct AgentInfo {
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// Handle of Agent
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hsa_agent_t dev_id;
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// Agent type - Cpu = 0, Gpu = 1 or Dsp = 2
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uint32_t dev_type;
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// APU flag
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bool is_apu;
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// Agent system index
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uint32_t dev_index;
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// GFXIP name
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char gfxip[64];
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// Name of Agent whose length is less than 64
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char name[64];
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// Max size of Wavefront size
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uint32_t max_wave_size;
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// Max size of Queue buffer
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uint32_t max_queue_size;
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// Hsail profile supported by agent
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hsa_profile_t profile;
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// CPU/GPU/kern-arg memory pools
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hsa_amd_memory_pool_t cpu_pool;
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hsa_amd_memory_pool_t gpu_pool;
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hsa_amd_memory_pool_t kern_arg_pool;
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// The number of compute unit available in the agent.
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uint32_t cu_num;
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// Maximum number of waves possible in a Compute Unit.
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uint32_t waves_per_cu;
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// Number of SIMD's per compute unit CU
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uint32_t simds_per_cu;
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// Number of Shader Engines (SE) in Gpu
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uint32_t se_num;
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// Number of Shader Arrays Per Shader Engines in Gpu
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uint32_t shader_arrays_per_se;
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};
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// HSA timer class
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// Provides current HSA timestampa and system-clock/ns conversion API
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class HsaTimer {
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public:
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typedef uint64_t timestamp_t;
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static const timestamp_t TIMESTAMP_MAX = UINT64_MAX;
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typedef long double freq_t;
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HsaTimer() {
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timestamp_t sysclock_hz = 0;
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hsa_status_t status = hsa_system_get_info(HSA_SYSTEM_INFO_TIMESTAMP_FREQUENCY, &sysclock_hz);
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CHECK_STATUS("hsa_system_get_info(HSA_SYSTEM_INFO_TIMESTAMP_FREQUENCY)", status);
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sysclock_factor_ = (freq_t)1000000000 / (freq_t)sysclock_hz;
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}
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// Methids for system-clock/ns conversion
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timestamp_t sysclock_to_ns(const timestamp_t& sysclock) const {
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return timestamp_t((freq_t)sysclock * sysclock_factor_);
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}
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timestamp_t ns_to_sysclock(const timestamp_t& time) const {
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return timestamp_t((freq_t)time / sysclock_factor_);
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}
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// Return timestamp in 'ns'
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timestamp_t timestamp_ns() const {
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timestamp_t sysclock;
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hsa_status_t status = hsa_system_get_info(HSA_SYSTEM_INFO_TIMESTAMP, &sysclock);
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CHECK_STATUS("hsa_system_get_info(HSA_SYSTEM_INFO_TIMESTAMP)", status);
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return sysclock_to_ns(sysclock);
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}
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private:
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// Timestamp frequency factor
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freq_t sysclock_factor_;
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};
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class HsaRsrcFactory {
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public:
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static const size_t CMD_SLOT_SIZE_B = 0x40;
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typedef std::recursive_mutex mutex_t;
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typedef HsaTimer::timestamp_t timestamp_t;
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static HsaRsrcFactory* Create(bool initialize_hsa = true) {
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std::lock_guard<mutex_t> lck(mutex_);
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if (instance_ == NULL) {
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instance_ = new HsaRsrcFactory(initialize_hsa);
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}
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return instance_;
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}
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static HsaRsrcFactory& Instance() {
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if (instance_ == NULL) instance_ = Create(false);
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hsa_status_t status = (instance_ != NULL) ? HSA_STATUS_SUCCESS : HSA_STATUS_ERROR;
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CHECK_STATUS("HsaRsrcFactory::Instance() failed", status);
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return *instance_;
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}
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static void Destroy() {
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std::lock_guard<mutex_t> lck(mutex_);
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if (instance_) delete instance_;
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instance_ = NULL;
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}
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// Return system agent info
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const AgentInfo* GetAgentInfo(const hsa_agent_t agent);
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// Get the count of Hsa Gpu Agents available on the platform
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// @return uint32_t Number of Gpu agents on platform
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uint32_t GetCountOfGpuAgents();
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// Get the count of Hsa Cpu Agents available on the platform
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// @return uint32_t Number of Cpu agents on platform
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uint32_t GetCountOfCpuAgents();
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// Get the AgentInfo handle of a Gpu device
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// @param idx Gpu Agent at specified index
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// @param agent_info Output parameter updated with AgentInfo
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// @return bool true if successful, false otherwise
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bool GetGpuAgentInfo(uint32_t idx, const AgentInfo** agent_info);
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// Get the AgentInfo handle of a Cpu device
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// @param idx Cpu Agent at specified index
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// @param agent_info Output parameter updated with AgentInfo
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// @return bool true if successful, false otherwise
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bool GetCpuAgentInfo(uint32_t idx, const AgentInfo** agent_info);
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// Create a Queue object and return its handle. The queue object is expected
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// to support user requested number of Aql dispatch packets.
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// @param agent_info Gpu Agent on which to create a queue object
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// @param num_Pkts Number of packets to be held by queue
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// @param queue Output parameter updated with handle of queue object
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// @return bool true if successful, false otherwise
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bool CreateQueue(const AgentInfo* agent_info, uint32_t num_pkts, hsa_queue_t** queue);
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// Create a Signal object and return its handle.
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// @param value Initial value of signal object
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// @param signal Output parameter updated with handle of signal object
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// @return bool true if successful, false otherwise
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bool CreateSignal(uint32_t value, hsa_signal_t* signal);
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// Allocate local GPU memory
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// @param agent_info Agent from whose memory region to allocate
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// @param size Size of memory in terms of bytes
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// @return uint8_t* Pointer to buffer, null if allocation fails.
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uint8_t* AllocateLocalMemory(const AgentInfo* agent_info, size_t size);
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// Allocate memory tp pass kernel parameters
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// Memory is alocated accessible for all CPU agents and for GPU given by AgentInfo parameter.
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// @param agent_info Agent from whose memory region to allocate
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// @param size Size of memory in terms of bytes
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// @return uint8_t* Pointer to buffer, null if allocation fails.
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uint8_t* AllocateKernArgMemory(const AgentInfo* agent_info, size_t size);
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// Allocate system memory accessible from both CPU and GPU
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// Memory is alocated accessible to all CPU agents and AgentInfo parameter is ignored.
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// @param agent_info Agent from whose memory region to allocate
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// @param size Size of memory in terms of bytes
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// @return uint8_t* Pointer to buffer, null if allocation fails.
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uint8_t* AllocateSysMemory(const AgentInfo* agent_info, size_t size);
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// Allocate memory for command buffer.
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// @param agent_info Agent from whose memory region to allocate
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// @param size Size of memory in terms of bytes
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// @return uint8_t* Pointer to buffer, null if allocation fails.
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uint8_t* AllocateCmdMemory(const AgentInfo* agent_info, size_t size);
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// Wait signal
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void SignalWait(const hsa_signal_t& signal) const;
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// Wait signal with signal value restore
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void SignalWaitRestore(const hsa_signal_t& signal, const hsa_signal_value_t& signal_value) const;
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// Copy data from GPU to host memory
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bool Memcpy(const hsa_agent_t& agent, void* dst, const void* src, size_t size);
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bool Memcpy(const AgentInfo* agent_info, void* dst, const void* src, size_t size);
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// Memory free method
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static bool FreeMemory(void* ptr);
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// Loads an Assembled Brig file and Finalizes it into Device Isa
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// @param agent_info Gpu device for which to finalize
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// @param brig_path File path of the Assembled Brig file
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// @param kernel_name Name of the kernel to finalize
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// @param code_desc Handle of finalized Code Descriptor that could
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// be used to submit for execution
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// @return true if successful, false otherwise
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bool LoadAndFinalize(const AgentInfo* agent_info, const char* brig_path, const char* kernel_name,
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hsa_executable_t* hsa_exec, hsa_executable_symbol_t* code_desc);
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// Print the various fields of Hsa Gpu Agents
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bool PrintGpuAgents(const std::string& header);
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// Submit AQL packet to given queue
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static uint64_t Submit(hsa_queue_t* queue, const void* packet);
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static uint64_t Submit(hsa_queue_t* queue, const void* packet, size_t size_bytes);
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// Return AqlProfile API table
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typedef hsa_ven_amd_aqlprofile_pfn_t aqlprofile_pfn_t;
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const aqlprofile_pfn_t* AqlProfileApi() const { return &aqlprofile_api_; }
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// Return Loader API table
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const hsa_ven_amd_loader_1_00_pfn_t* LoaderApi() const { return &loader_api_; }
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// Methods for system-clock/ns conversion and timestamp in 'ns'
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timestamp_t SysclockToNs(const timestamp_t& sysclock) const { return timer_->sysclock_to_ns(sysclock); }
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timestamp_t NsToSysclock(const timestamp_t& time) const { return timer_->ns_to_sysclock(time); }
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timestamp_t TimestampNs() const { return timer_->timestamp_ns(); }
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timestamp_t GetSysTimeout() const { return timeout_; }
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static timestamp_t GetTimeoutNs() { return timeout_ns_; }
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static void SetTimeoutNs(const timestamp_t& time) {
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std::lock_guard<mutex_t> lck(mutex_);
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timeout_ns_ = time;
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if (instance_ != NULL) instance_->timeout_ = instance_->timer_->ns_to_sysclock(time);
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}
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private:
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// System agents iterating callback
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static hsa_status_t GetHsaAgentsCallback(hsa_agent_t agent, void* data);
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// Callback function to find and bind kernarg region of an agent
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static hsa_status_t FindMemRegionsCallback(hsa_region_t region, void* data);
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// Load AQL profile HSA extension library directly
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static hsa_status_t LoadAqlProfileLib(aqlprofile_pfn_t* api);
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// Constructor of the class. Will initialize the Hsa Runtime and
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// query the system topology to get the list of Cpu and Gpu devices
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explicit HsaRsrcFactory(bool initialize_hsa);
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// Destructor of the class
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~HsaRsrcFactory();
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// Add an instance of AgentInfo representing a Hsa Gpu agent
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const AgentInfo* AddAgentInfo(const hsa_agent_t agent);
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// To mmap command buffer memory
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static const bool CMD_MEMORY_MMAP = false;
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// HSA was initialized
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const bool initialize_hsa_;
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static HsaRsrcFactory* instance_;
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static mutex_t mutex_;
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// Used to maintain a list of Hsa Gpu Agent Info
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std::vector<const AgentInfo*> gpu_list_;
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std::vector<hsa_agent_t> gpu_agents_;
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// Used to maintain a list of Hsa Cpu Agent Info
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std::vector<const AgentInfo*> cpu_list_;
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std::vector<hsa_agent_t> cpu_agents_;
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// System agents map
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std::map<hsa_agent_handle_t, const AgentInfo*> agent_map_;
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// AqlProfile API table
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aqlprofile_pfn_t aqlprofile_api_;
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// Loader API table
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hsa_ven_amd_loader_1_00_pfn_t loader_api_;
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// System timeout, ns
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static timestamp_t timeout_ns_;
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// System timeout, sysclock
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timestamp_t timeout_;
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// HSA timer
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HsaTimer* timer_;
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// CPU/kern-arg memory pools
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hsa_amd_memory_pool_t *cpu_pool_;
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hsa_amd_memory_pool_t *kern_arg_pool_;
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};
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#endif // TEST_UTIL_HSA_RSRC_FACTORY_H_
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