foreman
51948f577c
SWDEV-96354 - Wrong usage of hsaImageData_ and deviceMemory_. Use hsaImageData_ as the original pointer before alignment and only for that purpose. The deviceMemory_ is where the data is located. No one ever needs to use hsaImageData_ really. This is only an issue with tiled images ReviewBoardURL = http://ocltc.amd.com/reviews/r/11331/diff/ Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.cpp#14 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.hpp#6 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocmemory.cpp#4 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocmemory.hpp#4 edit
783 satır
22 KiB
C++
783 satır
22 KiB
C++
//
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// Copyright (c) 2008 Advanced Micro Devices, Inc. All rights reserved.
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//
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#ifndef WITHOUT_HSA_BACKEND
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#if !defined(_WIN32)
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#include <unistd.h>
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#endif
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#include "CL/cl_ext.h"
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#include "utils/util.hpp"
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#include "device/device.hpp"
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#include "device/rocm/rocmemory.hpp"
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#include "device/rocm/rocdevice.hpp"
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#include "device/rocm/rocblit.hpp"
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#include "device/rocm/rocglinterop.hpp"
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#include "thread/monitor.hpp"
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#include "platform/memory.hpp"
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#include "platform/sampler.hpp"
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#include "api/opencl/amdocl/cl_gl_amd.hpp"
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namespace roc {
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/////////////////////////////////roc::Memory//////////////////////////////
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Memory::Memory(const roc::Device &dev, amd::Memory &owner)
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: device::Memory(owner),
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dev_(dev),
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deviceMemory_(NULL),
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kind_(MEMORY_KIND_NORMAL)
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{
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}
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Memory::~Memory()
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{
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dev_.removeVACache(this);
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}
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bool
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Memory::allocateMapMemory(size_t allocationSize)
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{
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assert(mapMemory_ == NULL);
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void *mapData = NULL;
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amd::Memory* mapMemory = dev_.findMapTarget(owner()->getSize());
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if (mapMemory == nullptr) {
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// Create buffer object to contain the map target.
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mapMemory =
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new(owner()->getContext()) amd::Buffer(
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owner()->getContext(), CL_MEM_ALLOC_HOST_PTR, owner()->getSize());
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if ((mapMemory == NULL) || (!mapMemory->create())) {
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LogError("[OCL] Fail to allocate map target object");
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dev_.hostFree(mapData);
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if (mapMemory) {
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mapMemory->release();
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}
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return false;
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}
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roc::Memory* hsaMapMemory = reinterpret_cast<roc::Memory *>(
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mapMemory->getDeviceMemory(dev_));
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if (hsaMapMemory == nullptr) {
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mapMemory->release();
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return false;
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}
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}
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mapMemory_ = mapMemory;
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return true;
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}
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void*
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Memory::allocMapTarget(
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const amd::Coord3D &origin,
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const amd::Coord3D ®ion,
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uint mapFlags,
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size_t *rowPitch,
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size_t *slicePitch)
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{
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// Map/Unmap must be serialized.
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amd::ScopedLock lock(owner()->lockMemoryOps());
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incIndMapCount();
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// If the device backing storage is direct accessible, use it.
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if (isHostMemDirectAccess()) {
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if (owner()->getHostMem() != nullptr) {
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return (static_cast<char *>(owner()->getHostMem()) + origin[0]);
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}
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return (static_cast<char *>(deviceMemory_) + origin[0]);
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}
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// Otherwise, check for host memory.
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void *hostMem = owner()->getHostMem();
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if (hostMem != NULL) {
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return (static_cast<char *>(hostMem) + origin[0]);
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}
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// Allocate one if needed.
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if (indirectMapCount_ == 1) {
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if (!allocateMapMemory(owner()->getSize())) {
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decIndMapCount();
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return NULL;
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}
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}
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else {
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// Did the map resource allocation fail?
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if (mapMemory_ == NULL) {
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LogError("Could not map target resource");
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return NULL;
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}
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}
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roc::Memory* hsaMapMemory = reinterpret_cast<roc::Memory *>(
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mapMemory_->getDeviceMemory(dev_));
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return reinterpret_cast<address>(hsaMapMemory->getDeviceMemory()) + origin[0];
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}
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void
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Memory::decIndMapCount()
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{
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// Map/Unmap must be serialized.
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amd::ScopedLock lock(owner()->lockMemoryOps());
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if (indirectMapCount_ == 0) {
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LogError("decIndMapCount() called when indirectMapCount_ already zero");
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return;
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}
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// Decrement the counter and release indirect map if it's the last op
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if (--indirectMapCount_ == 0 &&
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mapMemory_ != NULL) {
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if (!dev_.addMapTarget(mapMemory_)) {
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// Release the buffer object containing the map data.
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mapMemory_->release();
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}
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mapMemory_ = nullptr;
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}
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}
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void *
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Memory::cpuMap(
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device::VirtualDevice& vDev,
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uint flags,
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uint startLayer,
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uint numLayers,
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size_t* rowPitch,
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size_t* slicePitch)
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{
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// Create the map target.
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void * mapTarget =
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allocMapTarget(amd::Coord3D(0), amd::Coord3D(0), 0, rowPitch, slicePitch);
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assert(mapTarget != NULL);
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if (!isHostMemDirectAccess()) {
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if (!vDev.blitMgr().readBuffer(
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*this, mapTarget, amd::Coord3D(0), amd::Coord3D(size()), true)) {
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decIndMapCount();
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return NULL;
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}
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}
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return mapTarget;
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}
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void
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Memory::cpuUnmap(device::VirtualDevice& vDev)
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{
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if (!isHostMemDirectAccess()) {
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if (!vDev.blitMgr().writeBuffer(
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mapMemory_->getHostMem(), *this, amd::Coord3D(0),
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amd::Coord3D(size()), true)) {
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LogError("[OCL] Fail sync the device memory on cpuUnmap");
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}
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}
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decIndMapCount();
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}
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// Setup an interop buffer (dmabuf handle) as an OpenCL buffer
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bool Memory::createInteropBuffer(GLenum targetType, int miplevel, size_t* metadata_size, const hsa_amd_image_descriptor_t** metadata)
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{
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#if defined(_WIN32)
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return false;
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#else
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assert(owner()->isInterop() && "Object is not an interop object.");
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mesa_glinterop_export_in in;
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mesa_glinterop_export_out out;
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in.size=sizeof(mesa_glinterop_export_in);
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out.size=sizeof(mesa_glinterop_export_out);
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if(owner()->getMemFlags() & CL_MEM_READ_ONLY)
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in.access=MESA_GLINTEROP_ACCESS_READ_ONLY;
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else if(owner()->getMemFlags() & CL_MEM_WRITE_ONLY)
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in.access=MESA_GLINTEROP_ACCESS_WRITE_ONLY;
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else
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in.access=MESA_GLINTEROP_ACCESS_READ_WRITE;
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in.target = targetType;
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in.obj=owner()->getInteropObj()->asGLObject()->getGLName();
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in.miplevel=miplevel;
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in.out_driver_data_size=0;
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in.out_driver_data=NULL;
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if(!dev_.mesa().Export(in, out))
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return false;
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size_t size;
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hsa_agent_t agent=dev_.getBackendDevice();
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hsa_status_t status=hsa_amd_interop_map_buffer(1, &agent, out.dmabuf_fd, 0, &size, &deviceMemory_, metadata_size, (const void**)metadata);
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close(out.dmabuf_fd);
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if(status!=HSA_STATUS_SUCCESS)
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return false;
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kind_=MEMORY_KIND_INTEROP;
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assert(deviceMemory_!=NULL && "Interop map failed to produce a pointer!");
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return true;
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#endif
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}
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void Memory::destroyInteropBuffer()
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{
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assert(kind_==MEMORY_KIND_INTEROP && "Memory must be interop type.");
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hsa_amd_interop_unmap_buffer(deviceMemory_);
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deviceMemory_=NULL;
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}
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/////////////////////////////////roc::Buffer//////////////////////////////
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Buffer::Buffer(const roc::Device &dev, amd::Memory &owner)
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: roc::Memory(dev, owner)
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{}
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Buffer::~Buffer()
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{
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destroy();
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}
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void
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Buffer::destroy()
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{
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if (owner()->parent() != NULL) {
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return;
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}
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if(kind_==MEMORY_KIND_INTEROP)
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{
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destroyInteropBuffer();
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return;
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}
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const cl_mem_flags memFlags = owner()->getMemFlags();
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if ((deviceMemory_ != nullptr) &&
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(deviceMemory_ != owner()->getHostMem())) {
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// if they are identical, the host pointer will be
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// deallocated later on => avoid double deallocation
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if (isHostMemDirectAccess()) {
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if (memFlags & CL_MEM_USE_HOST_PTR) {
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if (dev_.agent_profile() != HSA_PROFILE_FULL) {
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hsa_amd_memory_unlock(owner()->getHostMem());
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}
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}
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}
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else {
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dev_.memFree(deviceMemory_, size());
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}
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}
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if (memFlags & CL_MEM_USE_HOST_PTR) {
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if (dev_.agent_profile() == HSA_PROFILE_FULL) {
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hsa_memory_deregister(owner()->getHostMem(), size());
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}
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}
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}
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bool
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Buffer::create()
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{
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//Interop buffer
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if(owner()->isInterop())
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return createInteropBuffer(GL_ARRAY_BUFFER, 0, NULL, NULL);
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if (owner()->parent()) {
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// Sub-Buffer creation.
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roc::Memory *parentBuffer =
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static_cast<roc::Memory *>(owner()->parent()->getDeviceMemory(dev_));
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if (parentBuffer == NULL) {
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LogError("[OCL] Fail to allocate parent buffer");
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return false;
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}
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const size_t offset = owner()->getOrigin();
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deviceMemory_ =
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static_cast<char *>(parentBuffer->getDeviceMemory()) + offset;
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flags_ |= SubMemoryObject;
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flags_ |=
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parentBuffer->isHostMemDirectAccess() ? HostMemoryDirectAccess : 0;
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return true;
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}
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// Allocate backing storage in device local memory unless UHP or AHP are set
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const cl_mem_flags memFlags = owner()->getMemFlags();
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if (!(memFlags & (CL_MEM_USE_HOST_PTR |
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CL_MEM_ALLOC_HOST_PTR | CL_MEM_USE_PERSISTENT_MEM_AMD))) {
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deviceMemory_ = dev_.deviceLocalAlloc(size());
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if (deviceMemory_ == NULL) {
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// TODO: device memory is not enabled yet.
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// Fallback to system memory if exist.
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flags_ |= HostMemoryDirectAccess;
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if (dev_.agent_profile() == HSA_PROFILE_FULL &&
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owner()->getHostMem() != NULL) {
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deviceMemory_ = owner()->getHostMem();
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assert(
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amd::isMultipleOf(
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deviceMemory_,
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static_cast<size_t>(dev_.info().memBaseAddrAlign_)));
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return true;
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}
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deviceMemory_ = dev_.hostAlloc(size(), 1, false);
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}
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assert(
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amd::isMultipleOf(
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deviceMemory_,
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static_cast<size_t>(dev_.info().memBaseAddrAlign_)));
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if (deviceMemory_ && (memFlags & CL_MEM_COPY_HOST_PTR)) {
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// To avoid recurssive call to Device::createMemory, we perform
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// data transfer to the view of the buffer.
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amd::Buffer *bufferView = new (owner()->getContext()) amd::Buffer(
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*owner(), 0, owner()->getOrigin(), owner()->getSize());
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bufferView->create();
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roc::Buffer *devBufferView =
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new roc::Buffer(dev_, *bufferView);
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devBufferView->deviceMemory_ = deviceMemory_;
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bufferView->replaceDeviceMemory(&dev_, devBufferView);
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bool ret = dev_.xferMgr().writeBuffer(
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owner()->getHostMem(), *devBufferView, amd::Coord3D(0),
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amd::Coord3D(size()), true);
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if (!ret) {
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dev_.memFree(deviceMemory_, size());
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deviceMemory_ = NULL;
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}
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bufferView->release();
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return ret;
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}
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return deviceMemory_ != NULL;
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}
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else if (memFlags & CL_MEM_USE_PERSISTENT_MEM_AMD) {
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deviceMemory_ = dev_.hostAlloc(size(), 1, false);
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if (deviceMemory_ != nullptr) {
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if (owner()->getHostMem() != nullptr) {
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memcpy(deviceMemory_, owner()->getHostMem(), size());
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}
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flags_ |= HostMemoryDirectAccess;
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}
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return deviceMemory_ != nullptr;
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}
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assert(owner()->getHostMem() != NULL);
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flags_ |= HostMemoryDirectAccess;
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if (dev_.agent_profile() == HSA_PROFILE_FULL) {
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deviceMemory_ = owner()->getHostMem();
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if (memFlags & CL_MEM_USE_HOST_PTR) {
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hsa_memory_register(deviceMemory_, size());
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}
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return deviceMemory_ != NULL;
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}
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if (owner()->getSvmPtr() != owner()->getHostMem()) {
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if (memFlags & CL_MEM_USE_HOST_PTR) {
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hsa_agent_t agent = dev_.getBackendDevice();
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hsa_status_t status = hsa_amd_memory_lock(
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owner()->getHostMem(), owner()->getSize(), &agent, 1, &deviceMemory_);
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if (status != HSA_STATUS_SUCCESS) {
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deviceMemory_ = nullptr;
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}
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}
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else {
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deviceMemory_ = owner()->getHostMem();
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}
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}
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else {
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deviceMemory_ = owner()->getHostMem();
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}
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return deviceMemory_ != NULL;
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}
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/////////////////////////////////roc::Image//////////////////////////////
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typedef struct ChannelOrderMap {
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uint32_t cl_channel_order;
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hsa_ext_image_channel_order_t hsa_channel_order;
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} ChannelOrderMap;
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typedef struct ChannelTypeMap {
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uint32_t cl_channel_type;
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hsa_ext_image_channel_type_t hsa_channel_type;
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} ChannelTypeMap;
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static const ChannelOrderMap kChannelOrderMapping[] = {
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{ CL_R, HSA_EXT_IMAGE_CHANNEL_ORDER_R },
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{ CL_A, HSA_EXT_IMAGE_CHANNEL_ORDER_A },
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{ CL_RG, HSA_EXT_IMAGE_CHANNEL_ORDER_RG },
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{ CL_RA, HSA_EXT_IMAGE_CHANNEL_ORDER_RA },
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{ CL_RGB, HSA_EXT_IMAGE_CHANNEL_ORDER_RGB },
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{ CL_RGBA, HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA },
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{ CL_BGRA, HSA_EXT_IMAGE_CHANNEL_ORDER_BGRA },
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{ CL_ARGB, HSA_EXT_IMAGE_CHANNEL_ORDER_ARGB },
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{ CL_INTENSITY, HSA_EXT_IMAGE_CHANNEL_ORDER_INTENSITY },
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{ CL_LUMINANCE, HSA_EXT_IMAGE_CHANNEL_ORDER_LUMINANCE },
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{ CL_Rx, HSA_EXT_IMAGE_CHANNEL_ORDER_RX },
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{ CL_RGx, HSA_EXT_IMAGE_CHANNEL_ORDER_RGX },
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{ CL_RGBx, HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX },
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{ CL_DEPTH, HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH },
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{ CL_DEPTH_STENCIL, HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL },
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{ CL_sRGB, HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB },
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{ CL_sRGBx, HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX },
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{ CL_sRGBA, HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA },
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{ CL_sBGRA, HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA },
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{ CL_ABGR, HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR },
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};
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static const ChannelTypeMap kChannelTypeMapping[] = {
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{CL_SNORM_INT8, HSA_EXT_IMAGE_CHANNEL_TYPE_SNORM_INT8},
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{CL_SNORM_INT16, HSA_EXT_IMAGE_CHANNEL_TYPE_SNORM_INT16},
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{CL_UNORM_INT8, HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT8},
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{CL_UNORM_INT16, HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT16},
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{CL_UNORM_SHORT_565, HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565},
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{CL_UNORM_SHORT_555, HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555},
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{CL_UNORM_INT_101010, HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_101010},
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{CL_SIGNED_INT8, HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT8},
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{CL_SIGNED_INT16, HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT16},
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{CL_SIGNED_INT32, HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT32},
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{CL_UNSIGNED_INT8, HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8},
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{CL_UNSIGNED_INT16, HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16},
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{CL_UNSIGNED_INT32, HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32},
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{CL_HALF_FLOAT, HSA_EXT_IMAGE_CHANNEL_TYPE_HALF_FLOAT},
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{CL_FLOAT, HSA_EXT_IMAGE_CHANNEL_TYPE_FLOAT},
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{CL_UNORM_INT24, HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT24},
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};
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static hsa_access_permission_t
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GetHsaAccessPermission(const cl_mem_flags flags) {
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if(flags & CL_MEM_READ_ONLY)
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return HSA_ACCESS_PERMISSION_RO;
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else if(flags & CL_MEM_WRITE_ONLY)
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return HSA_ACCESS_PERMISSION_WO;
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else
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return HSA_ACCESS_PERMISSION_RW;
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}
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Image::Image(const roc::Device& dev, amd::Memory& owner) :
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roc::Memory(dev, owner)
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{
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flags_ &= (~HostMemoryDirectAccess & ~HostMemoryRegistered);
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populateImageDescriptor();
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hsaImageObject_.handle = 0;
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originalDeviceMemory_ = NULL;
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}
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void
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Image::populateImageDescriptor()
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{
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amd::Image* image = owner()->asImage();
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// build HSA runtime image descriptor
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imageDescriptor_.width = image->getWidth();
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imageDescriptor_.height = image->getHeight();
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imageDescriptor_.depth = image->getDepth();
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imageDescriptor_.array_size = 0;
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switch (image->getType())
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{
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case CL_MEM_OBJECT_IMAGE1D:
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|
imageDescriptor_.geometry = HSA_EXT_IMAGE_GEOMETRY_1D;
|
|
imageDescriptor_.height = 1;
|
|
imageDescriptor_.depth = 1;
|
|
break;
|
|
case CL_MEM_OBJECT_IMAGE1D_BUFFER:
|
|
imageDescriptor_.geometry = HSA_EXT_IMAGE_GEOMETRY_1DB;
|
|
imageDescriptor_.height = 1;
|
|
imageDescriptor_.depth = 1;
|
|
break;
|
|
case CL_MEM_OBJECT_IMAGE1D_ARRAY:
|
|
//@todo - arraySize = height ?!
|
|
imageDescriptor_.geometry = HSA_EXT_IMAGE_GEOMETRY_1DA;
|
|
imageDescriptor_.height = 1;
|
|
imageDescriptor_.array_size = image->getHeight();
|
|
break;
|
|
case CL_MEM_OBJECT_IMAGE2D:
|
|
imageDescriptor_.geometry = HSA_EXT_IMAGE_GEOMETRY_2D;
|
|
imageDescriptor_.depth = 1;
|
|
break;
|
|
case CL_MEM_OBJECT_IMAGE2D_ARRAY:
|
|
//@todo - arraySize = depth ?!
|
|
imageDescriptor_.geometry = HSA_EXT_IMAGE_GEOMETRY_2DA;
|
|
imageDescriptor_.depth = 1;
|
|
imageDescriptor_.array_size = image->getDepth();
|
|
break;
|
|
case CL_MEM_OBJECT_IMAGE3D:
|
|
imageDescriptor_.geometry = HSA_EXT_IMAGE_GEOMETRY_3D;
|
|
break;
|
|
}
|
|
|
|
const int kChannelOrderCount =
|
|
sizeof(kChannelOrderMapping) / sizeof(ChannelOrderMap);
|
|
for (int i = 0; i < kChannelOrderCount; i++) {
|
|
if (image->getImageFormat().image_channel_order ==
|
|
kChannelOrderMapping[i].cl_channel_order) {
|
|
imageDescriptor_.format.channel_order =
|
|
kChannelOrderMapping[i].hsa_channel_order;
|
|
break;
|
|
}
|
|
}
|
|
|
|
const int kChannelTypeCount =
|
|
sizeof(kChannelTypeMapping) / sizeof(ChannelTypeMap);
|
|
for (int i = 0; i < kChannelTypeCount; i++) {
|
|
if (image->getImageFormat().image_channel_data_type ==
|
|
kChannelTypeMapping[i].cl_channel_type) {
|
|
imageDescriptor_.format.channel_type =
|
|
kChannelTypeMapping[i].hsa_channel_type;
|
|
break;
|
|
}
|
|
}
|
|
|
|
permission_ =
|
|
GetHsaAccessPermission(owner()->getMemFlags());
|
|
}
|
|
|
|
bool
|
|
Image::createInteropImage()
|
|
{
|
|
auto obj=owner()->getInteropObj()->asGLObject();
|
|
assert(obj->getCLGLObjectType()!=CL_GL_OBJECT_BUFFER && "Non-image OpenGL object used with interop image API.");
|
|
|
|
const hsa_amd_image_descriptor_t* meta;
|
|
size_t size=0;
|
|
|
|
GLenum glTarget = obj->getGLTarget();
|
|
if (glTarget == GL_TEXTURE_CUBE_MAP) {
|
|
glTarget = obj->getCubemapFace();
|
|
}
|
|
if(!createInteropBuffer(glTarget, obj->getGLMipLevel(), &size, &meta))
|
|
{
|
|
assert(false && "Failed to map image buffer.");
|
|
return false;
|
|
}
|
|
MAKE_SCOPE_GUARD(BufferGuard, [&](){ destroyInteropBuffer(); });
|
|
|
|
amdImageDesc_=(hsa_amd_image_descriptor_t*)malloc(size);
|
|
if(amdImageDesc_==NULL)
|
|
return false;
|
|
MAKE_SCOPE_GUARD(DescGuard, [&](){ free(amdImageDesc_); amdImageDesc_=NULL; });
|
|
|
|
memcpy(amdImageDesc_, meta, size);
|
|
|
|
image_metadata desc;
|
|
if(!desc.create(amdImageDesc_))
|
|
return false;
|
|
|
|
if(!desc.setMipLevel(obj->getGLMipLevel()))
|
|
return false;
|
|
|
|
if (obj->getGLTarget()==GL_TEXTURE_CUBE_MAP)
|
|
desc.setFace(obj->getCubemapFace());
|
|
|
|
originalDeviceMemory_=deviceMemory_;
|
|
|
|
hsa_status_t err=hsa_amd_image_create(dev_.getBackendDevice(), &imageDescriptor_, amdImageDesc_, originalDeviceMemory_, permission_, &hsaImageObject_);
|
|
if(err!=HSA_STATUS_SUCCESS)
|
|
return false;
|
|
|
|
BufferGuard.Dismiss();
|
|
DescGuard.Dismiss();
|
|
return true;
|
|
}
|
|
|
|
bool
|
|
Image::create()
|
|
{
|
|
if (owner()->parent()) {
|
|
// Image view creation
|
|
roc::Memory *parent =
|
|
static_cast<roc::Memory *>(owner()->parent()->getDeviceMemory(dev_));
|
|
|
|
if (parent == NULL) {
|
|
LogError("[OCL] Fail to allocate parent image");
|
|
return false;
|
|
}
|
|
|
|
return createView(*parent);
|
|
}
|
|
|
|
//Interop image
|
|
if(owner()->isInterop())
|
|
return createInteropImage();
|
|
|
|
// Get memory size requirement for device specific image.
|
|
hsa_status_t status = hsa_ext_image_data_get_info(
|
|
dev_.getBackendDevice(), &imageDescriptor_,
|
|
permission_, &deviceImageInfo_);
|
|
|
|
if (status != HSA_STATUS_SUCCESS) {
|
|
LogError("[OCL] Fail to allocate image memory");
|
|
return false;
|
|
}
|
|
|
|
// roc::Device::hostAlloc and deviceLocalAlloc implementation does not
|
|
// support alignment larger than HSA memory region allocation granularity.
|
|
// In this case, the user manages the alignment.
|
|
const size_t alloc_size =
|
|
(deviceImageInfo_.alignment <= dev_.alloc_granularity())
|
|
? deviceImageInfo_.size
|
|
: deviceImageInfo_.size + deviceImageInfo_.alignment;
|
|
|
|
if (!(owner()->getMemFlags() & CL_MEM_ALLOC_HOST_PTR)) {
|
|
originalDeviceMemory_ = dev_.deviceLocalAlloc(alloc_size);
|
|
}
|
|
|
|
if (originalDeviceMemory_ == NULL) {
|
|
originalDeviceMemory_ =
|
|
dev_.hostAlloc(alloc_size, 1, false);
|
|
}
|
|
|
|
deviceMemory_ = reinterpret_cast<void *>(
|
|
amd::alignUp(reinterpret_cast<uintptr_t>(originalDeviceMemory_),
|
|
deviceImageInfo_.alignment));
|
|
|
|
assert(amd::isMultipleOf(
|
|
deviceMemory_, static_cast<size_t>(deviceImageInfo_.alignment)));
|
|
|
|
status = hsa_ext_image_create(
|
|
dev_.getBackendDevice(), &imageDescriptor_, deviceMemory_,
|
|
permission_, &hsaImageObject_);
|
|
|
|
if (status != HSA_STATUS_SUCCESS) {
|
|
LogError("[OCL] Fail to allocate image memory");
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
bool
|
|
Image::createView(Memory &parent)
|
|
{
|
|
deviceMemory_ = parent.getDeviceMemory();
|
|
|
|
originalDeviceMemory_ = (parent.owner()->asBuffer() != NULL)
|
|
? deviceMemory_
|
|
: static_cast<Image &>(parent).originalDeviceMemory_;
|
|
|
|
kind_=parent.getKind();
|
|
|
|
hsa_status_t status;
|
|
if(kind_==MEMORY_KIND_INTEROP)
|
|
status = hsa_amd_image_create(dev_.getBackendDevice(), &imageDescriptor_, amdImageDesc_, deviceMemory_, permission_, &hsaImageObject_);
|
|
else
|
|
status= hsa_ext_image_create(dev_.getBackendDevice(), &imageDescriptor_, deviceMemory_, permission_, &hsaImageObject_);
|
|
|
|
if (status != HSA_STATUS_SUCCESS) {
|
|
LogError("[OCL] Fail to allocate image memory");
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
void*
|
|
Image::allocMapTarget(
|
|
const amd::Coord3D& origin,
|
|
const amd::Coord3D& region,
|
|
uint mapFlags,
|
|
size_t* rowPitch,
|
|
size_t* slicePitch)
|
|
{
|
|
amd::ScopedLock lock(owner()->lockMemoryOps());
|
|
|
|
incIndMapCount();
|
|
|
|
void* pHostMem = owner()->getHostMem();
|
|
|
|
if (pHostMem == NULL) {
|
|
if (indirectMapCount_ == 1) {
|
|
if (!allocateMapMemory(owner()->getSize())) {
|
|
decIndMapCount();
|
|
return NULL;
|
|
}
|
|
}
|
|
else {
|
|
// Did the map resource allocation fail?
|
|
if (mapMemory_ == NULL) {
|
|
LogError("Could not map target resource");
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
pHostMem = mapMemory_->getHostMem();
|
|
}
|
|
|
|
amd::Image* image = owner()->asImage();
|
|
|
|
size_t elementSize = image->getImageFormat().getElementSize();
|
|
|
|
size_t offset = origin[0] * elementSize;
|
|
|
|
// Adjust offset with Y dimension
|
|
offset += image->getRowPitch() * origin[1];
|
|
|
|
// Adjust offset with Z dimension
|
|
offset += image->getSlicePitch() * origin[2];
|
|
|
|
*rowPitch = image->getRowPitch();
|
|
if (slicePitch != NULL) {
|
|
*slicePitch = image->getSlicePitch();
|
|
}
|
|
|
|
return (static_cast<uint8_t*>(pHostMem)+offset);
|
|
}
|
|
|
|
Image::~Image()
|
|
{
|
|
destroy();
|
|
}
|
|
|
|
void
|
|
Image::destroy()
|
|
{
|
|
if (hsaImageObject_.handle != 0) {
|
|
hsa_status_t status =
|
|
hsa_ext_image_destroy(dev_.getBackendDevice(), hsaImageObject_);
|
|
assert(status == HSA_STATUS_SUCCESS);
|
|
}
|
|
|
|
if (owner()->parent() != NULL) {
|
|
return;
|
|
}
|
|
|
|
if(kind_==MEMORY_KIND_INTEROP)
|
|
{
|
|
free(amdImageDesc_);
|
|
amdImageDesc_=NULL;
|
|
destroyInteropBuffer();
|
|
return;
|
|
}
|
|
|
|
if (originalDeviceMemory_ != NULL) {
|
|
dev_.memFree(originalDeviceMemory_, deviceImageInfo_.size);
|
|
}
|
|
}
|
|
}
|
|
#endif // WITHOUT_HSA_BACKEND
|