Files
rocm-systems/rocclr/runtime/device/rocm/rocsettings.hpp
T
foreman b33c52ed6f P4 to Git Change 1591041 by vsytchen@vsytchen-win10 on 2018/08/08 18:46:17
SWDEV-159881 - [OCL][ROCm] Add SVM coarse-grain buffer support with device memory (Part 1)

	1. Implement submitSvmFree/Copy/FillMemory.
	2. Add macro IS_HIP that determines if the client is HIP.
	3. Add setting enableCoarseGrainSVM that allows the use of device memory for coarse grain SVM allocations.
	4. Set enableCoarseGrainSVM to be true only for HIP.

	ReviewBoardURL = http://ocltc.amd.com/reviews/r/15597/diff/

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.cpp#93 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocmemory.cpp#37 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocsettings.cpp#35 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocsettings.hpp#15 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocvirtual.cpp#61 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocvirtual.hpp#18 edit
... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#294 edit
... //depot/stg/opencl/drivers/opencl/runtime/utils/macros.hpp#10 edit
2018-08-08 18:58:03 -04:00

83 lines
2.4 KiB
C++

//
// Copyright (c) 2010 Advanced Micro Devices, Inc. All rights reserved.
//
#pragma once
#ifndef WITHOUT_HSA_BACKEND
#include "library.hpp"
/*! \addtogroup HSA OCL Stub Implementation
* @{
*/
//! HSA OCL STUB Implementation
namespace roc {
//! Device settings
class Settings : public device::Settings {
public:
union {
struct {
uint doublePrecision_ : 1; //!< Enables double precision support
uint pollCompletion_ : 1; //!< Enables polling in HSA
uint enableLocalMemory_ : 1; //!< Enable GPUVM memory
uint enableCoarseGrainSVM_ : 1; //!< Enable device memory for coarse grain SVM allocations
uint enableNCMode_ : 1; //!< Enable Non Coherent mode for system memory
uint enablePartialDispatch_ : 1; //!< Enable support for Partial Dispatch
uint imageDMA_ : 1; //!< Enable direct image DMA transfers
uint stagedXferRead_ : 1; //!< Uses a staged buffer read
uint stagedXferWrite_ : 1; //!< Uses a staged buffer write
uint singleFpDenorm_ : 1; //!< Support Single FP Denorm
uint apuSystem_ : 1; //!< APU system
uint reserved_ : 21;
};
uint value_;
};
//! Default max workgroup size for 1D
int maxWorkGroupSize_;
//! Preferred workgroup size
uint preferredWorkGroupSize_;
//! Default max workgroup sizes for 2D
int maxWorkGroupSize2DX_;
int maxWorkGroupSize2DY_;
//! Default max workgroup sizes for 3D
int maxWorkGroupSize3DX_;
int maxWorkGroupSize3DY_;
int maxWorkGroupSize3DZ_;
uint kernargPoolSize_;
uint signalPoolSize_;
uint numDeviceEvents_; //!< The number of device events
uint numWaitEvents_; //!< The number of wait events for device enqueue
size_t xferBufSize_; //!< Transfer buffer size for image copy optimization
size_t stagedXferSize_; //!< Staged buffer size
size_t pinnedXferSize_; //!< Pinned buffer size for transfer
size_t pinnedMinXferSize_; //!< Minimal buffer size for pinned transfer
//! Default constructor
Settings();
//! Creates settings
bool create(bool fullProfile, int gfxipVersion);
private:
//! Disable copy constructor
Settings(const Settings&);
//! Disable assignment
Settings& operator=(const Settings&);
//! Overrides current settings based on registry/environment
void override();
};
/*@}*/} // namespace roc
#endif /*WITHOUT_HSA_BACKEND*/