Bertan Dogancay
232 lines
9.2 KiB
C++
232 lines
9.2 KiB
C++
/*************************************************************************
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* Copyright (c) 2015-2022, NVIDIA CORPORATION. All rights reserved.
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* Modifications Copyright (c) 2019-2022 Advanced Micro Devices, Inc. All rights reserved.
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*
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* See LICENSE.txt for license information
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************************************************************************/
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#include "devcomm.h"
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#include "collectives.h"
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#include "primitives.h"
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namespace {
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template<typename T, typename RedOp, typename Proto>
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#if defined(USE_INDIRECT_FUNCTION_CALL) && !defined(__gfx940__) && !defined(__gfx941__) && !defined(__gfx942__)
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__device__ void runRing(ncclWorkElem *args) {
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#else
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__device__ __attribute__((noinline)) void runRing(ncclWorkElem *args) {
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#endif
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const int tid = threadIdx.x;
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const int nthreads = args->nWarps*WARP_SIZE;
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const int bid = args->bid;
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const int nChannels = args->nChannels;
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ncclRing *ring = &ncclShmem.channel.ring;
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const int *ringRanks = ring->userRanks;
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const ssize_t chunkSize = int(Proto::calcBytePerStep()/sizeof(T) * (Proto::Id == NCCL_PROTO_SIMPLE ? ALLGATHER_CHUNKSTEPS : 1));
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// We should not need the final /2 but it makes performance much, much smoother. Might be a bug somewhere.
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const ssize_t minChunkSizeLL128 = int(nthreads*(Proto::calcBytePerGrain()/sizeof(T))/2);
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const int nranks = ncclShmem.comm.nRanks;
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const ssize_t loopSize = nChannels*int(chunkSize);
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const ssize_t size = args->count;
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#if defined(ENABLE_NPKIT)
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int npKitCtxIdx = bid;
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#endif
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_TIME_SYNC_CPU)
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if (tid == 0) {
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uint64_t* cpuTimestamp = ncclShmem.comm.cpuTimestamp;
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NpKit::CollectGpuEvent(NPKIT_EVENT_TIME_SYNC_CPU, 0, 0, *cpuTimestamp,
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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}
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#endif
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_TIME_SYNC_GPU)
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if (tid == 0) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_TIME_SYNC_GPU, 0, 0, NPKIT_GET_GPU_TIMESTAMP(),
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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}
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#endif
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_ALL_GATHER_RING_ENTRY)
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if (tid == 0) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_ALL_GATHER_RING_ENTRY, size*sizeof(T), 0, NPKIT_GET_GPU_TIMESTAMP(),
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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}
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#endif
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T *inputBuf = (T*)args->sendbuff;
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T *outputBuf = (T*)args->recvbuff;
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Primitives<T, RedOp, FanSymmetric<1>, 0, Proto, 0> prims
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(tid, nthreads, &ring->prev, &ring->next, inputBuf, outputBuf, args->redOpArg, 0, args->connIndex, args->connIndex);
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#if defined(ENABLE_NPKIT)
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if (tid == 0) {
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prims.npKitCtxIdx = npKitCtxIdx;
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}
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#endif
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for (ssize_t gridOffset = 0; gridOffset < size; gridOffset += loopSize) {
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ssize_t realChunkSize;
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if (Proto::Id == NCCL_PROTO_SIMPLE) {
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realChunkSize = min(chunkSize, divUp(size-gridOffset,nChannels));
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realChunkSize = roundUp(realChunkSize, nthreads*sizeof(uint64_t)/sizeof(T));
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}
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else if (Proto::Id == NCCL_PROTO_LL)
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realChunkSize = size-gridOffset < loopSize ? args->lastChunkSize : chunkSize;
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else if (Proto::Id == NCCL_PROTO_LL128)
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realChunkSize = min(chunkSize, divUp(size-gridOffset, nChannels*minChunkSizeLL128)*minChunkSizeLL128);
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realChunkSize = int(realChunkSize);
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ssize_t chunkOffset = gridOffset + int(bid*realChunkSize);
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/////////////// begin AllGather steps ///////////////
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ssize_t offset;
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int nelem = min(realChunkSize, size-chunkOffset);
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int rankDest;
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// step 0: push data to next GPU
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rankDest = ringRanks[0];
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offset = chunkOffset + rankDest * size;
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_ALL_GATHER_RING_SEND_ENTRY)
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if (tid == 0) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_ALL_GATHER_RING_SEND_ENTRY, nelem*sizeof(T), 0, NPKIT_GET_GPU_TIMESTAMP(),
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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prims.npKitDataProcessTotalTime = 0;
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}
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#endif
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if (inputBuf + chunkOffset == outputBuf + offset) { // In place
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prims.directSend(chunkOffset, offset, nelem);
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} else {
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prims.directCopySend(chunkOffset, offset, nelem);
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}
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_ALL_GATHER_RING_SEND_EXIT)
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if (tid == 0) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_ALL_GATHER_RING_SEND_EXIT, nelem*sizeof(T), prims.npKitDataProcessTotalTime, NPKIT_GET_GPU_TIMESTAMP(),
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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}
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#endif
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_ALL_GATHER_RING_RECV_COPY_SEND_ENTRY)
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if (tid == 0 && nranks > 2) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_ALL_GATHER_RING_RECV_COPY_SEND_ENTRY, nelem*(nranks-2)*sizeof(T), 0, NPKIT_GET_GPU_TIMESTAMP(),
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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prims.npKitDataProcessTotalTime = 0;
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}
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#endif
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// k-2 steps: copy to next GPU
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for (int j=1; j<nranks-1; ++j) {
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rankDest = ringRanks[nranks-j];
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offset = chunkOffset + rankDest * size;
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prims.directRecvCopySend(offset, nelem);
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}
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_ALL_GATHER_RING_RECV_COPY_SEND_EXIT)
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if (tid == 0 && nranks > 2) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_ALL_GATHER_RING_RECV_COPY_SEND_EXIT, nelem*(nranks-2)*sizeof(T), prims.npKitDataProcessTotalTime, NPKIT_GET_GPU_TIMESTAMP(),
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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}
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#endif
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// Make final copy from buffer to dest.
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rankDest = ringRanks[1];
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offset = chunkOffset + rankDest * size;
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_ALL_GATHER_RING_DIRECT_RECV_ENTRY)
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if (tid == 0) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_ALL_GATHER_RING_DIRECT_RECV_ENTRY, nelem*sizeof(T), 0, NPKIT_GET_GPU_TIMESTAMP(),
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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prims.npKitDataProcessTotalTime = 0;
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}
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#endif
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// Final wait/copy.
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prims.directRecv(offset, nelem);
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_ALL_GATHER_RING_DIRECT_RECV_EXIT)
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if (tid == 0) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_ALL_GATHER_RING_DIRECT_RECV_EXIT, nelem*sizeof(T), prims.npKitDataProcessTotalTime, NPKIT_GET_GPU_TIMESTAMP(),
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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}
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#endif
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}
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_ALL_GATHER_RING_EXIT)
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if (tid == 0) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_ALL_GATHER_RING_EXIT, size*sizeof(T), 0, NPKIT_GET_GPU_TIMESTAMP(),
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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}
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#endif
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}
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}
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template<typename T, typename RedOp>
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struct RunWorkElement<ncclFuncAllGather, T, RedOp, NCCL_ALGO_RING, NCCL_PROTO_SIMPLE> {
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__device__ __forceinline__ void run(ncclWorkElem *args) {
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using Proto = ProtoSimple<ALLGATHER_CHUNKSTEPS/ALLGATHER_SLICESTEPS, ALLGATHER_SLICESTEPS>;
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runRing<T, RedOp, Proto>(args);
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}
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};
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template<typename T, typename RedOp>
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struct RunWorkElement<ncclFuncAllGather, T, RedOp, NCCL_ALGO_RING, NCCL_PROTO_LL> {
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__device__ __forceinline__ void run(ncclWorkElem *args) {
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runRing<T, RedOp, ProtoLL>(args);
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}
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};
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template<typename T, typename RedOp>
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struct RunWorkElement<ncclFuncAllGather, T, RedOp, NCCL_ALGO_RING, NCCL_PROTO_LL128> {
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__device__ __forceinline__ void run(ncclWorkElem *args) {
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runRing<T, RedOp, ProtoLL128>(args);
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}
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};
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template<typename T, typename RedOp>
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struct RunWorkElement<ncclFuncAllGather, T, RedOp, NCCL_ALGO_NVLS, NCCL_PROTO_SIMPLE> {
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__device__ __forceinline__ void run(ncclWorkElem *args) {
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const int tid = threadIdx.x;
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const int bid = args->bid;
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const int nChannels = args->nChannels;
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struct ncclNvls* nvls = &ncclShmem.channel.nvls;
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const ssize_t chunkSize = int(args->lastChunkSize);
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const ssize_t size = args->count;
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const ssize_t loopSize = nChannels*chunkSize;
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const int nThreadsGather = 128;
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const int nThreadsBcast = 384 + WARP_SIZE;
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const int tidEndGather = nThreadsGather;
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const int tidEndBcast = tidEndGather + nThreadsBcast;
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using Proto = ProtoSimple<1, 1>;
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if (tid < tidEndGather) {
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// Gather
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Primitives<T, RedOp, FanAsymmetric<NCCL_MAX_NVLS_ARITY, 0>, /*Direct=*/0, Proto, 0>
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prims(tid, nThreadsGather, nvls->up, NULL, NULL, args->recvbuff,
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args->redOpArg, 0*Proto::MaxGroupWidth, 0, 0);
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for (ssize_t gridOffset = 0; gridOffset < size; gridOffset += loopSize) {
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ssize_t offset = gridOffset + bid*chunkSize;
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int nelem = min(chunkSize, size-offset);
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prims.gather(offset, nvls->nHeads*size, nelem, size, -1, 0);
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}
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} else if (tid < tidEndBcast) {
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// Bcast through NVLS
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Primitives<T, RedOp, FanAsymmetric<0, 1>, /*Direct=*/0, Proto, 0>
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prims(tid-tidEndGather, nThreadsBcast, NULL, &nvls->down, args->sendbuff, NULL,
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args->redOpArg, 3*Proto::MaxGroupWidth, 1, 1);
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for (ssize_t gridOffset = 0; gridOffset < size; gridOffset += loopSize) {
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ssize_t offset = gridOffset + bid*chunkSize;
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int nelem = min(chunkSize, size-offset);
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prims.send(offset, nelem);
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}
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}
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}
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};
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