Jose Santos
34 KiB
34 KiB
| 1 | Dispatch_ID | Kernel_Name | GPU_ID | Grid_Size | Workgroup_Size | LDS_Per_Workgroup | Scratch_Per_Workitem | Arch_VGPR | Accum_VGPR | SGPR | wave_size | obj | TCC_EA_RDREQ[0] | TCC_EA_RDREQ_32B[0] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[0] | TCC_EA_RDREQ_GMI_CREDIT_STALL[0] | TCC_EA_RDREQ[1] | TCC_EA_RDREQ_32B[1] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[1] | TCC_EA_RDREQ_GMI_CREDIT_STALL[1] | TCC_EA_RDREQ[2] | TCC_EA_RDREQ_32B[2] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[2] | TCC_EA_RDREQ_GMI_CREDIT_STALL[2] | TCC_EA_RDREQ[3] | TCC_EA_RDREQ_32B[3] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[3] | TCC_EA_RDREQ_GMI_CREDIT_STALL[3] | TCC_EA_RDREQ[4] | TCC_EA_RDREQ_32B[4] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[4] | TCC_EA_RDREQ_GMI_CREDIT_STALL[4] | TCC_EA_RDREQ[5] | TCC_EA_RDREQ_32B[5] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[5] | TCC_EA_RDREQ_GMI_CREDIT_STALL[5] | TCC_EA_RDREQ[6] | TCC_EA_RDREQ_32B[6] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[6] | TCC_EA_RDREQ_GMI_CREDIT_STALL[6] | TCC_EA_RDREQ[7] | TCC_EA_RDREQ_32B[7] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[7] | TCC_EA_RDREQ_GMI_CREDIT_STALL[7] | TCC_EA_RDREQ[8] | TCC_EA_RDREQ_32B[8] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[8] | TCC_EA_RDREQ_GMI_CREDIT_STALL[8] | TCC_EA_RDREQ[9] | TCC_EA_RDREQ_32B[9] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[9] | TCC_EA_RDREQ_GMI_CREDIT_STALL[9] | TCC_EA_RDREQ[10] | TCC_EA_RDREQ_32B[10] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[10] | TCC_EA_RDREQ_GMI_CREDIT_STALL[10] | TCC_EA_RDREQ[11] | TCC_EA_RDREQ_32B[11] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[11] | TCC_EA_RDREQ_GMI_CREDIT_STALL[11] | TCC_EA_RDREQ[12] | TCC_EA_RDREQ_32B[12] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[12] | TCC_EA_RDREQ_GMI_CREDIT_STALL[12] | TCC_EA_RDREQ[13] | TCC_EA_RDREQ_32B[13] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[13] | TCC_EA_RDREQ_GMI_CREDIT_STALL[13] | TCC_EA_RDREQ[14] | TCC_EA_RDREQ_32B[14] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[14] | TCC_EA_RDREQ_GMI_CREDIT_STALL[14] | TCC_EA_RDREQ[15] | TCC_EA_RDREQ_32B[15] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[15] | TCC_EA_RDREQ_GMI_CREDIT_STALL[15] | TCC_EA_RDREQ[16] | TCC_EA_RDREQ_32B[16] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[16] | TCC_EA_RDREQ_GMI_CREDIT_STALL[16] | TCC_EA_RDREQ[17] | TCC_EA_RDREQ_32B[17] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[17] | TCC_EA_RDREQ_GMI_CREDIT_STALL[17] | TCC_EA_RDREQ[18] | TCC_EA_RDREQ_32B[18] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[18] | TCC_EA_RDREQ_GMI_CREDIT_STALL[18] | TCC_EA_RDREQ[19] | TCC_EA_RDREQ_32B[19] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[19] | TCC_EA_RDREQ_GMI_CREDIT_STALL[19] | TCC_EA_RDREQ[20] | TCC_EA_RDREQ_32B[20] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[20] | TCC_EA_RDREQ_GMI_CREDIT_STALL[20] | TCC_EA_RDREQ[21] | TCC_EA_RDREQ_32B[21] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[21] | TCC_EA_RDREQ_GMI_CREDIT_STALL[21] | TCC_EA_RDREQ[22] | TCC_EA_RDREQ_32B[22] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[22] | TCC_EA_RDREQ_GMI_CREDIT_STALL[22] | TCC_EA_RDREQ[23] | TCC_EA_RDREQ_32B[23] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[23] | TCC_EA_RDREQ_GMI_CREDIT_STALL[23] | TCC_EA_RDREQ[24] | TCC_EA_RDREQ_32B[24] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[24] | TCC_EA_RDREQ_GMI_CREDIT_STALL[24] | TCC_EA_RDREQ[25] | TCC_EA_RDREQ_32B[25] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[25] | TCC_EA_RDREQ_GMI_CREDIT_STALL[25] | TCC_EA_RDREQ[26] | TCC_EA_RDREQ_32B[26] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[26] | TCC_EA_RDREQ_GMI_CREDIT_STALL[26] | TCC_EA_RDREQ[27] | TCC_EA_RDREQ_32B[27] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[27] | TCC_EA_RDREQ_GMI_CREDIT_STALL[27] | TCC_EA_RDREQ[28] | TCC_EA_RDREQ_32B[28] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[28] | TCC_EA_RDREQ_GMI_CREDIT_STALL[28] | TCC_EA_RDREQ[29] | TCC_EA_RDREQ_32B[29] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[29] | TCC_EA_RDREQ_GMI_CREDIT_STALL[29] | TCC_EA_RDREQ[30] | TCC_EA_RDREQ_32B[30] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[30] | TCC_EA_RDREQ_GMI_CREDIT_STALL[30] | TCC_EA_RDREQ[31] | TCC_EA_RDREQ_32B[31] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[31] | TCC_EA_RDREQ_GMI_CREDIT_STALL[31] | wave_size_1 | obj_1 | SQ_WAVE_CYCLES | SQ_WAIT_ANY | SQ_WAIT_INST_ANY | SQ_ACTIVE_INST_ANY | SQ_BUSY_CU_CYCLES | SQ_ACTIVE_INST_VMEM | SQ_ACTIVE_INST_LDS | SQ_ACTIVE_INST_VALU | TCP_UTCL1_TRANSLATION_MISS_sum | TCP_UTCL1_TRANSLATION_HIT_sum | TCP_UTCL1_PERMISSION_MISS_sum | TCP_UTCL1_REQUEST_sum | TA_ADDR_STALLED_BY_TC_CYCLES_sum | TA_TOTAL_WAVEFRONTS_sum | SPI_RA_WAVE_SIMD_FULL_CSN | SPI_RA_VGPR_SIMD_FULL_CSN | CPC_CPC_UTCL2IU_STALL | CPC_ME1_BUSY_FOR_PACKET_DECODE | TCC_EA_WRREQ_sum | TCC_EA_WRREQ_64B_sum | TCC_EA_WR_UNCACHED_32B_sum | TCC_EA_WRREQ_DRAM_sum | wave_size_2 | obj_2 | SQ_ACTIVE_INST_SCA | SQ_ACTIVE_INST_EXP_GDS | SQ_ACTIVE_INST_MISC | SQ_ACTIVE_INST_FLAT | SQ_INST_CYCLES_VMEM_WR | SQ_INST_CYCLES_VMEM_RD | SQ_INST_CYCLES_SMEM | SQ_INST_CYCLES_SALU | TCP_TCP_LATENCY_sum | TCP_TCC_READ_REQ_LATENCY_sum | TCP_TCC_WRITE_REQ_LATENCY_sum | TCP_TCC_READ_REQ_sum | TA_ADDR_STALLED_BY_TD_CYCLES_sum | TA_DATA_STALLED_BY_TC_CYCLES_sum | SPI_RA_SGPR_SIMD_FULL_CSN | SPI_RA_LDS_CU_FULL_CSN | CPC_ME1_DC0_SPI_BUSY | TCC_EA_WRREQ_STALL_sum | TCC_EA_RDREQ_sum | TCC_EA_RDREQ_32B_sum | TCC_EA_RD_UNCACHED_32B_sum | wave_size_3 | obj_3 | TCC_EA_RDREQ_IO_CREDIT_STALL[0] | TCC_EA_RDREQ_LEVEL[0] | TCC_EA_WRREQ[0] | TCC_EA_WRREQ_64B[0] | TCC_EA_RDREQ_IO_CREDIT_STALL[1] | TCC_EA_RDREQ_LEVEL[1] | TCC_EA_WRREQ[1] | TCC_EA_WRREQ_64B[1] | TCC_EA_RDREQ_IO_CREDIT_STALL[2] | TCC_EA_RDREQ_LEVEL[2] | TCC_EA_WRREQ[2] | TCC_EA_WRREQ_64B[2] | TCC_EA_RDREQ_IO_CREDIT_STALL[3] | TCC_EA_RDREQ_LEVEL[3] | TCC_EA_WRREQ[3] | TCC_EA_WRREQ_64B[3] | TCC_EA_RDREQ_IO_CREDIT_STALL[4] | TCC_EA_RDREQ_LEVEL[4] | TCC_EA_WRREQ[4] | TCC_EA_WRREQ_64B[4] | TCC_EA_RDREQ_IO_CREDIT_STALL[5] | TCC_EA_RDREQ_LEVEL[5] | TCC_EA_WRREQ[5] | TCC_EA_WRREQ_64B[5] | TCC_EA_RDREQ_IO_CREDIT_STALL[6] | TCC_EA_RDREQ_LEVEL[6] | TCC_EA_WRREQ[6] | TCC_EA_WRREQ_64B[6] | TCC_EA_RDREQ_IO_CREDIT_STALL[7] | TCC_EA_RDREQ_LEVEL[7] | TCC_EA_WRREQ[7] | TCC_EA_WRREQ_64B[7] | TCC_EA_RDREQ_IO_CREDIT_STALL[8] | TCC_EA_RDREQ_LEVEL[8] | TCC_EA_WRREQ[8] | TCC_EA_WRREQ_64B[8] | TCC_EA_RDREQ_IO_CREDIT_STALL[9] | TCC_EA_RDREQ_LEVEL[9] | TCC_EA_WRREQ[9] | TCC_EA_WRREQ_64B[9] | TCC_EA_RDREQ_IO_CREDIT_STALL[10] | TCC_EA_RDREQ_LEVEL[10] | TCC_EA_WRREQ[10] | TCC_EA_WRREQ_64B[10] | TCC_EA_RDREQ_IO_CREDIT_STALL[11] | TCC_EA_RDREQ_LEVEL[11] | TCC_EA_WRREQ[11] | TCC_EA_WRREQ_64B[11] | TCC_EA_RDREQ_IO_CREDIT_STALL[12] | TCC_EA_RDREQ_LEVEL[12] | TCC_EA_WRREQ[12] | TCC_EA_WRREQ_64B[12] | TCC_EA_RDREQ_IO_CREDIT_STALL[13] | TCC_EA_RDREQ_LEVEL[13] | TCC_EA_WRREQ[13] | TCC_EA_WRREQ_64B[13] | TCC_EA_RDREQ_IO_CREDIT_STALL[14] | TCC_EA_RDREQ_LEVEL[14] | TCC_EA_WRREQ[14] | TCC_EA_WRREQ_64B[14] | TCC_EA_RDREQ_IO_CREDIT_STALL[15] | TCC_EA_RDREQ_LEVEL[15] | TCC_EA_WRREQ[15] | TCC_EA_WRREQ_64B[15] | TCC_EA_RDREQ_IO_CREDIT_STALL[16] | TCC_EA_RDREQ_LEVEL[16] | TCC_EA_WRREQ[16] | TCC_EA_WRREQ_64B[16] | TCC_EA_RDREQ_IO_CREDIT_STALL[17] | TCC_EA_RDREQ_LEVEL[17] | TCC_EA_WRREQ[17] | TCC_EA_WRREQ_64B[17] | TCC_EA_RDREQ_IO_CREDIT_STALL[18] | TCC_EA_RDREQ_LEVEL[18] | TCC_EA_WRREQ[18] | TCC_EA_WRREQ_64B[18] | TCC_EA_RDREQ_IO_CREDIT_STALL[19] | TCC_EA_RDREQ_LEVEL[19] | TCC_EA_WRREQ[19] | TCC_EA_WRREQ_64B[19] | TCC_EA_RDREQ_IO_CREDIT_STALL[20] | TCC_EA_RDREQ_LEVEL[20] | TCC_EA_WRREQ[20] | TCC_EA_WRREQ_64B[20] | TCC_EA_RDREQ_IO_CREDIT_STALL[21] | TCC_EA_RDREQ_LEVEL[21] | TCC_EA_WRREQ[21] | TCC_EA_WRREQ_64B[21] | TCC_EA_RDREQ_IO_CREDIT_STALL[22] | TCC_EA_RDREQ_LEVEL[22] | TCC_EA_WRREQ[22] | TCC_EA_WRREQ_64B[22] | TCC_EA_RDREQ_IO_CREDIT_STALL[23] | TCC_EA_RDREQ_LEVEL[23] | TCC_EA_WRREQ[23] | TCC_EA_WRREQ_64B[23] | TCC_EA_RDREQ_IO_CREDIT_STALL[24] | TCC_EA_RDREQ_LEVEL[24] | TCC_EA_WRREQ[24] | TCC_EA_WRREQ_64B[24] | TCC_EA_RDREQ_IO_CREDIT_STALL[25] | TCC_EA_RDREQ_LEVEL[25] | TCC_EA_WRREQ[25] | TCC_EA_WRREQ_64B[25] | TCC_EA_RDREQ_IO_CREDIT_STALL[26] | TCC_EA_RDREQ_LEVEL[26] | TCC_EA_WRREQ[26] | TCC_EA_WRREQ_64B[26] | TCC_EA_RDREQ_IO_CREDIT_STALL[27] | TCC_EA_RDREQ_LEVEL[27] | TCC_EA_WRREQ[27] | TCC_EA_WRREQ_64B[27] | TCC_EA_RDREQ_IO_CREDIT_STALL[28] | TCC_EA_RDREQ_LEVEL[28] | TCC_EA_WRREQ[28] | TCC_EA_WRREQ_64B[28] | TCC_EA_RDREQ_IO_CREDIT_STALL[29] | TCC_EA_RDREQ_LEVEL[29] | TCC_EA_WRREQ[29] | TCC_EA_WRREQ_64B[29] | TCC_EA_RDREQ_IO_CREDIT_STALL[30] | TCC_EA_RDREQ_LEVEL[30] | TCC_EA_WRREQ[30] | TCC_EA_WRREQ_64B[30] | TCC_EA_RDREQ_IO_CREDIT_STALL[31] | TCC_EA_RDREQ_LEVEL[31] | TCC_EA_WRREQ[31] | TCC_EA_WRREQ_64B[31] | wave_size_4 | obj_4 | SQ_CYCLES | SQ_BUSY_CYCLES | SQ_WAVES | SQ_INSTS_VALU_CVT | SQ_INSTS_VMEM_WR | SQ_INSTS_VMEM_RD | SQ_INSTS_VMEM | SQ_INSTS_SALU | GRBM_COUNT | GRBM_GUI_ACTIVE | TCP_GATE_EN1_sum | TCP_GATE_EN2_sum | TCP_TD_TCP_STALL_CYCLES_sum | TCP_TCR_TCP_STALL_CYCLES_sum | TA_TA_BUSY_sum | TA_BUFFER_WAVEFRONTS_sum | TD_TD_BUSY_sum | TD_TC_STALL_sum | SPI_CSN_WINDOW_VALID | SPI_CSN_BUSY | CPC_CPC_STAT_BUSY | CPC_CPC_STAT_IDLE | CPF_CPF_STAT_BUSY | CPF_CPF_STAT_STALL | TCC_CYCLE_sum | TCC_BUSY_sum | TCC_PROBE_sum | TCC_PROBE_ALL_sum | wave_size_5 | obj_5 | SQC_TC_DATA_WRITE_REQ | SQC_TC_DATA_ATOMIC_REQ | SQC_TC_STALL | SQC_TC_REQ | SQC_DCACHE_REQ_READ_16 | SQC_ICACHE_REQ | SQC_ICACHE_HITS | SQC_ICACHE_MISSES | wave_size_6 | obj_6 | SQ_INSTS_FLAT_LDS_ONLY | SQ_INSTS_VALU_MFMA_MOPS_I8 | SQ_INSTS_VALU_MFMA_MOPS_F16 | SQ_INSTS_VALU_MFMA_MOPS_BF16 | SQ_INSTS_VALU_MFMA_MOPS_F32 | SQ_INSTS_VALU_MFMA_MOPS_F64 | SQC_TC_INST_REQ | SQC_TC_DATA_READ_REQ | TCP_TCC_RW_READ_REQ_sum | TCP_TCC_RW_WRITE_REQ_sum | TCP_TCC_RW_ATOMIC_REQ_sum | TCP_PENDING_STALL_CYCLES_sum | wave_size_7 | obj_7 | TCC_RW_REQ[0] | TCC_TOO_MANY_EA_WRREQS_STALL[0] | TCC_WRITE[0] | TCC_RW_REQ[1] | TCC_TOO_MANY_EA_WRREQS_STALL[1] | TCC_WRITE[1] | TCC_RW_REQ[2] | TCC_TOO_MANY_EA_WRREQS_STALL[2] | TCC_WRITE[2] | TCC_RW_REQ[3] | TCC_TOO_MANY_EA_WRREQS_STALL[3] | TCC_WRITE[3] | TCC_RW_REQ[4] | TCC_TOO_MANY_EA_WRREQS_STALL[4] | TCC_WRITE[4] | TCC_RW_REQ[5] | TCC_TOO_MANY_EA_WRREQS_STALL[5] | TCC_WRITE[5] | TCC_RW_REQ[6] | TCC_TOO_MANY_EA_WRREQS_STALL[6] | TCC_WRITE[6] | TCC_RW_REQ[7] | TCC_TOO_MANY_EA_WRREQS_STALL[7] | TCC_WRITE[7] | TCC_RW_REQ[8] | TCC_TOO_MANY_EA_WRREQS_STALL[8] | TCC_WRITE[8] | TCC_RW_REQ[9] | TCC_TOO_MANY_EA_WRREQS_STALL[9] | TCC_WRITE[9] | TCC_RW_REQ[10] | TCC_TOO_MANY_EA_WRREQS_STALL[10] | TCC_WRITE[10] | TCC_RW_REQ[11] | TCC_TOO_MANY_EA_WRREQS_STALL[11] | TCC_WRITE[11] | TCC_RW_REQ[12] | TCC_TOO_MANY_EA_WRREQS_STALL[12] | TCC_WRITE[12] | TCC_RW_REQ[13] | TCC_TOO_MANY_EA_WRREQS_STALL[13] | TCC_WRITE[13] | TCC_RW_REQ[14] | TCC_TOO_MANY_EA_WRREQS_STALL[14] | TCC_WRITE[14] | TCC_RW_REQ[15] | TCC_TOO_MANY_EA_WRREQS_STALL[15] | TCC_WRITE[15] | TCC_RW_REQ[16] | TCC_TOO_MANY_EA_WRREQS_STALL[16] | TCC_WRITE[16] | TCC_RW_REQ[17] | TCC_TOO_MANY_EA_WRREQS_STALL[17] | TCC_WRITE[17] | TCC_RW_REQ[18] | TCC_TOO_MANY_EA_WRREQS_STALL[18] | TCC_WRITE[18] | TCC_RW_REQ[19] | TCC_TOO_MANY_EA_WRREQS_STALL[19] | TCC_WRITE[19] | TCC_RW_REQ[20] | TCC_TOO_MANY_EA_WRREQS_STALL[20] | TCC_WRITE[20] | TCC_RW_REQ[21] | TCC_TOO_MANY_EA_WRREQS_STALL[21] | TCC_WRITE[21] | TCC_RW_REQ[22] | TCC_TOO_MANY_EA_WRREQS_STALL[22] | TCC_WRITE[22] | TCC_RW_REQ[23] | TCC_TOO_MANY_EA_WRREQS_STALL[23] | TCC_WRITE[23] | TCC_RW_REQ[24] | TCC_TOO_MANY_EA_WRREQS_STALL[24] | TCC_WRITE[24] | TCC_RW_REQ[25] | TCC_TOO_MANY_EA_WRREQS_STALL[25] | TCC_WRITE[25] | TCC_RW_REQ[26] | TCC_TOO_MANY_EA_WRREQS_STALL[26] | TCC_WRITE[26] | TCC_RW_REQ[27] | TCC_TOO_MANY_EA_WRREQS_STALL[27] | TCC_WRITE[27] | TCC_RW_REQ[28] | TCC_TOO_MANY_EA_WRREQS_STALL[28] | TCC_WRITE[28] | TCC_RW_REQ[29] | TCC_TOO_MANY_EA_WRREQS_STALL[29] | TCC_WRITE[29] | TCC_RW_REQ[30] | TCC_TOO_MANY_EA_WRREQS_STALL[30] | TCC_WRITE[30] | TCC_RW_REQ[31] | TCC_TOO_MANY_EA_WRREQS_STALL[31] | TCC_WRITE[31] | wave_size_8 | obj_8 | SQ_INSTS_SMEM_NORM | SQ_INSTS_MFMA | SQ_INSTS_VALU_MFMA_I8 | SQ_INSTS_VALU_MFMA_F16 | SQ_INSTS_VALU_MFMA_BF16 | SQ_INSTS_VALU_MFMA_F32 | SQ_INSTS_VALU_MFMA_F64 | SQ_VALU_MFMA_BUSY_CYCLES | TCP_TCC_UC_ATOMIC_REQ_sum | TCP_TCC_CC_READ_REQ_sum | TCP_TCC_CC_WRITE_REQ_sum | TCP_TCC_CC_ATOMIC_REQ_sum | SPI_VWC_CSC_WR | SPI_RA_BULKY_CU_FULL_CSN | TCC_EA_RDREQ_LEVEL_sum | TCC_EA_WRREQ_LEVEL_sum | TCC_EA_ATOMIC_LEVEL_sum | wave_size_9 | obj_9 | SQ_INSTS_VSKIPPED | SQ_INSTS | SQ_INSTS_VALU | SQ_INSTS_VALU_ADD_F16 | SQ_INSTS_VALU_MUL_F16 | SQ_INSTS_VALU_FMA_F16 | SQ_INSTS_VALU_TRANS_F16 | SQ_INSTS_VALU_ADD_F32 | GRBM_SPI_BUSY | TCP_READ_TAGCONFLICT_STALL_CYCLES_sum | TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum | TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum | TCP_TA_TCP_STATE_READ_sum | TA_BUFFER_READ_WAVEFRONTS_sum | TA_BUFFER_WRITE_WAVEFRONTS_sum | TD_SPI_STALL_sum | TD_LOAD_WAVEFRONT_sum | SPI_CSN_NUM_THREADGROUPS | SPI_CSN_WAVE | CPC_CPC_TCIU_BUSY | CPC_CPC_TCIU_IDLE | CPF_CPF_TCIU_BUSY | CPF_CPF_TCIU_STALL | TCC_NC_REQ_sum | TCC_UC_REQ_sum | TCC_CC_REQ_sum | TCC_RW_REQ_sum | wave_size_10 | obj_10 | SQC_DCACHE_REQ_READ_1 | SQC_DCACHE_REQ_READ_2 | SQC_DCACHE_REQ_READ_4 | wave_size_11 | obj_11 | SQ_THREAD_CYCLES_VALU | SQ_IFETCH | SQ_LDS_BANK_CONFLICT | SQ_LDS_ADDR_CONFLICT | SQ_LDS_UNALIGNED_STALL | SQ_WAVES_EQ_64 | SQ_WAVES_LT_64 | SQ_WAVES_LT_48 | TCP_TCC_WRITE_REQ_sum | TCP_TCC_ATOMIC_WITH_RET_REQ_sum | TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum | TCP_TCC_NC_READ_REQ_sum | TA_FLAT_WAVEFRONTS_sum | TA_FLAT_READ_WAVEFRONTS_sum | SPI_RA_BAR_CU_FULL_CSN | SPI_RA_TGLIM_CU_FULL_CSN | TCC_EA_RDREQ_DRAM_sum | TCC_TAG_STALL_sum | TCC_NORMAL_WRITEBACK_sum | TCC_ALL_TC_OP_WB_WRITEBACK_sum | wave_size_12 | obj_12 | SQ_INSTS_VALU_MUL_F32 | SQ_INSTS_VALU_FMA_F32 | SQ_INSTS_VALU_TRANS_F32 | SQ_INSTS_VALU_ADD_F64 | SQ_INSTS_VALU_MUL_F64 | SQ_INSTS_VALU_FMA_F64 | SQ_INSTS_VALU_TRANS_F64 | SQ_INSTS_VALU_INT32 | TCP_VOLATILE_sum | TCP_TOTAL_ACCESSES_sum | TCP_TOTAL_READ_sum | TCP_TOTAL_WRITE_sum | TA_BUFFER_ATOMIC_WAVEFRONTS_sum | TA_BUFFER_TOTAL_CYCLES_sum | TD_ATOMIC_WAVEFRONT_sum | TD_STORE_WAVEFRONT_sum | SPI_RA_REQ_NO_ALLOC | SPI_RA_REQ_NO_ALLOC_CSN | CPC_CPC_STAT_STALL | CPC_UTCL1_STALL_ON_TRANSLATION | CPF_CPF_STAT_IDLE | CPF_CPF_TCIU_IDLE | TCC_REQ_sum | TCC_STREAMING_REQ_sum | TCC_HIT_sum | TCC_MISS_sum | wave_size_13 | obj_13 | TCC_EA_WRREQ_DRAM_CREDIT_STALL[0] | TCC_EA_WRREQ_GMI_CREDIT_STALL[0] | TCC_EA_WRREQ_IO_CREDIT_STALL[0] | TCC_EA_WRREQ_LEVEL[0] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[1] | TCC_EA_WRREQ_GMI_CREDIT_STALL[1] | TCC_EA_WRREQ_IO_CREDIT_STALL[1] | TCC_EA_WRREQ_LEVEL[1] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[2] | TCC_EA_WRREQ_GMI_CREDIT_STALL[2] | TCC_EA_WRREQ_IO_CREDIT_STALL[2] | TCC_EA_WRREQ_LEVEL[2] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[3] | TCC_EA_WRREQ_GMI_CREDIT_STALL[3] | TCC_EA_WRREQ_IO_CREDIT_STALL[3] | TCC_EA_WRREQ_LEVEL[3] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[4] | TCC_EA_WRREQ_GMI_CREDIT_STALL[4] | TCC_EA_WRREQ_IO_CREDIT_STALL[4] | TCC_EA_WRREQ_LEVEL[4] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[5] | TCC_EA_WRREQ_GMI_CREDIT_STALL[5] | TCC_EA_WRREQ_IO_CREDIT_STALL[5] | TCC_EA_WRREQ_LEVEL[5] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[6] | TCC_EA_WRREQ_GMI_CREDIT_STALL[6] | TCC_EA_WRREQ_IO_CREDIT_STALL[6] | TCC_EA_WRREQ_LEVEL[6] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[7] | TCC_EA_WRREQ_GMI_CREDIT_STALL[7] | TCC_EA_WRREQ_IO_CREDIT_STALL[7] | TCC_EA_WRREQ_LEVEL[7] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[8] | TCC_EA_WRREQ_GMI_CREDIT_STALL[8] | TCC_EA_WRREQ_IO_CREDIT_STALL[8] | TCC_EA_WRREQ_LEVEL[8] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[9] | TCC_EA_WRREQ_GMI_CREDIT_STALL[9] | TCC_EA_WRREQ_IO_CREDIT_STALL[9] | TCC_EA_WRREQ_LEVEL[9] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[10] | TCC_EA_WRREQ_GMI_CREDIT_STALL[10] | TCC_EA_WRREQ_IO_CREDIT_STALL[10] | TCC_EA_WRREQ_LEVEL[10] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[11] | TCC_EA_WRREQ_GMI_CREDIT_STALL[11] | TCC_EA_WRREQ_IO_CREDIT_STALL[11] | TCC_EA_WRREQ_LEVEL[11] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[12] | TCC_EA_WRREQ_GMI_CREDIT_STALL[12] | TCC_EA_WRREQ_IO_CREDIT_STALL[12] | TCC_EA_WRREQ_LEVEL[12] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[13] | TCC_EA_WRREQ_GMI_CREDIT_STALL[13] | TCC_EA_WRREQ_IO_CREDIT_STALL[13] | TCC_EA_WRREQ_LEVEL[13] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[14] | TCC_EA_WRREQ_GMI_CREDIT_STALL[14] | TCC_EA_WRREQ_IO_CREDIT_STALL[14] | TCC_EA_WRREQ_LEVEL[14] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[15] | TCC_EA_WRREQ_GMI_CREDIT_STALL[15] | TCC_EA_WRREQ_IO_CREDIT_STALL[15] | TCC_EA_WRREQ_LEVEL[15] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[16] | TCC_EA_WRREQ_GMI_CREDIT_STALL[16] | TCC_EA_WRREQ_IO_CREDIT_STALL[16] | TCC_EA_WRREQ_LEVEL[16] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[17] | TCC_EA_WRREQ_GMI_CREDIT_STALL[17] | TCC_EA_WRREQ_IO_CREDIT_STALL[17] | TCC_EA_WRREQ_LEVEL[17] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[18] | TCC_EA_WRREQ_GMI_CREDIT_STALL[18] | TCC_EA_WRREQ_IO_CREDIT_STALL[18] | TCC_EA_WRREQ_LEVEL[18] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[19] | TCC_EA_WRREQ_GMI_CREDIT_STALL[19] | TCC_EA_WRREQ_IO_CREDIT_STALL[19] | TCC_EA_WRREQ_LEVEL[19] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[20] | TCC_EA_WRREQ_GMI_CREDIT_STALL[20] | TCC_EA_WRREQ_IO_CREDIT_STALL[20] | TCC_EA_WRREQ_LEVEL[20] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[21] | TCC_EA_WRREQ_GMI_CREDIT_STALL[21] | TCC_EA_WRREQ_IO_CREDIT_STALL[21] | TCC_EA_WRREQ_LEVEL[21] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[22] | TCC_EA_WRREQ_GMI_CREDIT_STALL[22] | TCC_EA_WRREQ_IO_CREDIT_STALL[22] | TCC_EA_WRREQ_LEVEL[22] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[23] | TCC_EA_WRREQ_GMI_CREDIT_STALL[23] | TCC_EA_WRREQ_IO_CREDIT_STALL[23] | TCC_EA_WRREQ_LEVEL[23] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[24] | TCC_EA_WRREQ_GMI_CREDIT_STALL[24] | TCC_EA_WRREQ_IO_CREDIT_STALL[24] | TCC_EA_WRREQ_LEVEL[24] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[25] | TCC_EA_WRREQ_GMI_CREDIT_STALL[25] | TCC_EA_WRREQ_IO_CREDIT_STALL[25] | TCC_EA_WRREQ_LEVEL[25] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[26] | TCC_EA_WRREQ_GMI_CREDIT_STALL[26] | TCC_EA_WRREQ_IO_CREDIT_STALL[26] | TCC_EA_WRREQ_LEVEL[26] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[27] | TCC_EA_WRREQ_GMI_CREDIT_STALL[27] | TCC_EA_WRREQ_IO_CREDIT_STALL[27] | TCC_EA_WRREQ_LEVEL[27] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[28] | TCC_EA_WRREQ_GMI_CREDIT_STALL[28] | TCC_EA_WRREQ_IO_CREDIT_STALL[28] | TCC_EA_WRREQ_LEVEL[28] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[29] | TCC_EA_WRREQ_GMI_CREDIT_STALL[29] | TCC_EA_WRREQ_IO_CREDIT_STALL[29] | TCC_EA_WRREQ_LEVEL[29] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[30] | TCC_EA_WRREQ_GMI_CREDIT_STALL[30] | TCC_EA_WRREQ_IO_CREDIT_STALL[30] | TCC_EA_WRREQ_LEVEL[30] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[31] | TCC_EA_WRREQ_GMI_CREDIT_STALL[31] | TCC_EA_WRREQ_IO_CREDIT_STALL[31] | TCC_EA_WRREQ_LEVEL[31] | wave_size_14 | obj_14 | TCC_HIT[0] | TCC_MISS[0] | TCC_READ[0] | TCC_REQ[0] | TCC_HIT[1] | TCC_MISS[1] | TCC_READ[1] | TCC_REQ[1] | TCC_HIT[2] | TCC_MISS[2] | TCC_READ[2] | TCC_REQ[2] | TCC_HIT[3] | TCC_MISS[3] | TCC_READ[3] | TCC_REQ[3] | TCC_HIT[4] | TCC_MISS[4] | TCC_READ[4] | TCC_REQ[4] | TCC_HIT[5] | TCC_MISS[5] | TCC_READ[5] | TCC_REQ[5] | TCC_HIT[6] | TCC_MISS[6] | TCC_READ[6] | TCC_REQ[6] | TCC_HIT[7] | TCC_MISS[7] | TCC_READ[7] | TCC_REQ[7] | TCC_HIT[8] | TCC_MISS[8] | TCC_READ[8] | TCC_REQ[8] | TCC_HIT[9] | TCC_MISS[9] | TCC_READ[9] | TCC_REQ[9] | TCC_HIT[10] | TCC_MISS[10] | TCC_READ[10] | TCC_REQ[10] | TCC_HIT[11] | TCC_MISS[11] | TCC_READ[11] | TCC_REQ[11] | TCC_HIT[12] | TCC_MISS[12] | TCC_READ[12] | TCC_REQ[12] | TCC_HIT[13] | TCC_MISS[13] | TCC_READ[13] | TCC_REQ[13] | TCC_HIT[14] | TCC_MISS[14] | TCC_READ[14] | TCC_REQ[14] | TCC_HIT[15] | TCC_MISS[15] | TCC_READ[15] | TCC_REQ[15] | TCC_HIT[16] | TCC_MISS[16] | TCC_READ[16] | TCC_REQ[16] | TCC_HIT[17] | TCC_MISS[17] | TCC_READ[17] | TCC_REQ[17] | TCC_HIT[18] | TCC_MISS[18] | TCC_READ[18] | TCC_REQ[18] | TCC_HIT[19] | TCC_MISS[19] | TCC_READ[19] | TCC_REQ[19] | TCC_HIT[20] | TCC_MISS[20] | TCC_READ[20] | TCC_REQ[20] | TCC_HIT[21] | TCC_MISS[21] | TCC_READ[21] | TCC_REQ[21] | TCC_HIT[22] | TCC_MISS[22] | TCC_READ[22] | TCC_REQ[22] | TCC_HIT[23] | TCC_MISS[23] | TCC_READ[23] | TCC_REQ[23] | TCC_HIT[24] | TCC_MISS[24] | TCC_READ[24] | TCC_REQ[24] | TCC_HIT[25] | TCC_MISS[25] | TCC_READ[25] | TCC_REQ[25] | TCC_HIT[26] | TCC_MISS[26] | TCC_READ[26] | TCC_REQ[26] | TCC_HIT[27] | TCC_MISS[27] | TCC_READ[27] | TCC_REQ[27] | TCC_HIT[28] | TCC_MISS[28] | TCC_READ[28] | TCC_REQ[28] | TCC_HIT[29] | TCC_MISS[29] | TCC_READ[29] | TCC_REQ[29] | TCC_HIT[30] | TCC_MISS[30] | TCC_READ[30] | TCC_REQ[30] | TCC_HIT[31] | TCC_MISS[31] | TCC_READ[31] | TCC_REQ[31] | wave_size_15 | obj_15 | SQC_ICACHE_MISSES_DUPLICATE | SQC_DCACHE_INPUT_VALID_READYB | SQC_DCACHE_ATOMIC | SQC_DCACHE_REQ_READ_8 | SQC_DCACHE_REQ | SQC_DCACHE_HITS | SQC_DCACHE_MISSES | SQC_DCACHE_MISSES_DUPLICATE | wave_size_16 | obj_16 | TCC_ATOMIC[0] | TCC_CYCLE[0] | TCC_EA_ATOMIC[0] | TCC_EA_ATOMIC_LEVEL[0] | TCC_ATOMIC[1] | TCC_CYCLE[1] | TCC_EA_ATOMIC[1] | TCC_EA_ATOMIC_LEVEL[1] | TCC_ATOMIC[2] | TCC_CYCLE[2] | TCC_EA_ATOMIC[2] | TCC_EA_ATOMIC_LEVEL[2] | TCC_ATOMIC[3] | TCC_CYCLE[3] | TCC_EA_ATOMIC[3] | TCC_EA_ATOMIC_LEVEL[3] | TCC_ATOMIC[4] | TCC_CYCLE[4] | TCC_EA_ATOMIC[4] | TCC_EA_ATOMIC_LEVEL[4] | TCC_ATOMIC[5] | TCC_CYCLE[5] | TCC_EA_ATOMIC[5] | TCC_EA_ATOMIC_LEVEL[5] | TCC_ATOMIC[6] | TCC_CYCLE[6] | TCC_EA_ATOMIC[6] | TCC_EA_ATOMIC_LEVEL[6] | TCC_ATOMIC[7] | TCC_CYCLE[7] | TCC_EA_ATOMIC[7] | TCC_EA_ATOMIC_LEVEL[7] | TCC_ATOMIC[8] | TCC_CYCLE[8] | TCC_EA_ATOMIC[8] | TCC_EA_ATOMIC_LEVEL[8] | TCC_ATOMIC[9] | TCC_CYCLE[9] | TCC_EA_ATOMIC[9] | TCC_EA_ATOMIC_LEVEL[9] | TCC_ATOMIC[10] | TCC_CYCLE[10] | TCC_EA_ATOMIC[10] | TCC_EA_ATOMIC_LEVEL[10] | TCC_ATOMIC[11] | TCC_CYCLE[11] | TCC_EA_ATOMIC[11] | TCC_EA_ATOMIC_LEVEL[11] | TCC_ATOMIC[12] | TCC_CYCLE[12] | TCC_EA_ATOMIC[12] | TCC_EA_ATOMIC_LEVEL[12] | TCC_ATOMIC[13] | TCC_CYCLE[13] | TCC_EA_ATOMIC[13] | TCC_EA_ATOMIC_LEVEL[13] | TCC_ATOMIC[14] | TCC_CYCLE[14] | TCC_EA_ATOMIC[14] | TCC_EA_ATOMIC_LEVEL[14] | TCC_ATOMIC[15] | TCC_CYCLE[15] | TCC_EA_ATOMIC[15] | TCC_EA_ATOMIC_LEVEL[15] | TCC_ATOMIC[16] | TCC_CYCLE[16] | TCC_EA_ATOMIC[16] | TCC_EA_ATOMIC_LEVEL[16] | TCC_ATOMIC[17] | TCC_CYCLE[17] | TCC_EA_ATOMIC[17] | TCC_EA_ATOMIC_LEVEL[17] | TCC_ATOMIC[18] | TCC_CYCLE[18] | TCC_EA_ATOMIC[18] | TCC_EA_ATOMIC_LEVEL[18] | TCC_ATOMIC[19] | TCC_CYCLE[19] | TCC_EA_ATOMIC[19] | TCC_EA_ATOMIC_LEVEL[19] | TCC_ATOMIC[20] | TCC_CYCLE[20] | TCC_EA_ATOMIC[20] | TCC_EA_ATOMIC_LEVEL[20] | TCC_ATOMIC[21] | TCC_CYCLE[21] | TCC_EA_ATOMIC[21] | TCC_EA_ATOMIC_LEVEL[21] | TCC_ATOMIC[22] | TCC_CYCLE[22] | TCC_EA_ATOMIC[22] | TCC_EA_ATOMIC_LEVEL[22] | TCC_ATOMIC[23] | TCC_CYCLE[23] | TCC_EA_ATOMIC[23] | TCC_EA_ATOMIC_LEVEL[23] | TCC_ATOMIC[24] | TCC_CYCLE[24] | TCC_EA_ATOMIC[24] | TCC_EA_ATOMIC_LEVEL[24] | TCC_ATOMIC[25] | TCC_CYCLE[25] | TCC_EA_ATOMIC[25] | TCC_EA_ATOMIC_LEVEL[25] | TCC_ATOMIC[26] | TCC_CYCLE[26] | TCC_EA_ATOMIC[26] | TCC_EA_ATOMIC_LEVEL[26] | TCC_ATOMIC[27] | TCC_CYCLE[27] | TCC_EA_ATOMIC[27] | TCC_EA_ATOMIC_LEVEL[27] | TCC_ATOMIC[28] | TCC_CYCLE[28] | TCC_EA_ATOMIC[28] | TCC_EA_ATOMIC_LEVEL[28] | TCC_ATOMIC[29] | TCC_CYCLE[29] | TCC_EA_ATOMIC[29] | TCC_EA_ATOMIC_LEVEL[29] | TCC_ATOMIC[30] | TCC_CYCLE[30] | TCC_EA_ATOMIC[30] | TCC_EA_ATOMIC_LEVEL[30] | TCC_ATOMIC[31] | TCC_CYCLE[31] | TCC_EA_ATOMIC[31] | TCC_EA_ATOMIC_LEVEL[31] | wave_size_17 | obj_17 | SQ_INSTS_VALU_INT64 | SQ_INSTS_SMEM | SQ_INSTS_FLAT | SQ_INSTS_LDS | SQ_INSTS_GDS | SQ_INSTS_EXP_GDS | SQ_INSTS_BRANCH | SQ_INSTS_SENDMSG | TCP_TOTAL_ATOMIC_WITH_RET_sum | TCP_TOTAL_ATOMIC_WITHOUT_RET_sum | TCP_TOTAL_WRITEBACK_INVALIDATES_sum | TCP_TOTAL_CACHE_ACCESSES_sum | TA_BUFFER_COALESCED_READ_CYCLES_sum | TA_BUFFER_COALESCED_WRITE_CYCLES_sum | TD_COALESCABLE_WAVEFRONT_sum | SPI_RA_RES_STALL_CSN | SPI_RA_TMP_STALL_CSN | CPC_CPC_UTCL2IU_BUSY | CPC_CPC_UTCL2IU_IDLE | CPF_CMP_UTCL1_STALL_ON_TRANSLATION | TCC_READ_sum | TCC_WRITE_sum | TCC_ATOMIC_sum | TCC_WRITEBACK_sum | wave_size_18 | obj_18 | SQ_WAVES_LT_32 | SQ_WAVES_LT_16 | SQ_ITEMS | SQ_LDS_MEM_VIOLATIONS | SQ_LDS_ATOMIC_RETURN | SQ_LDS_IDX_ACTIVE | SQ_WAVES_RESTORED | SQ_WAVES_SAVED | TCP_TCC_NC_WRITE_REQ_sum | TCP_TCC_NC_ATOMIC_REQ_sum | TCP_TCC_UC_READ_REQ_sum | TCP_TCC_UC_WRITE_REQ_sum | TA_FLAT_WRITE_WAVEFRONTS_sum | TA_FLAT_ATOMIC_WAVEFRONTS_sum | SPI_RA_WVLIM_STALL_CSN | SPI_SWC_CSC_WR | TCC_NORMAL_EVICT_sum | TCC_ALL_TC_OP_INV_EVICT_sum | TCC_TOO_MANY_EA_WRREQS_STALL_sum | TCC_EA_ATOMIC_sum | Start_Timestamp | End_Timestamp |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2 | 0 | vecCopy(double*, double*, double*, int, int) | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f9a6c228ec0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4097 | 0 | 0 | 0 | 4097 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4097 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4097 | 0 | 0 | 0 | 4096 | 0 | 216 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4099 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 90 | 0 | 4098 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 64 | 0x7f2937a68ec0 | 11006002 | 9848553 | 813385 | 344064 | 1688971 | 0 | 0 | 163840 | 832.0 | 515136.0 | 0.0 | 524288.0 | 261212.0 | 32768.0 | 508615 | 0 | 0 | 10959 | 131072.0 | 131072.0 | 0.0 | 131072.0 | 64 | 0x7f94aab9cec0 | 114688 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 49152 | 27239232.0 | 85502204.0 | 39234167.0 | 131072.0 | 0.0 | 214329.0 | 0 | 0 | 14836 | 985.0 | 131081.0 | 0.0 | 10.0 | 64 | 0x7f8ec991cec0 | 0 | 1179824 | 4096 | 4096 | 0 | 1184747 | 4096 | 4096 | 0 | 1095241 | 4096 | 4096 | 0 | 1312053 | 4096 | 4096 | 0 | 1119705 | 4096 | 4096 | 0 | 1279152 | 4096 | 4096 | 0 | 1146894 | 4096 | 4096 | 0 | 1419418 | 4096 | 4096 | 0 | 1059357 | 4096 | 4096 | 0 | 955392 | 4096 | 4096 | 0 | 1177723 | 4096 | 4096 | 0 | 1147610 | 4096 | 4096 | 0 | 1142555 | 4096 | 4096 | 0 | 1295423 | 4096 | 4096 | 0 | 1244614 | 4096 | 4096 | 0 | 1176565 | 4096 | 4096 | 0 | 1307790 | 4096 | 4096 | 0 | 1099403 | 4096 | 4096 | 0 | 1255268 | 4096 | 4096 | 0 | 1441413 | 4096 | 4096 | 0 | 1096315 | 4096 | 4096 | 0 | 1313792 | 4096 | 4096 | 0 | 1070022 | 4096 | 4096 | 0 | 1165463 | 4096 | 4096 | 0 | 1269843 | 4096 | 4096 | 0 | 1221566 | 4096 | 4096 | 0 | 960162 | 4096 | 4096 | 0 | 1209517 | 4096 | 4096 | 0 | 1356484 | 4096 | 4096 | 0 | 1216090 | 4096 | 4096 | 0 | 1005949 | 4096 | 4096 | 0 | 1352581 | 4096 | 4096 | 64 | 0x7f29664d0ec0 | 230544 | 129864 | 16384 | 0 | 16384 | 16384 | 32768 | 49152 | 28817 | 28817 | 1966047.0 | 1356490.0 | 3655.0 | 143485.0 | 1055507.0 | 0.0 | 1348383.0 | 1050292.0 | 228833 | 137984 | 28817 | 0 | 28817 | 0 | 922144.0 | 489395.0 | 0.0 | 0.0 | 64 | 0x7f2a5913cec0 | 0 | 0 | 0 | 224 | 0 | 65536 | 64214 | 56 | 64 | 0x7fb169968ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 168 | 56 | 131072.0 | 131072.0 | 0.0 | 936867.0 | 64 | 0x7f5b58528ec0 | 6358 | 0 | 4096 | 6390 | 0 | 4096 | 6365 | 0 | 4096 | 6363 | 0 | 4096 | 6359 | 0 | 4096 | 6377 | 0 | 4096 | 6327 | 0 | 4096 | 6330 | 0 | 4096 | 6335 | 0 | 4096 | 6361 | 0 | 4096 | 6392 | 0 | 4096 | 6371 | 0 | 4096 | 6365 | 0 | 4096 | 6363 | 0 | 4096 | 6376 | 0 | 4096 | 6329 | 0 | 4096 | 6343 | 0 | 4096 | 6323 | 0 | 4096 | 6337 | 0 | 4096 | 6394 | 0 | 4096 | 6391 | 0 | 4096 | 6355 | 0 | 4096 | 6374 | 0 | 4096 | 6604 | 0 | 4096 | 6440 | 0 | 4096 | 6346 | 0 | 4096 | 6323 | 0 | 4096 | 6339 | 0 | 4096 | 6395 | 0 | 4096 | 6386 | 0 | 4096 | 6352 | 0 | 4096 | 6380 | 0 | 4096 | 64 | 0x7ffbde45cec0 | 131072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384 | 0 | 36964499.0 | 33819093.0 | 0.0 | 64 | 0x7f4f6bc44ec0 | 0 | 393216 | 163840 | 0 | 0 | 0 | 0 | 0 | 18192 | 0.0 | 0.0 | 0.0 | 32768.0 | 0.0 | 0.0 | 384.0 | 32768.0 | 4096 | 16384 | 352 | 28917 | 2240 | 0 | 56.0 | 8.0 | 0.0 | 204076.0 | 64 | 0x7f45efd94ec0 | 32768 | 32768 | 0 | 64 | 0x7f0432dc4ec0 | 10485760 | 65536 | 0 | 0 | 0 | 16384 | 0 | 0 | 131072.0 | 0.0 | 0.0 | 0.0 | 32768.0 | 16384.0 | 0 | 0 | 131081.0 | 34583.0 | 46155.0 | 19381.0 | 64 | 0x7f3368474ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 114688 | 2097152.0 | 2097152.0 | 1048576.0 | 1048576.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 13656 | 18873 | 8498 | 545 | 0 | 27677 | 203868.0 | 0.0 | 72787.0 | 131081.0 | 64 | 0x7fd115474ec0 | 0 | 0 | 0 | 1079720 | 0 | 0 | 0 | 1134252 | 0 | 0 | 0 | 1045421 | 0 | 0 | 0 | 1022469 | 0 | 0 | 0 | 1142703 | 0 | 0 | 0 | 1146218 | 0 | 0 | 0 | 1128724 | 0 | 0 | 0 | 1111887 | 0 | 0 | 0 | 955800 | 0 | 0 | 0 | 1049019 | 0 | 0 | 0 | 1027599 | 0 | 0 | 0 | 1083365 | 0 | 0 | 0 | 973437 | 0 | 0 | 0 | 1124813 | 0 | 0 | 0 | 1061835 | 0 | 0 | 0 | 1168236 | 0 | 0 | 0 | 963833 | 0 | 0 | 0 | 1046292 | 0 | 0 | 0 | 1106744 | 0 | 0 | 0 | 1096318 | 0 | 0 | 0 | 1033391 | 0 | 0 | 0 | 1060045 | 0 | 0 | 0 | 1015723 | 0 | 0 | 0 | 1103195 | 0 | 0 | 0 | 1117196 | 0 | 0 | 0 | 1023077 | 0 | 0 | 0 | 1041474 | 0 | 0 | 0 | 1183148 | 0 | 0 | 0 | 1102262 | 0 | 0 | 0 | 1044954 | 0 | 0 | 0 | 983585 | 0 | 0 | 0 | 1135988 | 64 | 0x7f6344c98ec0 | 2241 | 4096 | 2241 | 6337 | 2302 | 4096 | 2302 | 6398 | 2261 | 4096 | 2261 | 6357 | 2315 | 4096 | 2315 | 6411 | 2245 | 4096 | 2245 | 6341 | 2255 | 4096 | 2255 | 6351 | 2283 | 4097 | 2284 | 6380 | 2260 | 4096 | 2260 | 6356 | 2259 | 4101 | 2264 | 6360 | 2241 | 4096 | 2241 | 6337 | 2304 | 4096 | 2304 | 6400 | 2264 | 4096 | 2264 | 6360 | 2318 | 4096 | 2318 | 6414 | 2248 | 4096 | 2248 | 6344 | 2258 | 4096 | 2258 | 6354 | 2282 | 4096 | 2282 | 6378 | 2312 | 4096 | 2312 | 6408 | 2269 | 4096 | 2269 | 6365 | 2305 | 4097 | 2306 | 6402 | 2260 | 4096 | 2260 | 6356 | 2289 | 4096 | 2289 | 6385 | 2257 | 4096 | 2257 | 6353 | 2265 | 4096 | 2265 | 6361 | 2397 | 4098 | 2399 | 6495 | 2234 | 4096 | 2234 | 6330 | 2315 | 4096 | 2315 | 6411 | 2271 | 4096 | 2271 | 6367 | 2354 | 4097 | 2355 | 6451 | 2261 | 4096 | 2261 | 6357 | 2290 | 4096 | 2290 | 6386 | 2256 | 4096 | 2256 | 6352 | 2266 | 4097 | 2267 | 6363 | 64 | 0x7fb37110cec0 | 1219 | 116932 | 0 | 0 | 65536 | 63800 | 56 | 1680 | 64 | 0x7f2bf1eb4ec0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 0 | 27623 | 0 | 0 | 64 | 0x7fe24d508ec0 | 0 | 65536 | 32768 | 0 | 0 | 0 | 16384 | 16384 | 0.0 | 0.0 | 0.0 | 524288.0 | 0.0 | 0.0 | 0.0 | 11265 | 0 | 820 | 28544 | 0 | 73265.0 | 131072.0 | 0.0 | 65568.0 | 64 | 0x7fd2fe7f8ec0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 0.0 | 0 | 32768 | 65551.0 | 0.0 | 0.0 | 0.0 | 199001894935363 | 199001894955843 |
| 3 | 1 | vecCopy(double*, double*, double*, int, int) | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f9a6c228ec0 | 4096 | 0 | 8 | 0 | 4096 | 0 | 1480 | 0 | 4099 | 0 | 749 | 0 | 4096 | 0 | 973 | 0 | 4096 | 0 | 28 | 0 | 4096 | 0 | 18 | 0 | 4096 | 0 | 504 | 0 | 4096 | 0 | 681 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 529 | 0 | 4097 | 0 | 423 | 0 | 4097 | 0 | 171 | 0 | 4096 | 0 | 123 | 0 | 4097 | 0 | 14 | 0 | 4096 | 0 | 361 | 0 | 4096 | 0 | 333 | 0 | 4096 | 0 | 859 | 0 | 4096 | 0 | 277 | 0 | 4098 | 0 | 0 | 0 | 4096 | 0 | 34 | 0 | 4096 | 0 | 917 | 0 | 4096 | 0 | 482 | 0 | 4096 | 0 | 149 | 0 | 4096 | 0 | 1642 | 0 | 4096 | 0 | 2497 | 0 | 4096 | 0 | 296 | 0 | 4096 | 0 | 610 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 80 | 0 | 4099 | 0 | 896 | 0 | 4096 | 0 | 223 | 0 | 4096 | 0 | 155 | 0 | 64 | 0x7f2937a68ec0 | 17442109 | 16824138 | 273907 | 344064 | 2559829 | 0 | 0 | 163840 | 0.0 | 524288.0 | 0.0 | 524288.0 | 473755.0 | 32768.0 | 744023 | 0 | 0 | 12076 | 91469.0 | 91469.0 | 0.0 | 91469.0 | 64 | 0x7f94aab9cec0 | 114688 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 49152 | 58684283.0 | 202252507.0 | 50068835.0 | 131072.0 | 0.0 | 528959.0 | 0 | 0 | 25234 | 5071.0 | 131085.0 | 0.0 | 24.0 | 64 | 0x7f8ec991cec0 | 0 | 4053298 | 2812 | 2812 | 0 | 5308663 | 2868 | 2868 | 0 | 3454808 | 2848 | 2848 | 0 | 4348769 | 2864 | 2864 | 0 | 4297579 | 2884 | 2884 | 0 | 3439406 | 2852 | 2852 | 0 | 3286148 | 2876 | 2876 | 0 | 5347469 | 2796 | 2796 | 0 | 3999171 | 2800 | 2800 | 0 | 3171519 | 2812 | 2812 | 0 | 4247777 | 2862 | 2862 | 0 | 3552601 | 2846 | 2846 | 0 | 3383726 | 2864 | 2864 | 0 | 3929474 | 2884 | 2884 | 0 | 3974256 | 2852 | 2852 | 0 | 3298457 | 2876 | 2876 | 0 | 3671812 | 2830 | 2830 | 0 | 3699796 | 2848 | 2848 | 0 | 4266571 | 2850 | 2850 | 0 | 4211648 | 2844 | 2844 | 0 | 3904572 | 2840 | 2840 | 0 | 4286664 | 2860 | 2860 | 0 | 3192445 | 2840 | 2840 | 0 | 4691568 | 2832 | 2832 | 0 | 4205176 | 2832 | 2832 | 0 | 3857193 | 2824 | 2824 | 0 | 3382754 | 2848 | 2848 | 0 | 3428950 | 2844 | 2844 | 0 | 3600961 | 2840 | 2840 | 0 | 2908010 | 2836 | 2836 | 0 | 3081597 | 2864 | 2864 | 0 | 4344951 | 2840 | 2840 | 64 | 0x7f29664d0ec0 | 333392 | 226065 | 16384 | 0 | 16384 | 16384 | 32768 | 49152 | 41673 | 41673 | 3215463.0 | 2486094.0 | 4544.0 | 386757.0 | 1698384.0 | 0.0 | 2473902.0 | 2167306.0 | 333384 | 235179 | 41673 | 0 | 41673 | 0 | 1333536.0 | 789257.0 | 0.0 | 0.0 | 64 | 0x7f2a5913cec0 | 0 | 0 | 0 | 56 | 0 | 65536 | 65536 | 0 | 64 | 0x7fb169968ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 56 | 131072.0 | 131072.0 | 0.0 | 2034549.0 | 64 | 0x7f5b58528ec0 | 6274 | 0 | 4096 | 6281 | 0 | 4096 | 6274 | 0 | 4096 | 6273 | 0 | 4096 | 6296 | 0 | 4096 | 6257 | 0 | 4096 | 6300 | 0 | 4096 | 6304 | 0 | 4096 | 6299 | 0 | 4096 | 6275 | 0 | 4096 | 6281 | 0 | 4096 | 6275 | 0 | 4096 | 6273 | 0 | 4096 | 6296 | 0 | 4096 | 6263 | 0 | 4096 | 6300 | 0 | 4096 | 6278 | 0 | 4096 | 6312 | 0 | 4096 | 6295 | 0 | 4096 | 6277 | 0 | 4096 | 6247 | 0 | 4096 | 6291 | 0 | 4096 | 6264 | 0 | 4096 | 6305 | 0 | 4096 | 6309 | 0 | 4096 | 6281 | 0 | 4096 | 6312 | 0 | 4096 | 6293 | 0 | 4096 | 6277 | 0 | 4096 | 6245 | 0 | 4096 | 6295 | 0 | 4096 | 6260 | 0 | 4096 | 64 | 0x7ffbde45cec0 | 131072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384 | 0 | 114993725.0 | 54736282.0 | 0.0 | 64 | 0x7f4f6bc44ec0 | 0 | 393216 | 163840 | 0 | 0 | 0 | 0 | 0 | 30625 | 0.0 | 0.0 | 0.0 | 32768.0 | 0.0 | 0.0 | 226.0 | 32768.0 | 4096 | 16384 | 302 | 42149 | 2062 | 0 | 56.0 | 12.0 | 0.0 | 201132.0 | 64 | 0x7f45efd94ec0 | 32768 | 32768 | 0 | 64 | 0x7f0432dc4ec0 | 10485760 | 65536 | 0 | 0 | 0 | 16384 | 0 | 0 | 131072.0 | 0.0 | 0.0 | 0.0 | 32768.0 | 16384.0 | 0 | 0 | 131083.0 | 113320.0 | 45613.0 | 0.0 | 64 | 0x7f3368474ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 114688 | 2097152.0 | 2097152.0 | 1048576.0 | 1048576.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 33476 | 27568 | 9679 | 3091 | 0 | 40813 | 200853.0 | 0.0 | 69770.0 | 131083.0 | 64 | 0x7fd115474ec0 | 0 | 0 | 0 | 1902501 | 0 | 0 | 0 | 1773219 | 0 | 0 | 0 | 1828587 | 125 | 0 | 0 | 1959593 | 44 | 0 | 0 | 1743737 | 191 | 0 | 0 | 1928450 | 0 | 0 | 0 | 1491817 | 306 | 0 | 0 | 2171414 | 235 | 0 | 0 | 1964093 | 0 | 0 | 0 | 1516128 | 0 | 0 | 0 | 1648016 | 0 | 0 | 0 | 1666965 | 117 | 0 | 0 | 1903701 | 217 | 0 | 0 | 1832230 | 70 | 0 | 0 | 1665619 | 0 | 0 | 0 | 1537253 | 0 | 0 | 0 | 1869651 | 0 | 0 | 0 | 1490493 | 0 | 0 | 0 | 2132873 | 0 | 0 | 0 | 2322381 | 0 | 0 | 0 | 1982215 | 0 | 0 | 0 | 1837909 | 0 | 0 | 0 | 1394897 | 0 | 0 | 0 | 1823369 | 0 | 0 | 0 | 1621199 | 0 | 0 | 0 | 1617817 | 0 | 0 | 0 | 1515019 | 0 | 0 | 0 | 1799969 | 1145 | 0 | 0 | 2655551 | 0 | 0 | 0 | 1675597 | 47 | 0 | 0 | 1837476 | 21 | 0 | 0 | 1871388 | 64 | 0x7f6344c98ec0 | 2177 | 4096 | 2177 | 6273 | 2186 | 4096 | 2186 | 6282 | 2154 | 4096 | 2154 | 6250 | 2177 | 4097 | 2178 | 6274 | 2227 | 4096 | 2227 | 6323 | 2216 | 4096 | 2216 | 6312 | 2165 | 4097 | 2166 | 6262 | 2157 | 4096 | 2157 | 6253 | 2160 | 4100 | 2164 | 6260 | 2180 | 4096 | 2180 | 6276 | 2186 | 4096 | 2186 | 6282 | 2152 | 4096 | 2152 | 6248 | 2180 | 4096 | 2180 | 6276 | 2232 | 4096 | 2232 | 6328 | 2224 | 4096 | 2224 | 6320 | 2165 | 4096 | 2165 | 6261 | 2163 | 4096 | 2163 | 6259 | 2188 | 4096 | 2188 | 6284 | 2204 | 4099 | 2207 | 6303 | 2172 | 4096 | 2172 | 6268 | 2165 | 4096 | 2165 | 6261 | 2195 | 4096 | 2195 | 6291 | 2204 | 4096 | 2204 | 6300 | 2197 | 4096 | 2197 | 6293 | 2190 | 4096 | 2190 | 6286 | 2160 | 4096 | 2160 | 6256 | 2191 | 4096 | 2191 | 6287 | 2265 | 4097 | 2266 | 6362 | 2177 | 4097 | 2178 | 6274 | 2166 | 4096 | 2166 | 6262 | 2197 | 4096 | 2197 | 6293 | 2211 | 4097 | 2212 | 6308 | 64 | 0x7fb37110cec0 | 0 | 189319 | 0 | 0 | 65536 | 63800 | 56 | 1680 | 64 | 0x7f2bf1eb4ec0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 0 | 41419 | 0 | 0 | 64 | 0x7fe24d508ec0 | 0 | 65536 | 32768 | 0 | 0 | 0 | 16384 | 16384 | 0.0 | 0.0 | 0.0 | 524288.0 | 0.0 | 0.0 | 0.0 | 21917 | 0 | 3200 | 38716 | 0 | 70007.0 | 131072.0 | 0.0 | 45614.0 | 64 | 0x7fd2fe7f8ec0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 0.0 | 0 | 32768 | 65554.0 | 0.0 | 0.0 | 0.0 | 199001895045923 | 199001895062403 |
| 4 | 2 | vecCopy(double*, double*, double*, int, int) | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f9a6c228ec0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 61 | 0 | 4099 | 0 | 39 | 0 | 4096 | 0 | 598 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 603 | 0 | 4096 | 0 | 1572 | 0 | 4096 | 0 | 1491 | 0 | 4096 | 0 | 767 | 0 | 4096 | 0 | 4 | 0 | 4097 | 0 | 506 | 0 | 4097 | 0 | 623 | 0 | 4096 | 0 | 0 | 0 | 4097 | 0 | 492 | 0 | 4096 | 0 | 45 | 0 | 4096 | 0 | 971 | 0 | 4096 | 0 | 1309 | 0 | 4096 | 0 | 689 | 0 | 4098 | 0 | 104 | 0 | 4096 | 0 | 110 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 26 | 0 | 4096 | 0 | 642 | 0 | 4096 | 0 | 969 | 0 | 4096 | 0 | 753 | 0 | 4096 | 0 | 285 | 0 | 4096 | 0 | 180 | 0 | 4096 | 0 | 294 | 0 | 4096 | 0 | 124 | 0 | 4099 | 0 | 316 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 277 | 0 | 64 | 0x7f2937a68ec0 | 19212072 | 17889234 | 978774 | 344064 | 2828431 | 0 | 0 | 163840 | 832.0 | 515156.0 | 0.0 | 524288.0 | 651940.0 | 32768.0 | 962483 | 0 | 0 | 14247 | 91258.0 | 91258.0 | 0.0 | 91258.0 | 64 | 0x7f94aab9cec0 | 114688 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 49152 | 59012238.0 | 203962207.0 | 49799072.0 | 131072.0 | 0.0 | 613464.0 | 0 | 0 | 25520 | 25605.0 | 131085.0 | 0.0 | 24.0 | 64 | 0x7f8ec991cec0 | 0 | 3500985 | 2810 | 2810 | 0 | 4465598 | 2856 | 2856 | 0 | 3139145 | 2876 | 2876 | 0 | 4828031 | 2866 | 2866 | 0 | 4272524 | 2868 | 2868 | 0 | 4639315 | 2828 | 2828 | 0 | 3168068 | 2864 | 2864 | 0 | 3509805 | 2824 | 2824 | 0 | 4089463 | 2824 | 2824 | 0 | 2984079 | 2812 | 2812 | 0 | 3969660 | 2856 | 2856 | 0 | 2815232 | 2880 | 2880 | 0 | 3730141 | 2866 | 2866 | 0 | 3945959 | 2864 | 2864 | 0 | 4215769 | 2828 | 2828 | 0 | 3595329 | 2864 | 2864 | 0 | 3573539 | 2808 | 2808 | 0 | 4453356 | 2836 | 2836 | 0 | 3262638 | 2844 | 2844 | 0 | 4107953 | 2828 | 2828 | 0 | 3955268 | 2856 | 2856 | 0 | 3741482 | 2884 | 2884 | 0 | 4475161 | 2830 | 2830 | 0 | 4123623 | 2824 | 2824 | 0 | 3853112 | 2824 | 2824 | 0 | 2678326 | 2804 | 2804 | 0 | 3157757 | 2836 | 2836 | 0 | 3570615 | 2844 | 2844 | 0 | 3788053 | 2828 | 2828 | 0 | 3648549 | 2856 | 2856 | 0 | 3216476 | 2884 | 2884 | 0 | 4553292 | 2832 | 2832 | 64 | 0x7f29664d0ec0 | 332968 | 225188 | 16384 | 0 | 16384 | 16384 | 32768 | 49152 | 41620 | 41620 | 3204620.0 | 2435646.0 | 4679.0 | 336921.0 | 1612536.0 | 0.0 | 2423654.0 | 2115789.0 | 332960 | 234475 | 41620 | 0 | 41620 | 0 | 1331840.0 | 769041.0 | 0.0 | 0.0 | 64 | 0x7f2a5913cec0 | 0 | 0 | 0 | 56 | 0 | 65536 | 65536 | 0 | 64 | 0x7fb169968ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 56 | 131072.0 | 131072.0 | 0.0 | 2078739.0 | 64 | 0x7f5b58528ec0 | 6272 | 0 | 4096 | 6271 | 0 | 4096 | 6273 | 0 | 4096 | 6267 | 0 | 4096 | 6265 | 0 | 4096 | 6291 | 0 | 4096 | 6305 | 0 | 4096 | 6259 | 0 | 4096 | 6258 | 0 | 4096 | 6276 | 0 | 4096 | 6275 | 0 | 4096 | 6273 | 0 | 4096 | 6266 | 0 | 4096 | 6268 | 0 | 4096 | 6294 | 0 | 4096 | 6307 | 0 | 4096 | 6317 | 0 | 4096 | 6336 | 0 | 4096 | 6276 | 0 | 4096 | 6264 | 0 | 4096 | 6285 | 0 | 4096 | 6304 | 0 | 4096 | 6270 | 0 | 4096 | 6323 | 0 | 4096 | 6327 | 0 | 4096 | 6317 | 0 | 4096 | 6337 | 0 | 4096 | 6274 | 0 | 4096 | 6265 | 0 | 4096 | 6279 | 0 | 4096 | 6303 | 0 | 4096 | 6270 | 0 | 4096 | 64 | 0x7ffbde45cec0 | 131072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384 | 0 | 122720872.0 | 59508672.0 | 0.0 | 64 | 0x7f4f6bc44ec0 | 0 | 393216 | 163840 | 0 | 0 | 0 | 0 | 0 | 29950 | 0.0 | 0.0 | 0.0 | 32768.0 | 0.0 | 0.0 | 183.0 | 32768.0 | 4096 | 16384 | 302 | 41324 | 2064 | 0 | 56.0 | 11.0 | 0.0 | 200699.0 | 64 | 0x7f45efd94ec0 | 32768 | 32768 | 0 | 64 | 0x7f0432dc4ec0 | 10485760 | 65536 | 0 | 0 | 0 | 16384 | 0 | 0 | 131072.0 | 0.0 | 0.0 | 0.0 | 32768.0 | 16384.0 | 0 | 0 | 131083.0 | 94142.0 | 45588.0 | 0.0 | 64 | 0x7f3368474ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 114688 | 2097152.0 | 2097152.0 | 1048576.0 | 1048576.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 33548 | 28329 | 9681 | 2572 | 0 | 40307 | 201246.0 | 0.0 | 70161.0 | 131085.0 | 64 | 0x7fd115474ec0 | 0 | 0 | 0 | 1672867 | 0 | 0 | 0 | 1772478 | 0 | 0 | 0 | 1793173 | 0 | 0 | 0 | 1756705 | 0 | 0 | 0 | 1692171 | 16 | 0 | 0 | 2001859 | 0 | 0 | 0 | 1516869 | 0 | 0 | 0 | 1582399 | 0 | 0 | 0 | 1495708 | 1 | 0 | 0 | 1835980 | 192 | 0 | 0 | 2154216 | 0 | 0 | 0 | 1590847 | 310 | 0 | 0 | 1732891 | 0 | 0 | 0 | 1537215 | 0 | 0 | 0 | 1741083 | 0 | 0 | 0 | 1462858 | 0 | 0 | 0 | 1421382 | 51 | 0 | 0 | 1543396 | 10 | 0 | 0 | 1987202 | 62 | 0 | 0 | 2046958 | 0 | 0 | 0 | 1835595 | 0 | 0 | 0 | 1775664 | 0 | 0 | 0 | 1532975 | 0 | 0 | 0 | 1767950 | 970 | 0 | 0 | 2553432 | 0 | 0 | 0 | 1723931 | 0 | 0 | 0 | 1312116 | 577 | 0 | 0 | 2382098 | 80 | 0 | 0 | 1948886 | 0 | 0 | 0 | 1869305 | 0 | 0 | 0 | 1467726 | 103 | 0 | 0 | 1725884 | 64 | 0x7f6344c98ec0 | 2170 | 4096 | 2170 | 6266 | 2190 | 4096 | 2190 | 6286 | 2146 | 4096 | 2146 | 6242 | 2170 | 4097 | 2171 | 6267 | 2205 | 4096 | 2205 | 6301 | 2174 | 4096 | 2174 | 6270 | 2155 | 4097 | 2156 | 6252 | 2164 | 4096 | 2164 | 6260 | 2169 | 4101 | 2174 | 6270 | 2170 | 4096 | 2170 | 6266 | 2192 | 4096 | 2192 | 6288 | 2144 | 4096 | 2144 | 6240 | 2168 | 4096 | 2168 | 6264 | 2207 | 4096 | 2207 | 6303 | 2177 | 4096 | 2177 | 6273 | 2157 | 4096 | 2157 | 6253 | 2153 | 4096 | 2153 | 6249 | 2199 | 4096 | 2199 | 6295 | 2163 | 4099 | 2166 | 6262 | 2180 | 4096 | 2180 | 6276 | 2154 | 4096 | 2154 | 6250 | 2161 | 4096 | 2161 | 6257 | 2222 | 4096 | 2222 | 6318 | 2200 | 4096 | 2200 | 6296 | 2198 | 4096 | 2198 | 6294 | 2156 | 4096 | 2156 | 6252 | 2194 | 4096 | 2194 | 6290 | 2222 | 4097 | 2223 | 6319 | 2183 | 4097 | 2184 | 6280 | 2159 | 4096 | 2159 | 6255 | 2160 | 4096 | 2160 | 6256 | 2227 | 4097 | 2228 | 6324 | 64 | 0x7fb37110cec0 | 0 | 187457 | 0 | 0 | 65536 | 63800 | 56 | 1680 | 64 | 0x7f2bf1eb4ec0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 0 | 41275 | 0 | 0 | 64 | 0x7fe24d508ec0 | 0 | 65536 | 32768 | 0 | 0 | 0 | 16384 | 16384 | 0.0 | 0.0 | 0.0 | 524288.0 | 0.0 | 0.0 | 0.0 | 21559 | 0 | 3201 | 38687 | 0 | 69886.0 | 131072.0 | 0.0 | 45669.0 | 64 | 0x7fd2fe7f8ec0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 0.0 | 0 | 32768 | 65554.0 | 0.0 | 0.0 | 0.0 | 199001895083363 | 199001895098883 |