Todd tiantuo Li
587 lines
19 KiB
C++
587 lines
19 KiB
C++
/*
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Copyright (c) 2021 - 2022 Advanced Micro Devices, Inc. All rights reserved.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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/* Test Case Description:
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Scenario 3: The test validates if fine grain
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behavior is observed or not with memory allocated using malloc()
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Scenario 4: The test validates if coarse grain memory
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behavior is observed or not with memory allocated using malloc()
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Scenario 5: The test validates if fine memory
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behavior is observed or not with memory allocated using mmap()
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Scenario 6: The test validates if coarse grain memory
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behavior is observed or not with memory allocated using mmap()
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Scenario:7 Test Case Description: The following test checks if the memory is
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accessible when HIP_HOST_COHERENT is set to 0
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Scenario:8 Test Case Description: The following test checks if the memory
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exhibits fine grain behavior when HIP_HOST_COHERENT is set to 1
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*/
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#ifdef __linux__
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#include <hip_test_common.hh>
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#include <hip_test_features.hh>
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#include <unistd.h>
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#include <sys/mman.h>
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#include <sys/wait.h>
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#include <chrono>
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__global__ void CoherentTst(int *ptr, int PeakClk) {
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// Incrementing the value by 1
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int64_t GpuFrq = int64_t(PeakClk) * 1000;
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int64_t StrtTck = clock64();
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atomicAdd(ptr, 1);
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// The following while loop checks the value in ptr for around 3-4 seconds
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while ((clock64() - StrtTck) <= (3 * GpuFrq)) {
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if (atomicCAS(ptr, 3, 4) == 3) break;
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}
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}
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__global__ void CoherentTst_gfx11(int *ptr, int PeakClk) {
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#if HT_AMD
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// Incrementing the value by 1
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int64_t GpuFrq = int64_t(PeakClk) * 1000;
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int64_t StrtTck = wall_clock64();
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atomicAdd(ptr, 1);
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// The following while loop checks the value in ptr for around 3-4 seconds
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while ((wall_clock64() - StrtTck) <= (3 * GpuFrq)) {
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if (atomicCAS(ptr, 3, 4) == 3) break;
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}
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#endif
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}
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__global__ void SquareKrnl(int *ptr) {
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// ptr value squared here
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*ptr = (*ptr) * (*ptr);
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}
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// The variable below will work as signal to decide pass/fail
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static bool YES_COHERENT = false;
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// The function tests the coherency of allocated memory
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static void TstCoherency(int *Ptr, bool HmmMem) {
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int *Dptr = nullptr, peak_clk;
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hipStream_t strm;
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HIP_CHECK(hipStreamCreate(&strm));
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// storing value 1 in the memory created above
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*Ptr = 1;
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// Getting gpu frequency
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if (IsGfx11()) {
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HIPCHECK(hipDeviceGetAttribute(&peak_clk,
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hipDeviceAttributeWallClockRate, 0));
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} else {
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HIPCHECK(hipDeviceGetAttribute(&peak_clk,
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hipDeviceAttributeClockRate, 0));
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}
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if (!HmmMem) {
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HIP_CHECK(hipHostGetDevicePointer(reinterpret_cast<void **>(&Dptr),
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Ptr, 0));
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if (IsGfx11()) {
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CoherentTst_gfx11<<<1, 1, 0, strm>>>(Dptr, peak_clk);
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} else {
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CoherentTst<<<1, 1, 0, strm>>>(Dptr, peak_clk);
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}
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} else {
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if (IsGfx11()) {
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CoherentTst_gfx11<<<1, 1, 0, strm>>>(Ptr, peak_clk);
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} else {
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CoherentTst<<<1, 1, 0, strm>>>(Ptr, peak_clk);
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}
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}
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// looping until the value is 2 for 3 seconds
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std::chrono::steady_clock::time_point start =
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std::chrono::steady_clock::now();
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while (std::chrono::duration_cast<std::chrono::seconds>(
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std::chrono::steady_clock::now() - start).count() < 3) {
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if (*Ptr == 2) {
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*Ptr += 1;
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break;
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}
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}
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HIP_CHECK(hipStreamSynchronize(strm));
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HIP_CHECK(hipStreamDestroy(strm));
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if (*Ptr == 4) {
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YES_COHERENT = true;
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}
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}
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/* Test case description: The following test validates if fine grain
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behavior is observed or not with memory allocated using malloc()*/
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// The following test is failing on Nvidia platform hence disabled it for now
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#if HT_AMD
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TEST_CASE("Unit_malloc_CoherentTst") {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "xnack+");
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if (p) {
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// Test Case execution begins from here
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int managed = 0;
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HIPCHECK(hipDeviceGetAttribute(&managed, hipDeviceAttributeManagedMemory,
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0));
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if (managed == 1) {
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int *Ptr = nullptr, SIZE = sizeof(int);
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bool HmmMem = true;
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YES_COHERENT = false;
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// Allocating hipMallocManaged() memory
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Ptr = reinterpret_cast<int*>(malloc(SIZE));
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TstCoherency(Ptr, HmmMem);
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free(Ptr);
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REQUIRE(YES_COHERENT);
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}
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} else {
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HipTest::HIP_SKIP_TEST("GPU is not xnack enabled hence skipping the test...\n");
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}
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}
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#endif
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/* Test case description: The following test validates if coarse grain memory
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behavior is observed or not with memory allocated using malloc()*/
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// The following test is failing on Nvidia platform hence disabling it for now
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#if HT_AMD
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TEST_CASE("Unit_malloc_CoherentTstWthAdvise") {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "xnack+");
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if (p) {
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int managed = 0;
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HIP_CHECK(hipDeviceGetAttribute(&managed, hipDeviceAttributeManagedMemory,
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0));
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if (managed == 1) {
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int *Ptr = nullptr, SIZE = sizeof(int);
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YES_COHERENT = false;
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// Allocating hipMallocManaged() memory
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Ptr = reinterpret_cast<int*>(malloc(SIZE));
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*Ptr = 4;
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hipStream_t strm;
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HIP_CHECK(hipStreamCreate(&strm));
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SquareKrnl<<<1, 1, 0, strm>>>(Ptr);
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HIP_CHECK(hipStreamSynchronize(strm));
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HIP_CHECK(hipStreamDestroy(strm));
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REQUIRE (*Ptr == 16);
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}
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} else {
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HipTest::HIP_SKIP_TEST("GPU is not xnack enabled hence skipping the test...\n");
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}
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}
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#endif
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/* Test case description: The following test validates if fine memory
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behavior is observed or not with memory allocated using mmap()*/
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// The following test is failing on Nvidia platform hence disabling it for now
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#if HT_AMD
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TEST_CASE("Unit_mmap_CoherentTst") {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "xnack+");
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if (p) {
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int managed = 0;
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HIP_CHECK(hipDeviceGetAttribute(&managed, hipDeviceAttributeManagedMemory,
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0));
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if (managed == 1) {
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bool HmmMem = true;
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int *Ptr = reinterpret_cast<int*>(mmap(NULL, sizeof(int),
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PROT_READ | PROT_WRITE,
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MAP_PRIVATE | MAP_ANONYMOUS, 0, 0));
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if (Ptr == MAP_FAILED) {
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WARN("Mapping Failed\n");
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REQUIRE(false);
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}
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// Initializing the value with 1
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*Ptr = 1;
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TstCoherency(Ptr, HmmMem);
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int err = munmap(Ptr, sizeof(int));
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if (err != 0) {
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WARN("munmap failed\n");
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}
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REQUIRE(YES_COHERENT);
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}
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} else {
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HipTest::HIP_SKIP_TEST("GPU is not xnack enabled hence skipping the test...\n");
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}
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}
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#endif
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/* Test case description: The following test validates if coarse grain memory
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behavior is observed or not with memory allocated using mmap()*/
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// The following test is failing on Nvidia platform hence disabling it for now
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#if HT_AMD
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TEST_CASE("Unit_mmap_CoherentTstWthAdvise") {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "xnack+");
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if (p) {
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int managed = 0;
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HIP_CHECK(hipDeviceGetAttribute(&managed, hipDeviceAttributeManagedMemory,
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0));
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if (managed == 1) {
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int SIZE = sizeof(int);
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int *Ptr = reinterpret_cast<int*>(mmap(NULL, SIZE,
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PROT_READ | PROT_WRITE,
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MAP_PRIVATE | MAP_ANONYMOUS, 0, 0));
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if (Ptr == MAP_FAILED) {
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WARN("Mapping Failed\n");
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REQUIRE(false);
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}
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HIP_CHECK(hipMemAdvise(Ptr, SIZE, hipMemAdviseSetCoarseGrain, 0));
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// Initializing the value with 9
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*Ptr = 9;
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hipStream_t strm;
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HIP_CHECK(hipStreamCreate(&strm));
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SquareKrnl<<<1, 1, 0, strm>>>(Ptr);
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HIP_CHECK(hipStreamSynchronize(strm));
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bool IfTstPassed = false;
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if (*Ptr == 81) {
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IfTstPassed = true;
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}
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int err = munmap(Ptr, SIZE);
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if (err != 0) {
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WARN("munmap failed\n");
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}
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REQUIRE(IfTstPassed);
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}
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} else {
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HipTest::HIP_SKIP_TEST("GPU is not xnack enabled hence skipping the test...\n");
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}
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}
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#endif
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/* Test Case Description: The following test checks if the memory is
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accessible when HIP_HOST_COHERENT is set to 0*/
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// The following test is AMD specific test hence skipping for Nvidia
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg1") {
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if ((setenv("HIP_HOST_COHERENT", "0", 1)) != 0) {
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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if (fork() == 0) {
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int *Ptr = nullptr, *PtrD = nullptr, SIZE = sizeof(int);
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocPortable));
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*Ptr = 4;
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hipStream_t strm;
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HIP_CHECK(hipStreamCreate(&strm));
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HIP_CHECK(hipHostGetDevicePointer(reinterpret_cast<void**>(&PtrD), Ptr, 0));
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SquareKrnl<<<1, 1, 0, strm>>>(PtrD);
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HIP_CHECK(hipStreamSynchronize(strm));
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HIP_CHECK(hipStreamDestroy(strm));
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if (*Ptr == 16) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else {
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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}
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}
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#endif
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/* Test Case Description: The following test checks if the memory is
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accessible when HIP_HOST_COHERENT is set to 0*/
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// The following test is AMD specific test hence skipping for Nvidia
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg2") {
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if ((setenv("HIP_HOST_COHERENT", "0", 1)) != 0) {
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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if (fork() == 0) {
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int *Ptr = nullptr, *PtrD = nullptr, SIZE = sizeof(int);
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocWriteCombined));
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*Ptr = 4;
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hipStream_t strm;
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HIP_CHECK(hipStreamCreate(&strm));
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HIP_CHECK(hipHostGetDevicePointer(reinterpret_cast<void**>(&PtrD), Ptr, 0));
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SquareKrnl<<<1, 1, 0, strm>>>(PtrD);
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HIP_CHECK(hipStreamSynchronize(strm));
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HIP_CHECK(hipStreamDestroy(strm));
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if (*Ptr == 16) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else {
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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}
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}
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#endif
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/* Test Case Description: The following test checks if the memory is
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accessible when HIP_HOST_COHERENT is set to 0*/
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// The following test is AMD specific test hence skipping for Nvidia
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg3") {
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if ((setenv("HIP_HOST_COHERENT", "0", 1)) != 0) {
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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if (fork() == 0) {
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int *Ptr = nullptr, *PtrD = nullptr, SIZE = sizeof(int);
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocNumaUser));
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*Ptr = 4;
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hipStream_t strm;
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HIP_CHECK(hipStreamCreate(&strm));
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HIP_CHECK(hipHostGetDevicePointer(reinterpret_cast<void**>(&PtrD), Ptr, 0));
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SquareKrnl<<<1, 1, 0, strm>>>(PtrD);
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HIP_CHECK(hipStreamSynchronize(strm));
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HIP_CHECK(hipStreamDestroy(strm));
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if (*Ptr == 16) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else {
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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}
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}
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#endif
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/* Test Case Description: The following test checks if the memory is
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accessible when HIP_HOST_COHERENT is set to 0*/
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// The following test is AMD specific test hence skipping for Nvidia
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg4") {
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if ((setenv("HIP_HOST_COHERENT", "0", 1)) != 0) {
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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if (fork() == 0) {
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int *Ptr = nullptr, *PtrD = nullptr, SIZE = sizeof(int);
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocNonCoherent));
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*Ptr = 4;
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hipStream_t strm;
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HIP_CHECK(hipStreamCreate(&strm));
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HIP_CHECK(hipHostGetDevicePointer(reinterpret_cast<void**>(&PtrD), Ptr, 0));
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SquareKrnl<<<1, 1, 0, strm>>>(PtrD);
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HIP_CHECK(hipStreamSynchronize(strm));
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HIP_CHECK(hipStreamDestroy(strm));
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if (*Ptr == 16) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else {
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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}
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}
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#endif
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/* Test Case Description: The following test checks if the memory exhibits
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fine grain behavior when HIP_HOST_COHERENT is set to 1*/
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// The following test is AMD specific test hence skipping for Nvidia
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv1") {
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if ((setenv("HIP_HOST_COHERENT", "1", 1)) != 0) {
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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if (fork() == 0) { // child process
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int *Ptr = nullptr, SIZE = sizeof(int);
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bool HmmMem = false;
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE));
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*Ptr = 4;
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TstCoherency(Ptr, HmmMem);
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if (YES_COHERENT) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else { // parent process
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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}
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}
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#endif
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/* Test Case Description: The following test checks if the memory exhibits
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fine grain behavior when HIP_HOST_COHERENT is set to 1*/
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// The following test is AMD specific test hence skipping for Nvidia
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv1Flg1") {
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if ((setenv("HIP_HOST_COHERENT", "1", 1)) != 0) {
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
|
|
REQUIRE(false);
|
|
}
|
|
int stat = 0;
|
|
|
|
if (fork() == 0) { // child process
|
|
int *Ptr = nullptr, SIZE = sizeof(int);
|
|
bool HmmMem = false;
|
|
YES_COHERENT = false;
|
|
// Allocating hipHostMalloc() memory
|
|
HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocPortable));
|
|
*Ptr = 1;
|
|
TstCoherency(Ptr, HmmMem);
|
|
if (YES_COHERENT) {
|
|
// exit() with code 10 which indicates pass
|
|
HIP_CHECK(hipHostFree(Ptr));
|
|
exit(10);
|
|
} else {
|
|
// exit() with code 9 which indicates fail
|
|
HIP_CHECK(hipHostFree(Ptr));
|
|
exit(9);
|
|
}
|
|
} else { // parent process
|
|
wait(&stat);
|
|
int Result = WEXITSTATUS(stat);
|
|
if (Result != 10) {
|
|
REQUIRE(false);
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/* Test Case Description: The following test checks if the memory exhibits
|
|
fine grain behavior when HIP_HOST_COHERENT is set to 1*/
|
|
// The following test is AMD specific test hence skipping for Nvidia
|
|
#if HT_AMD
|
|
TEST_CASE("Unit_hipHostMalloc_WthEnv1Flg2") {
|
|
if ((setenv("HIP_HOST_COHERENT", "1", 1)) != 0) {
|
|
WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
|
|
REQUIRE(false);
|
|
}
|
|
int stat = 0;
|
|
|
|
if (fork() == 0) { // child process
|
|
int *Ptr = nullptr, SIZE = sizeof(int);
|
|
bool HmmMem = false;
|
|
YES_COHERENT = false;
|
|
// Allocating hipHostMalloc() memory
|
|
HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocWriteCombined));
|
|
*Ptr = 4;
|
|
TstCoherency(Ptr, HmmMem);
|
|
if (YES_COHERENT) {
|
|
// exit() with code 10 which indicates pass
|
|
HIP_CHECK(hipHostFree(Ptr));
|
|
exit(10);
|
|
} else {
|
|
// exit() with code 9 which indicates fail
|
|
HIP_CHECK(hipHostFree(Ptr));
|
|
exit(9);
|
|
}
|
|
} else { // parent process
|
|
wait(&stat);
|
|
int Result = WEXITSTATUS(stat);
|
|
if (Result != 10) {
|
|
REQUIRE(false);
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/* Test Case Description: The following test checks if the memory exhibits
|
|
fine grain behavior when HIP_HOST_COHERENT is set to 1*/
|
|
// The following test is AMD specific test hence skipping for Nvidia
|
|
#if HT_AMD
|
|
TEST_CASE("Unit_hipHostMalloc_WthEnv1Flg3") {
|
|
if ((setenv("HIP_HOST_COHERENT", "1", 1)) != 0) {
|
|
WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
|
|
REQUIRE(false);
|
|
}
|
|
int stat = 0;
|
|
|
|
if (fork() == 0) { // child process
|
|
int *Ptr = nullptr, SIZE = sizeof(int);
|
|
bool HmmMem = false;
|
|
YES_COHERENT = false;
|
|
// Allocating hipHostMalloc() memory
|
|
HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocNumaUser));
|
|
*Ptr = 1;
|
|
TstCoherency(Ptr, HmmMem);
|
|
if (YES_COHERENT) {
|
|
// exit() with code 10 which indicates pass
|
|
HIP_CHECK(hipHostFree(Ptr));
|
|
exit(10);
|
|
} else {
|
|
// exit() with code 9 which indicates fail
|
|
HIP_CHECK(hipHostFree(Ptr));
|
|
exit(9);
|
|
}
|
|
} else { // parent process
|
|
wait(&stat);
|
|
int Result = WEXITSTATUS(stat);
|
|
if (Result != 10) {
|
|
REQUIRE(false);
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
#endif
|