0150ab8682
* AHTS-90 - Add missing test case for hipStreamCreate * Update hipStreamGetFlags testing * Added testing for hipStreamSynchronize * Added macro to test a particular error code is returned from an expression * Update hip_test_common.hh * Correcting checkers to properly list the test count * fix copy paste error in HIP_CHECK_ERROR * Add support for hipStreamWaitValue * Remove changes unrelated to this PR * Revert "Added testing for hipStreamSynchronize" * Remove changes unrelated to this PR * Added skip test for failure on AMD devices and removed changed to hip_test_common.hh * Fixed build issues on Nvidia platforms by disabled incompatible tests; Updated negative tests to check the correct return values Co-authored-by: Jatin Chaudhary <jatin.chaudhary@codeplay.com> Co-authored-by: Fábio Mestre <fabio.mestre@codeplay.com> Co-authored-by: Finlay Marno <finlay.marno@codeplay.com> Co-authored-by: Fábio <fabio.m.mestre@gmail.com>
446 wiersze
19 KiB
C++
446 wiersze
19 KiB
C++
/*
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Copyright (c) 2022 Advanced Micro Devices, Inc. All rights reserved.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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#include <hip_test_common.hh>
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constexpr unsigned int writeFlag = 0;
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#define DEFINE_HIP_STREAM_VALUE(TYPE, BITS, ...) hipStream##TYPE##Value##BITS(__VA_ARGS__)
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#define CHECK_HIP_STREAM_VALUE(TYPE, BITS, ...) \
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HIP_CHECK(DEFINE_HIP_STREAM_VALUE(TYPE, BITS, __VA_ARGS__));
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#define NEG_TEST_ERROR_CHECK(TYPE, BITS, errorCode, ...) \
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HIP_CHECK_ERROR(DEFINE_HIP_STREAM_VALUE(TYPE, BITS, __VA_ARGS__), errorCode);
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#if HT_AMD
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// Random predefiend 32 and 64 bit values
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constexpr uint32_t value32 = 0x70F0F0FF;
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constexpr uint64_t value64 = 0x7FFF0000FFFF0000;
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constexpr uint32_t DATA_INIT = 0x1234;
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constexpr uint32_t DATA_UPDATE = 0X4321;
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template <typename intT> struct TEST_WAIT {
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using uintT = typename std::make_unsigned<intT>::type;
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int compareOp;
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uintT mask;
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uintT waitValue;
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intT signalValueFail;
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intT signalValuePass;
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TEST_WAIT(int compareOp, uintT waitValue, intT signalValueFail, intT signalValuePass)
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: compareOp{compareOp},
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waitValue{waitValue},
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signalValueFail{signalValueFail},
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signalValuePass{signalValuePass} {
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mask = static_cast<uintT>(0xFFFFFFFFFFFFFFFF);
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}
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TEST_WAIT(int compareOp, uintT mask, uintT waitValue, intT signalValueFail, intT signalValuePass)
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: compareOp{compareOp},
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mask{mask},
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waitValue{waitValue},
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signalValueFail{signalValueFail},
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signalValuePass{signalValuePass} {}
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};
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typedef TEST_WAIT<int32_t> TEST_WAIT32;
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typedef TEST_WAIT<int64_t> TEST_WAIT64;
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bool streamWaitValueSupported() {
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int device_num = 0;
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HIP_CHECK(hipGetDeviceCount(&device_num));
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int waitValueSupport;
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for (int device_id = 0; device_id < device_num; ++device_id) {
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HIP_CHECK(hipSetDevice(device_id));
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waitValueSupport = 0;
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HIP_CHECK(hipDeviceGetAttribute(&waitValueSupport, hipDeviceAttributeCanUseStreamWaitValue,
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device_id));
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if (waitValueSupport == 1) return true;
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}
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return false;
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}
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// hipStreamWriteValue Tests
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TEST_CASE("Unit_hipStreamValue_Write") {
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int64_t* signalPtr;
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hipStream_t stream{nullptr};
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HIP_CHECK(hipStreamCreate(&stream));
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// Allocate Host Memory
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auto hostPtr64 = std::unique_ptr<uint64_t>(new uint64_t(1));
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auto hostPtr32 = std::unique_ptr<uint32_t>(new uint32_t(1));
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// Register Host Memory
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HIP_CHECK(hipHostRegister(hostPtr64.get(), sizeof(int64_t), 0));
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HIP_CHECK(hipHostRegister(hostPtr32.get(), sizeof(int32_t), 0));
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// Register Signal Memory
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HIP_CHECK(hipExtMallocWithFlags((void**)&signalPtr, 8, hipMallocSignalMemory));
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// Initialise Data
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*signalPtr = 0x0;
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*hostPtr64 = 0x0;
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*hostPtr32 = 0x0;
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SECTION("Registered host memory hipStreamWriteValue32") {
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INFO("Test writting to registered host pointer using hipStreamWriteValue32");
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HIP_CHECK(hipStreamWriteValue32(stream, hostPtr32.get(), value32, writeFlag));
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HIP_CHECK(hipStreamSynchronize(stream));
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HIP_ASSERT(*hostPtr32 == value32);
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}
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SECTION("Registered host memory hipStreamWriteValue64") {
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INFO("Test writting to registered host pointer using hipStreamWriteValue32");
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HIP_CHECK(hipStreamWriteValue64(stream, hostPtr64.get(), value64, writeFlag));
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HIP_CHECK(hipStreamSynchronize(stream));
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HIP_ASSERT(*hostPtr64 == value64);
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}
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// Test writting device pointer
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void* devicePtr64;
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void* devicePtr32;
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HIP_CHECK(hipHostGetDevicePointer((void**)&devicePtr64, hostPtr64.get(), 0));
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HIP_CHECK(hipHostGetDevicePointer((void**)&devicePtr32, hostPtr32.get(), 0));
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// Reset values
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*hostPtr64 = 0x0;
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*hostPtr32 = 0x0;
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SECTION("Device Memory hipStreamWriteValue32") {
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INFO("Test writting to device pointer using hipStreamWriteValue32");
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HIP_CHECK(hipStreamWriteValue32(stream, devicePtr32, value32, writeFlag));
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HIP_CHECK(hipStreamSynchronize(stream));
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HIP_ASSERT(*hostPtr32 == value32);
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}
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SECTION("Device Memory hipStreamWriteValue64") {
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INFO("Test writting to device pointer using hipStreamWriteValue64");
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HIP_CHECK(hipStreamWriteValue64(stream, devicePtr64, value64, writeFlag));
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HIP_CHECK(hipStreamSynchronize(stream));
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HIP_ASSERT(*hostPtr64 == value64);
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}
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// Test Writing to Signal Memory
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SECTION("Signal Memory hipStreamWriteValue64") {
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INFO("Test writting to signal memory using hipStreamWriteValue64");
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HIP_CHECK(hipStreamWriteValue64(stream, signalPtr, value64, writeFlag));
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HIP_CHECK(hipStreamSynchronize(stream));
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HIP_ASSERT(*signalPtr == value64);
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}
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// Cleanup
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HIP_CHECK(hipStreamDestroy(stream));
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HIP_CHECK(hipHostUnregister(hostPtr64.get()));
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HIP_CHECK(hipHostUnregister(hostPtr32.get()));
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HIP_CHECK(hipFree(signalPtr));
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}
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// hipStreamWaitValue Tests
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template <bool isBlocking, typename intT, typename TEST_T>
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void initData(intT* dataPtr, int64_t* signalPtr, TEST_T tc, std::vector<hipEvent_t>& events) {
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// Initialize memory to be waited on
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*signalPtr = isBlocking ? tc.signalValueFail : tc.signalValuePass;
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// Initialize host pointers
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dataPtr[0] = DATA_INIT;
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dataPtr[1] = DATA_INIT;
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hipEvent_t firstWriteEvent{nullptr};
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hipEvent_t secondWriteEvent{nullptr};
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HIP_CHECK(hipEventCreate(&firstWriteEvent));
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HIP_CHECK(hipEventCreate(&secondWriteEvent));
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events.push_back(firstWriteEvent);
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events.push_back(secondWriteEvent);
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}
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template <bool isBlocking, typename intT, typename TEST_T>
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void syncAndCheckData(hipStream_t stream, intT* dataPtr, int64_t* signalPtr, TEST_T tc,
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std::vector<hipEvent_t>& events) {
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// Ensure first part of host memory is updated
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HIP_CHECK(hipStreamWaitEvent(stream, events[0], 0));
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HIP_ASSERT(dataPtr[0] == DATA_UPDATE);
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if (isBlocking) {
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// Ensure second part of host memory isn't updated yet
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HIP_ASSERT(hipEventQuery(events[1]) == hipErrorNotReady);
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HIP_ASSERT(dataPtr[1] == DATA_INIT);
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// Update value to release stream
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*signalPtr = tc.signalValuePass;
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}
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HIP_CHECK(hipStreamSynchronize(stream));
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HIP_ASSERT(hipEventQuery(events[1]) == hipSuccess);
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// Finally ensure that second part of host memory is updated
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HIP_ASSERT(dataPtr[1] == DATA_UPDATE);
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}
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template <typename intT> void cleanup(hipStream_t& stream, intT* dataPtr, int64_t* signalPtr) {
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// Cleanup
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HIP_CHECK(hipFree(signalPtr));
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HIP_CHECK(hipHostUnregister(dataPtr));
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HIP_CHECK(hipStreamDestroy(stream));
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}
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template <typename intT, bool isBlocking, typename TEST_T> void testWait(TEST_T tc) {
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if (!streamWaitValueSupported()) {
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UNSCOPED_INFO(" hipStreamWaitValue: not supported on this device , skipping ...");
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return;
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}
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// Initialize stream
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hipStream_t stream{nullptr};
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HIP_CHECK(hipStreamCreate(&stream));
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// Allocate Host Memory
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std::unique_ptr<intT> dataPtr(new intT(2));
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// Register Host Memory
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HIP_CHECK(hipHostRegister(&(dataPtr.get()[0]), sizeof(intT), 0));
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HIP_CHECK(hipHostRegister(&(dataPtr.get()[1]), sizeof(intT), 0));
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// Allocate Signal Memory
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int64_t* signalPtr;
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HIP_CHECK(hipExtMallocWithFlags((void**)&signalPtr, 8, hipMallocSignalMemory));
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std::vector<hipEvent_t> events;
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initData<isBlocking>(dataPtr.get(), signalPtr, tc, events);
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if (std::is_same<intT, int32_t>::value) {
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CHECK_HIP_STREAM_VALUE(Write, 32, stream, &(dataPtr.get()[0]), DATA_UPDATE, writeFlag)
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HIP_CHECK(hipEventRecord(events[0], stream));
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if (static_cast<uint32_t>(tc.mask) != 0xFFFFFFFF) {
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CHECK_HIP_STREAM_VALUE(Wait, 32, stream, signalPtr, static_cast<uint32_t>(tc.waitValue),
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tc.compareOp, static_cast<uint32_t>(tc.mask));
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} else {
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CHECK_HIP_STREAM_VALUE(Wait, 32, stream, signalPtr, tc.waitValue, tc.compareOp);
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}
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CHECK_HIP_STREAM_VALUE(Write, 32, stream, &(dataPtr.get()[1]), DATA_UPDATE, writeFlag)
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} else {
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CHECK_HIP_STREAM_VALUE(Write, 64, stream, &(dataPtr.get()[0]), DATA_UPDATE, writeFlag)
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HIP_CHECK(hipEventRecord(events[0], stream));
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if (tc.mask != 0xFFFFFFFFFFFFFFFF) {
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CHECK_HIP_STREAM_VALUE(Wait, 64, stream, signalPtr, tc.waitValue, tc.compareOp, tc.mask);
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} else {
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CHECK_HIP_STREAM_VALUE(Wait, 64, stream, signalPtr, tc.waitValue, tc.compareOp);
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}
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CHECK_HIP_STREAM_VALUE(Write, 64, stream, &(dataPtr.get()[1]), DATA_UPDATE, writeFlag)
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}
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HIP_CHECK(hipEventRecord(events[1], stream));
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syncAndCheckData<isBlocking>(stream, dataPtr.get(), signalPtr, tc, events);
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cleanup(stream, dataPtr.get(), signalPtr);
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}
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#undef CHECK_HIP_STREAM_VALUE
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#define DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32(suffix, test_t) \
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TEST_CASE("Unit_hipStreamValue_Wait32_Blocking_" + std::string(suffix)) { \
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testWait<int32_t, true>(test_t); \
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} \
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TEST_CASE("Unit_hipStreamValue_Wait32_NonBlocking_" + std::string(suffix)) { \
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testWait<int32_t, false>(test_t); \
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}
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// Using Mask
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("Mask_Gte_1",
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TEST_WAIT64( // mask will ignore few MSB bits
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hipStreamWaitValueGte, 0x0000FFFFFFFFFFFF,
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0x000000007FFF0001, 0x7FFF00007FFF0000,
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0x000000007FFF0001))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("Mask_Gte_2",
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TEST_WAIT64(hipStreamWaitValueGte, 0xF, 0x4, 0x3, 0x6))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("Mask_Eq_1",
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TEST_WAIT64( // mask will ignore few MSB bits
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hipStreamWaitValueEq, 0x0000FFFFFFFFFFFF,
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0x000000000FFF0001, 0x7FFF00000FFF0000,
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0x7F0000000FFF0001))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("Mask_Eq_2",
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TEST_WAIT64(hipStreamWaitValueEq, 0xFF, 0x11, 0x25, 0x11))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("Mask_And",
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TEST_WAIT64( // mask will discard bits 8 to 11
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hipStreamWaitValueAnd, 0xFF, 0xF4A, 0xF35, 0X02))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("Mask_Nor_1",
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TEST_WAIT64( // mask is set to ignore the sign bit.
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hipStreamWaitValueNor, 0x7FFFFFFFFFFFFFFF,
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0x7FFFFFFFFFFFF247, 0x7FFFFFFFFFFFFdbd,
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0x7FFFFFFFFFFFFdb5))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("Mask_Nor_2",
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TEST_WAIT64( // mask is set to apply NOR for bits 0 to 3.
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hipStreamWaitValueNor, 0xF, 0x7E, 0x7D, 0x76))
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// Not Using Mask
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("NoMask_Eq",
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TEST_WAIT32(hipStreamWaitValueEq, 0x7FFFFFFF, 0x7FFF0000,
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0x7FFFFFFF))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("NoMask_Gte",
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TEST_WAIT32(hipStreamWaitValueGte, 0x7FFF0001, 0x7FFF0000,
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0x7FFF0010))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("NoMask_And",
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TEST_WAIT32(hipStreamWaitValueAnd, 0x70F0F0F0, 0x0F0F0F0F,
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0X1F0F0F0F))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32("NoMask_Nor",
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TEST_WAIT32(hipStreamWaitValueNor, 0x7AAAAAAA,
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static_cast<int32_t>(0x85555555),
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static_cast<int32_t>(0x9AAAAAAA)))
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#undef DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT32
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#define DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64(suffix, test_t) \
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TEST_CASE("Unit_hipStreamValue_Wait64_Blocking_" + std::string(suffix)) { \
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testWait<int64_t, true>(test_t); \
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} \
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TEST_CASE("Unit_hipStreamValue_Wait64_NonBlocking_" + std::string(suffix)) { \
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testWait<int64_t, false>(test_t); \
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}
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// Using Mask
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("Mask_Gte_1",
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TEST_WAIT64( // mask will ignore few MSB bits
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hipStreamWaitValueGte, 0x0000FFFFFFFFFFFF,
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0x000000007FFF0001, 0x7FFF00007FFF0000,
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0x000000007FFF0001))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("Mask_Gte_2",
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TEST_WAIT64(hipStreamWaitValueGte, 0xF, 0x4, 0x3, 0x6))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("Mask_Eq_1",
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TEST_WAIT64( // mask will ignore few MSB bits
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hipStreamWaitValueEq, 0x0000FFFFFFFFFFFF,
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0x000000000FFF0001, 0x7FFF00000FFF0000,
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0x7F0000000FFF0001))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("Mask_Eq_2",
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TEST_WAIT64(hipStreamWaitValueEq, 0xFF, 0x11, 0x25, 0x11))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("Mask_And",
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TEST_WAIT64( // mask will discard bits 8 to 11
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hipStreamWaitValueAnd, 0xFF, 0xF4A, 0xF35, 0X02))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("Mask_Nor_1",
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TEST_WAIT64( // mask is set to ignore the sign bit.
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hipStreamWaitValueNor, 0x7FFFFFFFFFFFFFFF,
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0x7FFFFFFFFFFFF247, 0x7FFFFFFFFFFFFdbd,
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0x7FFFFFFFFFFFFdb5))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("Mask_Nor_2",
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TEST_WAIT64( // mask is set to apply NOR for bits 0 to 3.
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hipStreamWaitValueNor, 0xF, 0x7E, 0x7D, 0x76))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("NoMask_Gte",
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TEST_WAIT64(hipStreamWaitValueGte, 0x7FFFFFFFFFFF0001,
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0x7FFFFFFFFFFF0000, 0x7FFFFFFFFFFF0001))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("NoMask_Eq",
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TEST_WAIT64(hipStreamWaitValueEq, 0x7FFFFFFFFFFFFFFF,
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0x7FFFFFFF0FFF0000, 0x7FFFFFFFFFFFFFFF))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("NoMask_And",
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TEST_WAIT64(hipStreamWaitValueAnd, 0x70F0F0F0F0F0F0F0,
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0x0F0F0F0F0F0F0F0F, 0X1F0F0F0F0F0F0F0F))
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DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64("NoMask_Nor",
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TEST_WAIT64(hipStreamWaitValueNor, 0x4724724747247247,
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static_cast<int64_t>(0xbddbddbdbddbddbd),
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static_cast<int64_t>(0xbddbddbdbddbddb3)))
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#undef DEFINE_STREAM_WAIT_VAL_TEST_CASES_INT64
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#endif
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// Negative Tests
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TEST_CASE("Unit_hipStreamValue_Negative_InvalidMemory") {
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#if HT_AMD
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HipTest::HIP_SKIP_TEST("EXSWCPHIPT-96");
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return;
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#endif
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hipStream_t stream{nullptr};
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HIP_CHECK(hipStreamCreate(&stream));
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REQUIRE(stream != nullptr);
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// Allocate Host Memory
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auto hostPtr32 = std::unique_ptr<uint32_t>(new uint32_t(1));
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auto hostPtr64 = std::unique_ptr<uint64_t>(new uint64_t(1));
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// Register Host Memory
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HIP_CHECK(hipHostRegister(hostPtr32.get(), sizeof(int32_t), 0));
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HIP_CHECK(hipHostRegister(hostPtr64.get(), sizeof(int64_t), 0));
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// Set dummy data
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*hostPtr64 = 0x0;
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*hostPtr32 = 0x0;
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auto compareOp = hipStreamWaitValueGte;
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// Memory pointer negative tests
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INFO("Testing Invalid Memory Pointer for hipStreamWriteValue32");
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NEG_TEST_ERROR_CHECK(Write, 32, hipErrorNotSupported, stream, nullptr, 0, writeFlag)
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INFO("Testing Invalid Memory Pointer for hipStreamWriteValue64");
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NEG_TEST_ERROR_CHECK(Write, 64, hipErrorNotSupported, stream, nullptr, 0, writeFlag)
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INFO("Testing Invalid Memory Pointer for hipStreamWaitValue32");
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NEG_TEST_ERROR_CHECK(Wait, 32, hipErrorNotSupported, stream, nullptr, 0, compareOp)
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INFO("Testing Invalid Memory Pointer for hipStreamWaitValue64");
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NEG_TEST_ERROR_CHECK(Wait, 64, hipErrorNotSupported, stream, nullptr, 0, compareOp)
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// Cleanup
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HIP_CHECK(hipHostUnregister(hostPtr32.get()));
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HIP_CHECK(hipHostUnregister(hostPtr64.get()));
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HIP_CHECK(hipStreamDestroy(stream));
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}
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TEST_CASE("Unit_hipStreamWaitValue_Negative_InvalidFlag") {
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#if HT_AMD
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HipTest::HIP_SKIP_TEST("EXSWCPHIPT-96");
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return;
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#endif
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hipStream_t stream{nullptr};
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HIP_CHECK(hipStreamCreate(&stream));
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REQUIRE(stream != nullptr);
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// Allocate Host Memory
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auto hostPtr32 = std::unique_ptr<uint32_t>(new uint32_t(1));
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auto hostPtr64 = std::unique_ptr<uint64_t>(new uint64_t(1));
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// Register Host Memory
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HIP_CHECK(hipHostRegister(hostPtr32.get(), sizeof(int32_t), 0));
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HIP_CHECK(hipHostRegister(hostPtr64.get(), sizeof(int64_t), 0));
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// Set dummy data
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*hostPtr64 = 0x0;
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*hostPtr32 = 0x0;
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/* EXSWCPHIPT-96 */
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INFO("Testing Invalid flag for hipStreamWaitValue32");
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NEG_TEST_ERROR_CHECK(Wait, 32, hipErrorNotSupported, stream, hostPtr32.get(), 0, -1)
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INFO("Testing Invalid flag for hipStreamWaitValue64");
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NEG_TEST_ERROR_CHECK(Wait, 64, hipErrorNotSupported, stream, hostPtr64.get(), 0, -1)
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// Cleanup
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HIP_CHECK(hipHostUnregister(hostPtr32.get()));
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HIP_CHECK(hipHostUnregister(hostPtr64.get()));
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HIP_CHECK(hipStreamDestroy(stream));
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}
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#undef NEG_TEST_ERROR_CHECK
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