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f8344154a0d3fabc448f259e2505e233a3c699e4
rocm-systems/projects/clr/rocclr
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Cronologia
Andryeyev, German f8344154a0 SWDEV-497841 - Enable memory manager by default (#149)
[ROCm/clr commit: a5c860f3b0]
2025-04-22 21:20:37 +05:30
..
cmake
SWDEV-523300 - Add the new option to build HIP (#179)
2025-04-22 21:05:04 +05:30
compiler/lib
SWDEV-503436 - Fix incorrect OptionGroup for FSanitize option
2024-12-20 10:14:51 -05:00
device
SWDEV-524612 - Consider "1" a truthy value for WGPMode (#187)
2025-04-17 11:50:07 +02:00
elf
SWDEV-509213 - make cmake_minimum_required consistent across clr (#51)
2025-04-15 15:23:41 +05:30
include
SWDEV-463865 - changed device,roc and pal namespaces to be nested under amd
2024-06-07 12:23:06 -04:00
os
SWDEV-502248 - Parse file path with space characters
2025-02-18 10:31:21 -05:00
platform
SWDEV-508538 - Optimize mem access and pack structure (#71)
2025-04-21 13:43:25 +05:30
thread
SWDEV-458943 - Add fast path in wait()
2025-01-28 12:19:55 -05:00
utils
SWDEV-497841 - Enable memory manager by default (#149)
2025-04-22 21:20:37 +05:30
.gitattributes
SWDEV-1 - fix line endings for .asm files
2021-08-22 23:56:08 -07:00
.gitignore
Add .gitignore file.
2020-02-18 11:09:50 -05:00
CMakeLists.txt
SWDEV-509213 - make cmake_minimum_required consistent across clr (#51)
2025-04-15 15:23:41 +05:30
LICENSE.txt
SWDEV-293742 - Update copyright end year VDI repo
2021-08-22 23:56:07 -07:00
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