BertanDogancay
40 lines
1.6 KiB
Plaintext
40 lines
1.6 KiB
Plaintext
/*************************************************************************
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* Copyright (c) 2015-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* See LICENSE.txt for license information
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************************************************************************/
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#include "device.h"
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#include "collectives.h"
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#include "common.h"
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__shared__ ncclShmemData ncclShmem;
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#if __CUDA_ARCH__ < 700
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__shared__ ulong2 ncclShmemPerWarp[ncclShmemScratchWarpSize()*(NCCL_MAX_NTHREADS/WARP_SIZE)/sizeof(ulong2)];
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#endif
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struct RunWorkNop {
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__device__ void run() {}
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};
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__launch_bounds__(NCCL_MAX_NTHREADS, 1) __global__ void ncclDevKernel_Generic(ncclDevKernelArgs4K NCCL_GRID_CONSTANT const args4K) {
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ncclKernelMain<-1, RunWorkNop, /*COLLTRACE*/false, /*Unroll*/2>(&args4K.args);
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}
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__launch_bounds__(NCCL_MAX_NTHREADS, 1) __global__ void ncclDevKernel_Generic_4(ncclDevKernelArgs4K NCCL_GRID_CONSTANT const args4K) {
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ncclKernelMain<-1, RunWorkNop, /*COLLTRACE*/false, /*Unroll*/4>(&args4K.args);
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}
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#ifdef ENABLE_COLLTRACE
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__launch_bounds__(NCCL_MAX_NTHREADS, 1) __global__ void ncclDevKernelDebug_Generic(ncclDevKernelArgs4K NCCL_GRID_CONSTANT const args4K) {
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ncclKernelMain<-1, RunWorkNop, /*COLLTRACE*/true, /*Unroll*/2>(&args4K.args);
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}
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__launch_bounds__(NCCL_MAX_NTHREADS, 1) __global__ void ncclDevKernelDebug_Generic_4(ncclDevKernelArgs4K NCCL_GRID_CONSTANT const args4K) {
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ncclKernelMain<-1, RunWorkNop, /*COLLTRACE*/true, /*Unroll*/4>(&args4K.args);
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}
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#endif
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#ifdef USE_INDIRECT_FUNCTION_CALL
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__device__ void ncclDevFunc_Nop();
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#else
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__device__ __attribute__((noinline)) void ncclDevFunc_Nop();
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#endif
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