vedithal-amd
f9aa7be97c
* Add MI 350 hardware information
* Refactor MI GPU YAML file and corresponding interface
* Add SoC file for gfx950 architecture
* Add analysis report configs for MI 350 containing existing metrics
* Add placeholder None valued metrics for previous architectures to make
baseline comparison work
* Enable testing on MI 350
* Analysis config metric changes
- SPI changes
- Update metric formula for default SPI pipe counter
- Use efficiently collected pipe wise SPI counters
- Add SPI Wave Occupancy
- Add Scheduler-Pipe Wave Utilization
- Update formula for VGPR Writes
- Add Scheduler-Pipe FIFO Full Rate
- CPC changes
- Add CPC SYNC FIFO Full Rate
- Add CPC CANE Stall Rate
- Add CPC ADC Utilization
- SQ changes
- Add VALU co-issue efficiency
- Add F6F4 datatype metrics
- Update formula for total FLOPs by adding F6F4 counters
- Add LDS STORE / LOAD / ATOMIC metrics
- Add LDS STORE / LOAD / ATOMIC bandwidth
- Add LDS FIFO and TA ADDR / CMD / DATA FIFO full rates
* Collect TCP_TCP_LATENCY_sum only for gfx950 (MI 350)
* Do not inject SQ_ACCUM_PREV_HIRES unnecesarily
* Do not hardcode memory and shader clock speeds
* Write num_hbm_channels to sysinfo.csv instead of hbm_bw while profiling
* Move generate sysinfo.csv to pre processing step of profiling
* Add warnings to use --specs-correction for missing sysinfo.csv values during analysis phase
* Update CHANGELOG
* Analysis phase warning to use --specs-correction when needed
106 lines
3.9 KiB
Python
106 lines
3.9 KiB
Python
##############################################################################bl
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# MIT License
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#
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# Copyright (c) 2021 - 2025 Advanced Micro Devices, Inc. All Rights Reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in all
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# copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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# SOFTWARE.
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##############################################################################el
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from pathlib import Path
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import config
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from rocprof_compute_soc.soc_base import OmniSoC_Base
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from roofline import Roofline
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from utils.logger import console_error, console_log, demarcate
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from utils.utils import mibench
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class gfx942_soc(OmniSoC_Base):
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def __init__(self, args, mspec):
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super().__init__(args, mspec)
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self.set_arch("gfx942")
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if hasattr(self.get_args(), "roof_only") and self.get_args().roof_only:
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self.set_perfmon_dir(
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str(
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Path(str(config.rocprof_compute_home)).joinpath(
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"rocprof_compute_soc",
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"profile_configs",
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"gfx940",
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"roofline",
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)
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)
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)
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self.set_compatible_profilers(["rocprofv1", "rocprofv2", "rocprofv3"])
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# Per IP block max number of simultaneous counters. GFX IP Blocks
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self.set_perfmon_config(
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{
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"SQ": 8,
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"TA": 2,
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"TD": 2,
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"TCP": 4,
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"TCC": 4,
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"CPC": 2,
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"CPF": 2,
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"SPI": 2,
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"GRBM": 2,
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"GDS": 4,
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}
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)
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self.roofline_obj = Roofline(args, self._mspec)
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# Set arch specific specs
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self._mspec._l2_banks = 16
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self._mspec.lds_banks_per_cu = 32
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self._mspec.pipes_per_gpu = 4
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# -----------------------
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# Required child methods
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# -----------------------
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@demarcate
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def profiling_setup(self):
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"""Perform any SoC-specific setup prior to profiling."""
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super().profiling_setup()
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# Performance counter filtering
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self.perfmon_filter(self.get_args().roof_only)
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@demarcate
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def post_profiling(self):
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"""Perform any SoC-specific post profiling activities."""
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super().post_profiling()
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if not self.get_args().no_roof:
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console_log(
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"roofline", "Checking for roofline.csv in " + str(self.get_args().path)
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)
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if not Path(self.get_args().path).joinpath("roofline.csv").is_file():
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mibench(self.get_args(), self._mspec)
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self.roofline_obj.post_processing()
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else:
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console_log("roofline", "Skipping roofline")
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@demarcate
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def analysis_setup(self, roofline_parameters=None):
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"""Perform any SoC-specific setup prior to analysis."""
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super().analysis_setup()
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# configure roofline for analysis
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if roofline_parameters:
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self.roofline_obj = Roofline(
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self.get_args(), self._mspec, roofline_parameters
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)
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