Elwazir, Ammar
fb6ec25d41
* Adding Integeration tests for later building option
* Update CMakeLists.txt
---------
Co-authored-by: Ammar ELWazir <aelwazir@amd.com>
[ROCm/aqlprofile commit: e4bb0df9d5]
579 строки
26 KiB
C++
579 строки
26 KiB
C++
// MIT License
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//
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// Copyright (c) 2017-2025 Advanced Micro Devices, Inc.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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#include "hsa/hsa_ext_amd.h"
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#include "aqlprofile-sdk/aql_profile_v2.h"
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#include <stdlib.h>
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#include <string>
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#include <thread>
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#include "ctrl/run_kernel.h"
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#include "pgen/test_pgen_pcsmp.h"
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#include "pgen/test_pgen_pmc.h"
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#include "pgen/test_pgen_spm.h"
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#include "pgen/test_pgen_sqtt.h"
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#include "simple_convolution/simple_convolution.h"
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const int argv_pmc_size = 32;
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unsigned argc_pmc = 0;
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char* argv_arr = NULL;
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char** argv_pmc = NULL;
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typedef struct {
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uint32_t size; // size of buffer in bytes
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uint32_t timeout;
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uint32_t len; // len of streamed data in spm buffer
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void* addr; // address of spm buffer
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bool data_loss; // OUT
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} spm_buffer_params_t;
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int gpu_node_id = -1;
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spm_buffer_params_t spm_buffer_params[2];
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std::atomic<uint32_t> spm_buffer_idx{0}; // current spm buffer in use for spm samples
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std::atomic<bool> spm_check_data{
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true}; // request to check spm data in spm_buffer at spm_buffer_idx
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std::atomic<bool> test_done{false}; // is GPU kernel finished?
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int get_gpu_node_id() {
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int gpu_node = -1;
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#if 0
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// find a valid gpu node from /sys/class/kfd/kfd/topology/nodes
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std::string path = "/sys/class/kfd/kfd/topology/nodes";
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DIR *dir;
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struct dirent *ent;
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if ((dir = opendir(path.c_str())) != NULL) {
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while ((ent = readdir(dir)) != NULL) {
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std::string dir = ent->d_name;
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if (dir.find_first_not_of("0123456789") == std::string::npos) {
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std::string file = path + "/" + ent->d_name + "/gpu_id";
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std::ifstream infile(file);
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int id;
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infile >> id;
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if (id != 0) {
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gpu_node = atoi(ent->d_name);
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break;
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}
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}
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}
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closedir(dir);
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}
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HsaSystemProperties m_SystemProperties;
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memset(&m_SystemProperties, 0, sizeof(m_SystemProperties));
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HSAKMT_STATUS status = hsaKmtAcquireSystemProperties(&m_SystemProperties);
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if (status != HSAKMT_STATUS_SUCCESS) {
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std::cerr << "Error in hsaKmtAcquireSystemProperties" << std::endl;
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return 1;
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}
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// tranverse all CPU and GPU nodes and break when a GPU node is found
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for (unsigned i = 0; i < m_SystemProperties.NumNodes; ++i) {
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HsaNodeProperties nodeProperties;
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memset(&nodeProperties, 0, sizeof(HsaNodeProperties));
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status = hsaKmtGetNodeProperties(i, &nodeProperties);
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if (status != HSAKMT_STATUS_SUCCESS) {
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std::cerr << "Error in hsaKmtAcquireSystemProperties" << std::endl;
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break;
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} else if (nodeProperties.NumFComputeCores) {
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gpu_node = i;
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break;
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}
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}
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#endif
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printf("GPU node id(%d)\n", gpu_node);
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return gpu_node;
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}
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char** pmc_argv(unsigned argc, const hsa_ven_amd_aqlprofile_event_t* events) {
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if (argc > argc_pmc) {
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argc_pmc = argc;
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argv_arr = reinterpret_cast<char*>(realloc(argv_arr, argc_pmc * argv_pmc_size));
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if (argv_pmc) delete argv_pmc;
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argv_pmc = new char*[argc + 1];
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}
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for (unsigned i = 0; i < argc; ++i) {
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char* argv_ptr = argv_arr + (i * argv_pmc_size);
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snprintf(argv_ptr, argv_pmc_size, "%d:%d:%d", events[i].block_name, events[i].block_index,
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events[i].counter_id);
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argv_pmc[i] = argv_ptr;
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}
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argv_pmc[argc] = NULL;
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return argv_pmc;
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}
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typedef char** pf_pmc_argv(unsigned argc, const hsa_ven_amd_aqlprofile_event_t* events);
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void thread_kernel(bool* ret_val, pf_pmc_argv pmc_argv, int events_count,
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const hsa_ven_amd_aqlprofile_event_t* events) {
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*ret_val =
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RunKernel<simple_convolution, TestPGenSpm>(events_count, pmc_argv(events_count, events));
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test_done = true;
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}
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void thread_spm_buffer_setup() {
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#if ENABLE_SPM
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while (!test_done) {
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auto idx = (spm_buffer_idx.load() + 1) & 0x1;
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std::cout << "thread_spm_buffer_setup: " << idx << std::endl;
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hsa_status_t status =
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hsa_amd_spm_set_dest_buffer(gpu_node_id, spm_buffer_params[idx].size,
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&spm_buffer_params[idx].timeout, &spm_buffer_params[idx].len,
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spm_buffer_params[idx].addr, &spm_buffer_params[idx].data_loss);
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if (status != HSA_STATUS_SUCCESS) {
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std::cerr << "Error in initial spm setup of buffer 0" << std::endl;
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return;
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}
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// inform data saving thread there is spm data to save
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if (spm_buffer_params[idx].len != 0) spm_check_data = true;
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}
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#endif
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std::cout << "Exiting thread_spm_buffer_setup ..." << std::endl;
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}
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void thread_spm_data_save(FILE* file) {
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while (!test_done) {
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if (spm_check_data) {
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auto buffer_idx = spm_buffer_idx.load();
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auto idx = buffer_idx & 0x1;
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std::cout << "thread_spm_data_save " << idx << " with " << spm_buffer_params[idx].len
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<< " bytes" << std::endl;
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fwrite(spm_buffer_params[idx].addr, 1, spm_buffer_params[idx].len, file);
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spm_buffer_idx = buffer_idx + 1;
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spm_check_data = false;
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}
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}
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std::cout << "Exiting thread_spm_data_save ..." << std::endl;
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}
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int main(int argc, char* argv[]) {
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bool ret_val = false;
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const bool pmc_enable = (getenv("AQLPROFILE_PMC") != NULL);
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const bool pmc_priv_enable = (getenv("AQLPROFILE_PMC_PRIV") != NULL);
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const bool sdma_enable = (getenv("AQLPROFILE_SDMA") != NULL);
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const bool sqtt_enable = (getenv("AQLPROFILE_SQTT") != NULL);
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const bool pcsmp_enable = (getenv("AQLPROFILE_PCSMP") != NULL);
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const bool scan_enable = (getenv("AQLPROFILE_SCAN") != NULL);
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const bool trace_enable = (getenv("AQLPROFILE_TRACE") != NULL);
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const bool spm_enable = (getenv("AQLPROFILE_SPM") != NULL);
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[[maybe_unused]] const bool spm_kfd_mode = (getenv("AQLPROFILE_SPM_KFD_MODE") != NULL);
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// int gpu_node_id = -1;
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int scan_step = 1;
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const char* step_env = getenv("AQLPROFILE_SCAN_STEP");
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if (step_env != NULL) {
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int step = atoi(step_env);
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if (step <= 0) {
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std::cerr << "Error in setting environment variable AQLPROFILE_SCAN_STEP=" << step_env
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<< ", it should be greater than or equal to 1." << std::endl;
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return 1;
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}
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scan_step = step;
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}
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if (!trace_enable) {
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std::clog.rdbuf(NULL);
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}
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if (scan_enable) {
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std::cerr.rdbuf(NULL);
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}
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//{
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// hsa_status_t status = hsa_init();
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// CHECK_STATUS("Error in hsa_init", status);
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//}
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if (spm_enable) {
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#if ENABLE_SPM
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{
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hsa_status_t status = hsa_init();
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CHECK_STATUS("Error in hsa_init", status);
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}
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gpu_node_id = get_gpu_node_id();
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if (gpu_node_id == -1) {
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std::cerr << "Error in get_gpu_node_id()" << std::endl;
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return 1;
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}
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if (spm_kfd_mode) {
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hsa_status_t status = hsa_amd_spm_acquire(gpu_node_id);
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if (status != HSA_STATUS_SUCCESS) {
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std::cerr << "Error in acquiring SPM for NodeId " << gpu_node_id << std::endl;
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return 1;
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}
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} else {
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#if SPM_DEBUG_TRAP
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HSAKMT_STATUS status = hsaKmtEnableDebugTrap(gpu_node_id, INVALID_QUEUEID);
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#else
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HSAKMT_STATUS status = HSAKMT_STATUS_ERROR;
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#endif
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if (status != HSAKMT_STATUS_SUCCESS) {
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std::cerr << "Error in enabling debug trap for NodeId " << gpu_node_id << std::endl;
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return 1;
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}
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}
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#endif
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}
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TestHsa::HsaInstantiate();
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const hsa_ven_amd_aqlprofile_event_t* events_arr;
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// Run simple convolution test
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if (pmc_enable) {
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if (argc > 1) {
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ret_val = RunKernel<simple_convolution, TestPGenPmc<RUN_MODE> >(argc - 1, argv + 1);
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} else if (!scan_enable) {
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int events_count = 0;
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if (TestHsa::HsaAgentName() == "gfx9") {
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const hsa_ven_amd_aqlprofile_event_t events_arr1[] = {
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 2 /*CYCLES*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 3 /*BUSY_CYCLES*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 4 /*WAVES*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 14 /*ITEMS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 47 /*WAVE_READY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCC, 2, 1 /*CYCLE*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCC, 2, 3 /*REQ*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCC, 2, 22 /*WRITEBACK*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_CPC, 0, 0 /*ALWAYS_COUNT*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_CPC, 0, 8 /*ME1_STALL_WAIT_ON_RCIU_READ*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 0}, /*CYCLE*/
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 2}, /*BANK0_PTE_CACHE_HITS*/
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 7}, /*PDE0_CACHE_REQS*/
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 8}, /*PDE0_CACHE_HITS*/
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 13}, /*BANK0_4K_PTE_CACHE_MISSES*/
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 14}, /*BANK0_BIGK_PTE_CACHE_HITS*/
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 15}, /*BANK0_BIGK_PTE_CACHE_MISSES*/
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATCL2, 0, 0}, /*CYCLE*/
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATCL2, 0, 2}, /*BANK0_REQUESTS*/
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};
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events_count = sizeof(events_arr1) / sizeof(hsa_ven_amd_aqlprofile_event_t);
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events_arr = events_arr1;
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} else if (TestHsa::HsaAgentName() == "gfx12") {
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const hsa_ven_amd_aqlprofile_event_t events_arr1[] = {
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_CHA, 0, 25 /*ALWAYS*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_CHA, 0, 0 /*BUSY*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_CHC, 0, 0 /*ALWAYS*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_CHC, 0, 1 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_CPC, 0, 0 /*ALWAYS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_CPC, 0, 25 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_CPF, 0, 0 /*ALWAYS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_CPF, 0, 24 /*BUSY*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_CPG, 0, 0 /*ALWAYS*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_CPG, 0, 51 /*BUSY*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_GC_UTCL2, 0, 1},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_GC_VML2, 0, 5},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GCEA, 0, 3},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GCEA, 0, 4},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GCR, 0, 6},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GCR, 0, 22},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GL2A, 0, 1 /*ALWAYS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GL2A, 0, 2 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GL2C, 0, 1 /*ALWAYS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GL2C, 0, 2 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GRBM, 0, 0 /*ALWAYS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GRBM, 0, 2 /*GUI_ACTIVE*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_RLC, 0, 2},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_RLC, 0, 5},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SDMA, 0, 0 /*ALWAYS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SDMA, 0, 2 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SDMA, 1, 0 /*ALWAYS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SDMA, 1, 2 /*BUSY*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_GC_UTCL1, 0, 1},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_GC_UTCL1, 0, 2},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_GCEA_SE, 0, 3},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_GCEA_SE, 0, 4},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_GRBMH, 0, 0 /*ALWAYS*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_GRBMH, 0, 19},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SPI, 0, 46 /*CSN_BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SPI, 0, 47 /*CSN_NUM_THREADGROUPS*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_SQG, 0,14 /*ALWAYS*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_SQG, 0, 15 /*BUSY*/},
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{(hsa_ven_amd_aqlprofile_block_name_t)AQLPROFILE_BLOCK_NAME_SQG, 0, 19 /*WAVES*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GL1A, 0, 21 /*ALWAYS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GL1A, 0, 0 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GL1C, 0, 0 /*ALWAYS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GL1C, 0, 1 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 2 /*ALWAYS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 3 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 4 /*WAVES*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TA, 0, 15 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TD, 0, 1 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCP, 0, 96 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCP, 0, 10 /*REQ_READ*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCP, 0, 14 /*REQ_WRITE*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCP, 1, 96 /*BUSY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCP, 1, 10 /*REQ_READ*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCP, 1, 14 /*REQ_WRITE*/},
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};
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events_count = sizeof(events_arr1) / sizeof(hsa_ven_amd_aqlprofile_event_t);
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events_arr = events_arr1;
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} else {
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const hsa_ven_amd_aqlprofile_event_t events_arr1[] = {
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 4 /*WAVES*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 14 /*ITEMS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 47 /*WAVE_READY*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCC, 2, 1 /*CYCLE*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCC, 2, 3 /*REQS*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCC, 2, 22 /*WRITEBACK*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_CPC, 0, 0 /*ALWAYS_COUNT*/},
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{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_CPC, 0, 8 /*ME1_STALL_WAIT_ON_RCIU_READ*/},
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};
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events_count = sizeof(events_arr1) / sizeof(hsa_ven_amd_aqlprofile_event_t);
|
|
events_arr = events_arr1;
|
|
}
|
|
ret_val = RunKernel<simple_convolution, TestPGenPmc<RUN_MODE> >(
|
|
events_count, pmc_argv(events_count, events_arr));
|
|
} else {
|
|
const int block_index_max = 16;
|
|
const int event_id_max = 128;
|
|
for (unsigned i = 0; i < AQLPROFILE_BLOCKS_NUMBER; ++i) {
|
|
for (unsigned j = 0; j < block_index_max; ++j) {
|
|
for (unsigned k = 0; k <= event_id_max; k += scan_step) {
|
|
fflush(stdout);
|
|
fprintf(stderr, " %d %d %d \r", i, j, k);
|
|
fflush(stderr);
|
|
hsa_ven_amd_aqlprofile_event_t event = {(hsa_ven_amd_aqlprofile_block_name_t)i, j, k};
|
|
if (!RunKernel<simple_convolution, TestPGenPmc<RUN_MODE> >(1, pmc_argv(1, &event))) {
|
|
if (k == 0) {
|
|
k = event_id_max + 1;
|
|
if (j == 0) j = block_index_max + 1;
|
|
}
|
|
continue;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
} else if (sdma_enable) {
|
|
int events_count = 0;
|
|
const hsa_ven_amd_aqlprofile_event_t events_sdma[] = {
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SDMA, 0, 17 /*MC_WR_COUNT*/},
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SDMA, 0, 19 /*MC_RD_COUNT*/},
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SDMA, 1, 17 /*MC_WR_COUNT*/},
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SDMA, 1, 19 /*MC_RD_COUNT*/},
|
|
};
|
|
events_count = sizeof(events_sdma) / sizeof(hsa_ven_amd_aqlprofile_event_t);
|
|
ret_val = RunKernel<simple_convolution, TestPGenPmc<SETUP_MODE> >(
|
|
events_count, pmc_argv(events_count, events_sdma));
|
|
} else if (pmc_priv_enable) {
|
|
int events_count = 0;
|
|
if (TestHsa::HsaAgentName() == "gfx9") {
|
|
const hsa_ven_amd_aqlprofile_event_t events_arr1[] = {
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 2}, /*BANK0_PTE_CACHE_HITS*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 7}, /*PDE0_CACHE_REQS*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 8}, /*PDE0_CACHE_HITS*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 13}, /*BANK0_4K_PTE_CACHE_MISSES*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 14}, /*BANK0_BIGK_PTE_CACHE_HITS*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 15}, /*BANK0_BIGK_PTE_CACHE_MISSES*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATCL2, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATCL2, 0, 2}, /**/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATC, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATC, 0, 2}, /**/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATC, 0, 7}, /**/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATC, 0, 8}, /**/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GCEA, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GCEA, 0, 2}, /*REQS_PER_CLIENT_GROUP*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_RPB, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_RPB, 0, 2}, /**/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_RPB, 0, 7}, /**/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_RPB, 0, 8}, /**/
|
|
};
|
|
events_count = sizeof(events_arr1) / sizeof(hsa_ven_amd_aqlprofile_event_t);
|
|
events_arr = events_arr1;
|
|
} else {
|
|
const hsa_ven_amd_aqlprofile_event_t events_arr1[] = {
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCVML2, 0, 2}, /*BANK0_PTE_CACHE_HITS*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCARB, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCARB, 0, 1}, /*CORRECTABLE_GECC_ERR_CNT_CHAN0*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCARB, 0, 2}, /*CORRECTABLE_GECC_ERR_CNT_CHAN1*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCARB, 0, 3}, /*UNCORRECTABLE_GECC_ERR_CNT_CHAN0*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCHUB, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCHUB, 0, 1}, /*ACPG_WRRET_VLD*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCHUB, 0, 2}, /*ACPO_WRRET_VLD*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCHUB, 0, 3}, /*IH_WRRET_VLD*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCXBAR, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCXBAR, 0, 1}, /**/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCXBAR, 0, 2}, /**/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCXBAR, 0, 3}, /**/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCMCBVM, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCMCBVM, 0, 1}, /*TLB0_REQS*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCMCBVM, 0, 2}, /*TLB0_HITS*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_MCMCBVM, 0, 3}, /*TLB0_MISSES*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATC, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATC, 0, 24}, /*ATCL2_L1_REQAS*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATC, 0, 25}, /*ATCL2_BANK0_REQS*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_ATC, 0, 26}, /*ATCL2_BANK0_HITS*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_RPB, 0, 0}, /*CYCLE*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_RPB, 0, 2}, /*RD_REQS_IN*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_RPB, 0, 7}, /*WR_REQ_QUEUE2_IN*/
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_RPB, 0, 8}, /*WR_REQ_QUEUE3_IN*/
|
|
};
|
|
events_count = sizeof(events_arr1) / sizeof(hsa_ven_amd_aqlprofile_event_t);
|
|
events_arr = events_arr1;
|
|
}
|
|
ret_val = RunKernel<simple_convolution, TestPGenPmc<RUN_MODE> >(
|
|
events_count, pmc_argv(events_count, events_arr));
|
|
} else if (sqtt_enable) {
|
|
ret_val = RunKernel<simple_convolution, TestPGenSqtt>(argc, argv);
|
|
} else if (pcsmp_enable && TestHsa::HsaAgentName().substr(0, 4) != "gfx1") {
|
|
ret_val = RunKernel<simple_convolution, TestPGenPcsmp>(argc, argv);
|
|
} else if (spm_enable) {
|
|
#ifdef ENABLE_SPM
|
|
int events_count = 0;
|
|
const hsa_ven_amd_aqlprofile_event_t events_spm[] = {
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 0 /*NONE*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 2 /*CYCLES*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 3 /*BUSY_CYCLES*/},
|
|
{HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 4 /*WAVES*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 14 /*ITEMS*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SQ, 0, 47 /*WAVE_READY*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_SPI, 0, 47 /*CSN_WINDOW_VALID*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TA, 0, 1 /*SH_FIFO_BUSY*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TD, 0, 1 /*TD_BUSY*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCC, 2, 3 /*REQ*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCC, 2, 22 /*WRITEBACK*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCC, 2, 1 /*CYCLE*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_TCP, 1, 2 /*CORE_REG_SCLK_VLD*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_CPC, 0, 0 /*ALWAYS_COUNT*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_CPF, 0, 0 /*ALWAYS_COUNT*/},
|
|
// {HSA_VEN_AMD_AQLPROFILE_BLOCK_NAME_GDS, 0, 0 /*DS_ADDR_CONFL*/},
|
|
};
|
|
events_count = sizeof(events_spm) / sizeof(hsa_ven_amd_aqlprofile_event_t);
|
|
|
|
if (spm_kfd_mode) {
|
|
// open a binary file for spm samples
|
|
const std::string spm_sample_file = "example.txt";
|
|
FILE* file = fopen(spm_sample_file.c_str(), "wb");
|
|
if (file == NULL) {
|
|
std::cerr << "Error opening file " << spm_sample_file << " for spm sampling!" << std::endl;
|
|
return 1;
|
|
}
|
|
|
|
// set up 2 spm sample data buffers
|
|
const uint32_t timeout = 10000;
|
|
const uint32_t spm_buffer_size = 0x2000000;
|
|
spm_buffer_params[0].size = spm_buffer_size;
|
|
spm_buffer_params[0].timeout = timeout;
|
|
spm_buffer_params[0].len = 0;
|
|
spm_buffer_params[0].addr = malloc(spm_buffer_size);
|
|
if (spm_buffer_params[0].addr == NULL) {
|
|
std::cerr << "Malloc(size) for spm buffer 0 Failed." << std::endl;
|
|
return 1;
|
|
}
|
|
spm_buffer_params[0].data_loss = false;
|
|
|
|
spm_buffer_params[1].size = spm_buffer_size;
|
|
spm_buffer_params[1].timeout = timeout;
|
|
spm_buffer_params[1].len = 0;
|
|
spm_buffer_params[1].addr = malloc(spm_buffer_size);
|
|
if (spm_buffer_params[1].addr == NULL) {
|
|
std::cerr << "Malloc(size) for spm buffer 1 Failed." << std::endl;
|
|
return 1;
|
|
}
|
|
spm_buffer_params[1].data_loss = false;
|
|
|
|
// non-blocking set up the first spm buffer for use before GPU kernel started
|
|
std::cout << "spm_buffer_setup 0 ..." << std::endl;
|
|
hsa_status_t status = hsa_amd_spm_set_dest_buffer(
|
|
gpu_node_id, spm_buffer_params[0].size, &spm_buffer_params[0].timeout,
|
|
&spm_buffer_params[0].len, spm_buffer_params[0].addr, &spm_buffer_params[0].data_loss);
|
|
if (status != HSA_STATUS_SUCCESS) {
|
|
std::cerr << "Error in initial spm setup of buffer 0" << std::endl;
|
|
return 1;
|
|
}
|
|
|
|
// spm threads
|
|
std::thread k_thread(thread_kernel, &ret_val, pmc_argv, events_count, events_spm);
|
|
std::thread buffer_setup(thread_spm_buffer_setup);
|
|
std::thread data_save(thread_spm_data_save, file);
|
|
|
|
k_thread.join();
|
|
buffer_setup.join();
|
|
data_save.join();
|
|
|
|
// my_anaylyze(spm_buffer_params[0].addr, spm_buffer_params[0].size,
|
|
// spm_buffer_params[0].len); my_anaylyze(spm_buffer_params[1].addr,
|
|
// spm_buffer_params[1].size, spm_buffer_params[1].len);
|
|
|
|
// free allocated spm buffers
|
|
free(spm_buffer_params[0].addr);
|
|
free(spm_buffer_params[1].addr);
|
|
|
|
std::cout << "data in buff0: " << spm_buffer_params[0].len << " bytes" << std::endl;
|
|
std::cout << "data in buff1: " << spm_buffer_params[1].len << " bytes" << std::endl;
|
|
|
|
status = hsa_amd_spm_release(gpu_node_id);
|
|
if (status != HSA_STATUS_SUCCESS) {
|
|
std::cerr << "Error in releasing SPM for NodeId " << gpu_node_id << std::endl;
|
|
return 1;
|
|
}
|
|
|
|
// close spm sample binary file
|
|
fclose(file);
|
|
} else {
|
|
ret_val = RunKernel<simple_convolution, TestPGenSpm>(events_count,
|
|
pmc_argv(events_count, events_spm));
|
|
#if SPM_DEBUG_TRAP
|
|
HSAKMT_STATUS status = hsaKmtDisableDebugTrap(gpu_node_id);
|
|
#else
|
|
hsa_status_t status = HSA_STATUS_ERROR;
|
|
#endif
|
|
if (status != HSA_STATUS_SUCCESS) {
|
|
std::cerr << "Error in disabling debug trap for NodeId " << gpu_node_id << std::endl;
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
// SPM data analysis: need to change command dependent on binary vs text sample files
|
|
// The 'da_16b.py' script is checking the first SPM counter data to match expected value
|
|
// provided by the option '-e'
|
|
std::string command = "python3 da_16b.py -e 16 spm_dump_0.txt";
|
|
|
|
int command_status = system(command.c_str());
|
|
|
|
if (command_status == -1)
|
|
std::cerr << "Cannot run \"" << command << "\"" << std::endl;
|
|
else if (command_status == 0)
|
|
std::cout << "SPM test passed!" << std::endl;
|
|
else
|
|
std::cerr << "SPM test failed!" << std::endl;
|
|
#endif
|
|
} else {
|
|
ret_val = RunKernel<simple_convolution, TestAql>(argc, argv);
|
|
}
|
|
TestHsa::HsaShutdown();
|
|
|
|
return (ret_val) ? 0 : 1;
|
|
}
|