Eric Huang
f7759df6e0
destBuf is mapped as cached, the intruction flat_atomic_add operates on cache that cause test failed. Adding scc modifier in the instruction will fix the issue. Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Change-Id: I8e138f93ae4f5e23020e3ac1549ef924968a74c5
114 строки
3.3 KiB
C++
114 строки
3.3 KiB
C++
/*
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* Copyright (C) 2020 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "IsaGenerator_Aldebaran.hpp"
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#include <algorithm>
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#include <string>
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const std::string IsaGenerator_Aldbrn::ASIC_NAME = "ALDEBARAN";
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/* The binaries are generated from following ISA */
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#if 0
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/* flat_atomic_inc will not support by some PCIE, use flat_atomic_add instead */
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shader atomic_add
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asic(ALDEBARAN)
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type(CS)
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v_mov_b32 v0, s0
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v_mov_b32 v1, s1
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v_mov_b32 v2, 1
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flat_atomic_add v3, v[0:1], v2 slc glc scc
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s_waitcnt 0
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s_endpgm
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end
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shader copy_dword
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asic(ALDEBARAN)
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type(CS)
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/* copy the parameters from scalar registers to vector registers */
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v_mov_b32 v0, s0
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v_mov_b32 v1, s1
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v_mov_b32 v2, s2
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v_mov_b32 v3, s3
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/* copy a dword between the passed addresses */
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flat_load_dword v4, v[0:1] slc glc
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s_waitcnt 0
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flat_store_dword v[2:3], v4 slc glc
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s_endpgm
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end
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shader main
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asic(ALDEBARAN)
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type(CS)
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loop:
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s_branch loop
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s_endpgm
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end
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#endif
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const uint32_t IsaGenerator_Aldbrn::NOOP_ISA[] = {
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0xbf810000
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};
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const uint32_t IsaGenerator_Aldbrn::COPY_DWORD_ISA[] = {
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0x7e000200, 0x7e020201,
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0x7e040202, 0x7e060203,
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0xdc530000, 0x047f0000,
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0xbf8c0000, 0xdc730000,
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0x007f0402, 0xbf810000
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};
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const uint32_t IsaGenerator_Aldbrn::INFINITE_LOOP_ISA[] = {
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0xbf82ffff, 0xbf810000
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};
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const uint32_t IsaGenerator_Aldbrn::ATOMIC_ADD_ISA[] = {
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0x7e000200, 0x7e020201,
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0x7e040281, 0xdf0b0000,
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0x037f0200, 0xbf8c0000,
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0xbf810000, 0x00000000
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};
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void IsaGenerator_Aldbrn::GetNoopIsa(HsaMemoryBuffer& rBuf) {
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std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
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}
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void IsaGenerator_Aldbrn::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
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std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
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}
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void IsaGenerator_Aldbrn::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
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std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
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}
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void IsaGenerator_Aldbrn::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
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std::copy(ATOMIC_ADD_ISA, ATOMIC_ADD_ISA+ARRAY_SIZE(ATOMIC_ADD_ISA), rBuf.As<uint32_t*>());
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}
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const std::string& IsaGenerator_Aldbrn::GetAsicName() {
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return ASIC_NAME;
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}
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