2021-07-02 14:41:38 -07:00
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/* Copyright (c) 2010 - 2021 Advanced Micro Devices, Inc.
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2020-02-04 09:26:14 -08:00
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE. */
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2014-07-04 16:17:05 -04:00
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2024-06-06 18:40:49 +01:00
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namespace amd::device {
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2014-07-04 16:17:05 -04:00
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#define BLIT_KERNELS(...) #__VA_ARGS__
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2021-09-28 12:34:24 -04:00
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const char* BlitLinearSourceCode = BLIT_KERNELS(
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// Extern
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extern void __amd_fillBufferAligned(__global uchar*, __global ushort*, __global uint*,
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__global ulong*, __constant uchar*, uint, ulong, ulong);
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2021-10-19 13:00:51 -04:00
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extern void __amd_fillBufferAligned2D(__global uchar*, __global ushort*, __global uint*,
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__global ulong*, __constant uchar*, uint, ulong, ulong,
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ulong, ulong);
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2021-09-28 12:34:24 -04:00
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extern void __amd_copyBuffer(__global uchar*, __global uchar*, ulong, ulong, ulong, uint);
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extern void __amd_copyBufferAligned(__global uint*, __global uint*, ulong, ulong, ulong, uint);
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extern void __amd_copyBufferRect(__global uchar*, __global uchar*, ulong4, ulong4, ulong4);
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extern void __amd_copyBufferRectAligned(__global uint*, __global uint*, ulong4, ulong4, ulong4);
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2024-01-15 17:12:45 -08:00
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extern void __amd_streamOpsWrite(__global uint*, __global ulong*, ulong);
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2023-06-19 18:02:48 +00:00
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extern void __amd_streamOpsWait(__global uint*, __global ulong*, ulong, ulong, ulong);
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2024-03-26 10:22:35 -07:00
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extern void __amd_batchMemOp(__global void*, uint count);
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2023-06-19 18:02:48 +00:00
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extern void __ockl_dm_init_v1(ulong, ulong, uint, uint);
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2024-04-09 14:27:04 -04:00
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__kernel void __amd_rocclr_fillBufferAligned(__global void* buf, __constant uchar* pattern,
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2025-04-15 15:22:15 -04:00
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uint pattern_size, uint alignment, ulong end_ptr,
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uint next_chunk, uint workgroup_size) {
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uint l = __builtin_amdgcn_workitem_id_x();
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uint g = __builtin_amdgcn_workgroup_id_x();
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ulong id = (g * workgroup_size + l);
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2024-04-09 14:27:04 -04:00
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long cur_id = id * pattern_size;
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if (alignment == sizeof(ulong2)) {
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__global ulong2* bufULong2 = (__global ulong2*)buf;
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2023-11-14 12:49:17 -05:00
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__global ulong2* element = &bufULong2[cur_id];
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__constant ulong2* pt = (__constant ulong2*)pattern;
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while ((ulong)element < end_ptr) {
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for (uint i = 0; i < pattern_size; ++i) {
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element[i] = pt[i];
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2025-08-20 16:28:06 +02:00
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}
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2023-11-14 12:49:17 -05:00
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element += next_chunk;
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}
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2024-04-09 14:27:04 -04:00
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} else if (alignment == sizeof(ulong)) {
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__global ulong* bufULong = (__global ulong*)buf;
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2023-11-14 12:49:17 -05:00
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__global ulong* element = &bufULong[cur_id];
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__constant ulong* pt = (__constant ulong*)pattern;
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while ((ulong)element < end_ptr) {
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for (uint i = 0; i < pattern_size; ++i) {
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element[i] = pt[i];
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2025-08-20 16:28:06 +02:00
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}
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2023-11-14 12:49:17 -05:00
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element += next_chunk;
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}
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2024-04-09 14:27:04 -04:00
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} else if (alignment == sizeof(uint)) {
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__global uint* bufUInt = (__global uint*)buf;
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2023-11-14 12:49:17 -05:00
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__global uint* element = &bufUInt[cur_id];
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__constant uint* pt = (__constant uint*)pattern;
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while ((ulong)element < end_ptr) {
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for (uint i = 0; i < pattern_size; ++i) {
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element[i] = pt[i];
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2025-08-20 16:28:06 +02:00
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}
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2023-11-14 12:49:17 -05:00
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element += next_chunk;
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}
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2024-04-09 14:27:04 -04:00
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} else if (alignment == sizeof(ushort)) {
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__global ushort* bufUShort = (__global ushort*)buf;
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2023-11-14 12:49:17 -05:00
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__global ushort* element = &bufUShort[cur_id];
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__constant ushort* pt = (__constant ushort*)pattern;
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while ((ulong)element < end_ptr) {
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for (uint i = 0; i < pattern_size; ++i) {
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element[i] = pt[i];
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2025-08-20 16:28:06 +02:00
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}
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2023-11-14 12:49:17 -05:00
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element += next_chunk;
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}
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} else {
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__global uchar* bufUChar = (__global uchar*)buf;
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__global uchar* element = &bufUChar[cur_id];
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while ((ulong)element < end_ptr) {
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for (uint i = 0; i < pattern_size; ++i) {
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element[i] = pattern[i];
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2025-08-20 16:28:06 +02:00
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}
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2023-11-14 12:49:17 -05:00
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element += next_chunk;
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}
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}
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}
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2025-08-20 16:28:06 +02:00
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2021-10-19 13:00:51 -04:00
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__kernel void __amd_rocclr_fillBufferAligned2D(
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2024-04-09 14:27:04 -04:00
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__global uchar* bufUChar, __global ushort* bufUShort, __global uint* bufUInt,
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2023-11-27 11:45:00 -05:00
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__global ulong* bufULong, __constant uchar* pattern, uint patternSize, ulong offset,
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ulong width, ulong height, ulong pitch) {
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__amd_fillBufferAligned2D(bufUChar, bufUShort, bufUInt, bufULong, pattern, patternSize,
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offset, width, height, pitch);
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}
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2025-08-20 16:28:06 +02:00
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2021-09-28 12:34:24 -04:00
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__kernel void __amd_rocclr_copyBuffer(__global uchar* src, __global uchar* dst, ulong size,
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2025-04-15 15:22:15 -04:00
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uint remainder, uint aligned_size, ulong end_ptr,
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uint next_chunk, uint workgroup_size) {
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uint l = __builtin_amdgcn_workitem_id_x();
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uint g = __builtin_amdgcn_workgroup_id_x();
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ulong id = (g * workgroup_size + l);
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2023-11-27 11:45:00 -05:00
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ulong id_remainder = id;
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2025-08-20 16:28:06 +02:00
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2023-11-27 11:45:00 -05:00
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if (aligned_size == sizeof(ulong2)) {
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__global ulong2* srcD = (__global ulong2*)(src);
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__global ulong2* dstD = (__global ulong2*)(dst);
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while ((ulong)(&dstD[id]) < end_ptr) {
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dstD[id] = srcD[id];
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id += next_chunk;
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2025-08-20 16:28:06 +02:00
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}
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} else {
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2023-11-27 11:45:00 -05:00
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__global uint* srcD = (__global uint*)(src);
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__global uint* dstD = (__global uint*)(dst);
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while ((ulong)(&dstD[id]) < end_ptr) {
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dstD[id] = srcD[id];
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id += next_chunk;
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2025-08-20 16:28:06 +02:00
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}
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}
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2023-11-27 11:45:00 -05:00
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if ((remainder != 0) && (id_remainder == 0)) {
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for (ulong i = size - remainder; i < size; ++i) {
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dst[i] = src[i];
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2025-08-20 16:28:06 +02:00
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}
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2023-11-27 11:45:00 -05:00
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}
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}
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2021-09-28 12:34:24 -04:00
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__kernel void __amd_rocclr_copyBufferAligned(__global uint* src, __global uint* dst,
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ulong srcOrigin, ulong dstOrigin, ulong size,
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uint alignment) {
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__amd_copyBufferAligned(src, dst, srcOrigin, dstOrigin, size, alignment);
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}
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__kernel void __amd_rocclr_copyBufferRect(__global uchar* src, __global uchar* dst,
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ulong4 srcRect, ulong4 dstRect, ulong4 size) {
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__amd_copyBufferRect(src, dst, srcRect, dstRect, size);
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}
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__kernel void __amd_rocclr_copyBufferRectAligned(__global uint* src, __global uint* dst,
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ulong4 srcRect, ulong4 dstRect, ulong4 size) {
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__amd_copyBufferRectAligned(src, dst, srcRect, dstRect, size);
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}
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2024-03-26 10:22:35 -07:00
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__kernel void __amd_rocclr_batchMemOp(__global void* params, uint count) {
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__amd_batchMemOp(params, count);
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2023-07-06 16:13:14 -04:00
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});
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2021-09-28 12:34:24 -04:00
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2023-07-06 16:13:14 -04:00
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const char* HipExtraSourceCode = BLIT_KERNELS(
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2023-06-19 18:02:48 +00:00
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__kernel void __amd_rocclr_streamOpsWrite(__global uint* ptrInt, __global ulong* ptrUlong,
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2024-01-15 17:12:45 -08:00
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ulong value) {
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__amd_streamOpsWrite(ptrInt, ptrUlong, value);
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2023-06-19 18:02:48 +00:00
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}
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2025-08-20 16:28:06 +02:00
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2023-06-19 18:02:48 +00:00
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__kernel void __amd_rocclr_streamOpsWait(__global uint* ptrInt, __global ulong* ptrUlong,
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ulong value, ulong flags, ulong mask) {
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__amd_streamOpsWait(ptrInt, ptrUlong, value, flags, mask);
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}
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2025-08-20 16:28:06 +02:00
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2023-06-19 18:02:48 +00:00
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__kernel void __amd_rocclr_initHeap(ulong heap_to_initialize, ulong initial_blocks,
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uint heap_size, uint number_of_initial_blocks) {
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__ockl_dm_init_v1(heap_to_initialize, initial_blocks, heap_size, number_of_initial_blocks);
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}
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2025-08-20 16:28:06 +02:00
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2025-12-15 15:56:14 +00:00
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__kernel void __amd_rocclr_gwsInit(uint value) { __builtin_amdgcn_ds_gws_init(value, 0); });
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2021-09-28 12:34:24 -04:00
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2023-09-11 15:54:46 -04:00
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const char* HipExtraSourceCodeNoGWS = BLIT_KERNELS(
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__kernel void __amd_rocclr_streamOpsWrite(__global uint* ptrInt, __global ulong* ptrUlong,
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2024-01-15 17:12:45 -08:00
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ulong value) {
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__amd_streamOpsWrite(ptrInt, ptrUlong, value);
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2023-09-11 15:54:46 -04:00
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}
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2025-08-20 16:28:06 +02:00
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2023-09-11 15:54:46 -04:00
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__kernel void __amd_rocclr_streamOpsWait(__global uint* ptrInt, __global ulong* ptrUlong,
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ulong value, ulong flags, ulong mask) {
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__amd_streamOpsWait(ptrInt, ptrUlong, value, flags, mask);
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}
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2025-08-20 16:28:06 +02:00
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2023-09-11 15:54:46 -04:00
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__kernel void __amd_rocclr_initHeap(ulong heap_to_initialize, ulong initial_blocks,
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uint heap_size, uint number_of_initial_blocks) {
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__ockl_dm_init_v1(heap_to_initialize, initial_blocks, heap_size, number_of_initial_blocks);
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});
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2021-09-28 12:34:24 -04:00
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const char* BlitImageSourceCode = BLIT_KERNELS(
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// Extern
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extern void __amd_fillImage(__write_only image2d_array_t, float4, int4, uint4, int4, int4,
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uint);
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2025-08-20 16:28:06 +02:00
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2021-09-28 12:34:24 -04:00
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extern void __amd_copyImage(__read_only image2d_array_t, __write_only image2d_array_t, int4,
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int4, int4);
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2025-08-20 16:28:06 +02:00
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2021-09-28 12:34:24 -04:00
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extern void __amd_copyImage1DA(__read_only image2d_array_t, __write_only image2d_array_t, int4,
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int4, int4);
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2025-08-20 16:28:06 +02:00
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2021-09-28 12:34:24 -04:00
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extern void __amd_copyBufferToImage(__global uint*, __write_only image2d_array_t, ulong4, int4,
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int4, uint4, ulong4);
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2025-08-20 16:28:06 +02:00
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2021-09-28 12:34:24 -04:00
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extern void __amd_copyImageToBuffer(__read_only image2d_array_t, __global uint*,
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__global ushort*, __global uchar*, int4, ulong4, int4,
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uint4, ulong4);
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2025-08-20 16:28:06 +02:00
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2021-09-28 12:34:24 -04:00
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__kernel void __amd_rocclr_fillImage(__write_only image2d_array_t image, float4 patternFLOAT4,
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int4 patternINT4, uint4 patternUINT4, int4 origin,
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int4 size, uint type) {
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__amd_fillImage(image, patternFLOAT4, patternINT4, patternUINT4, origin, size, type);
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}
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2025-08-20 16:28:06 +02:00
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2021-09-28 12:34:24 -04:00
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__kernel void __amd_rocclr_copyImage(
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__read_only image2d_array_t src, __write_only image2d_array_t dst, int4 srcOrigin,
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int4 dstOrigin, int4 size) { __amd_copyImage(src, dst, srcOrigin, dstOrigin, size); }
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2025-08-20 16:28:06 +02:00
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2021-09-28 12:34:24 -04:00
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__kernel void __amd_rocclr_copyImage1DA(
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__read_only image2d_array_t src, __write_only image2d_array_t dst, int4 srcOrigin,
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int4 dstOrigin, int4 size) { __amd_copyImage1DA(src, dst, srcOrigin, dstOrigin, size); }
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2025-08-20 16:28:06 +02:00
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2021-09-28 12:34:24 -04:00
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__kernel void __amd_rocclr_copyBufferToImage(
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__global uint* src, __write_only image2d_array_t dst, ulong4 srcOrigin, int4 dstOrigin,
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int4 size, uint4 format, ulong4 pitch) {
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__amd_copyBufferToImage(src, dst, srcOrigin, dstOrigin, size, format, pitch);
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}
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2025-08-20 16:28:06 +02:00
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2021-09-28 12:34:24 -04:00
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__kernel void __amd_rocclr_copyImageToBuffer(
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__read_only image2d_array_t src, __global uint* dstUInt, __global ushort* dstUShort,
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__global uchar* dstUChar, int4 srcOrigin, ulong4 dstOrigin, int4 size, uint4 format,
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ulong4 pitch) {
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__amd_copyImageToBuffer(src, dstUInt, dstUShort, dstUChar, srcOrigin, dstOrigin, size, format,
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pitch);
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});
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2024-06-06 18:40:49 +01:00
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} // namespace amd::device
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