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< a href = "#pub-attribs" > Public Attributes</ a > |
< a href = "structhipDeviceProp__t-members.html" > List of all members</ a > </ div >
< div class = "headertitle" >
< div class = "title" > hipDeviceProp_t Struct Reference</ div > </ div >
</ div > <!--header-->
< div class = "contents" >
< p >< code > #include < < a class = "el" href = "hip__runtime__api_8h_source.html" > hip_runtime_api.h</ a > > </ code ></ p >
< table class = "memberdecls" >
< tr class = "heading" >< td colspan = "2" >< h2 class = "groupheader" >< a name = "pub-attribs" ></ a >
Public Attributes</ h2 ></ td ></ tr >
< tr class = "memitem:a5b44bf8fa46faefcde989942b1d11a5e" >< td class = "memItemLeft" align = "right" valign = "top" >< a class = "anchor" id = "a5b44bf8fa46faefcde989942b1d11a5e" ></ a >
char  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a5b44bf8fa46faefcde989942b1d11a5e" > name</ a > [256]</ td ></ tr >
< tr class = "memdesc:a5b44bf8fa46faefcde989942b1d11a5e" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Device name. < br /></ td ></ tr >
< tr class = "separator:a5b44bf8fa46faefcde989942b1d11a5e" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
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size_t  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#acedd6a2d23423441e4bf51c4a1b719f9" > totalGlobalMem</ a ></ td ></ tr >
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< tr class = "memdesc:acedd6a2d23423441e4bf51c4a1b719f9" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Size of global memory region (in bytes). < br /></ td ></ tr >
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size_t  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a3b9138678a0795c2677eddcfb1c67156" > sharedMemPerBlock</ a ></ td ></ tr >
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< tr class = "memdesc:a3b9138678a0795c2677eddcfb1c67156" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Size of shared memory region (in bytes). < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a73c1c21648a901799ff6bef83c11135b" > regsPerBlock</ a ></ td ></ tr >
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< tr class = "memdesc:a73c1c21648a901799ff6bef83c11135b" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Registers per block. < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#af3357d33c004608bf05bc21a352be81b" > warpSize</ a ></ td ></ tr >
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< tr class = "memdesc:af3357d33c004608bf05bc21a352be81b" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Warp size. < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#af971cf1ca3ec1f68ad09036c0cc672e0" > maxThreadsPerBlock</ a ></ td ></ tr >
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< tr class = "memdesc:af971cf1ca3ec1f68ad09036c0cc672e0" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Max work items per work group or workgroup max size. < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a8ebba6fc12f80c9a9cf9b9193f0da465" > maxThreadsDim</ a > [3]</ td ></ tr >
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< tr class = "memdesc:a8ebba6fc12f80c9a9cf9b9193f0da465" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Max number of threads in each dimension (XYZ) of a block. < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#ae529c23929f592120081fed31d877a55" > maxGridSize</ a > [3]</ td ></ tr >
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< tr class = "memdesc:ae529c23929f592120081fed31d877a55" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Max grid dimensions (XYZ). < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a1dd15bee43692b8649dfbdc1adbaaf96" > clockRate</ a ></ td ></ tr >
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< tr class = "memdesc:a1dd15bee43692b8649dfbdc1adbaaf96" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Max clock frequency of the multiProcessors in khz. < br /></ td ></ tr >
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< tr class = "separator:a1dd15bee43692b8649dfbdc1adbaaf96" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
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< tr class = "memitem:a6db0ab8e7e8cc13c84d7bb7f70226d5e" >< td class = "memItemLeft" align = "right" valign = "top" >< a class = "anchor" id = "a6db0ab8e7e8cc13c84d7bb7f70226d5e" ></ a >
int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a6db0ab8e7e8cc13c84d7bb7f70226d5e" > memoryClockRate</ a ></ td ></ tr >
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< tr class = "memdesc:a6db0ab8e7e8cc13c84d7bb7f70226d5e" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Max global memory clock frequency in khz. < br /></ td ></ tr >
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< tr class = "separator:a6db0ab8e7e8cc13c84d7bb7f70226d5e" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
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< tr class = "memitem:a1d710ce8bd34daf66f892a66a2273132" >< td class = "memItemLeft" align = "right" valign = "top" >< a class = "anchor" id = "a1d710ce8bd34daf66f892a66a2273132" ></ a >
int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a1d710ce8bd34daf66f892a66a2273132" > memoryBusWidth</ a ></ td ></ tr >
< tr class = "memdesc:a1d710ce8bd34daf66f892a66a2273132" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Global memory bus width in bits. < br /></ td ></ tr >
< tr class = "separator:a1d710ce8bd34daf66f892a66a2273132" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
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< tr class = "memitem:a29880232c56120be3455ce00d5379665" >< td class = "memItemLeft" align = "right" valign = "top" >< a class = "anchor" id = "a29880232c56120be3455ce00d5379665" ></ a >
size_t  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a29880232c56120be3455ce00d5379665" > totalConstMem</ a ></ td ></ tr >
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< tr class = "memdesc:a29880232c56120be3455ce00d5379665" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Size of shared memory region (in bytes). < br /></ td ></ tr >
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< tr class = "separator:a29880232c56120be3455ce00d5379665" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
< tr class = "memitem:aec9e4173c2e34cc232300c415dbd5e4f" >< td class = "memItemLeft" align = "right" valign = "top" >< a class = "anchor" id = "aec9e4173c2e34cc232300c415dbd5e4f" ></ a >
int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#aec9e4173c2e34cc232300c415dbd5e4f" > major</ a ></ td ></ tr >
< tr class = "memdesc:aec9e4173c2e34cc232300c415dbd5e4f" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Major compute capability. On HCC, this is an approximation and features may differ from CUDA CC. See the arch feature flags for portable ways to query feature caps. < br /></ td ></ tr >
< tr class = "separator:aec9e4173c2e34cc232300c415dbd5e4f" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
< tr class = "memitem:abb51208e2509a7a1d107f0da69108938" >< td class = "memItemLeft" align = "right" valign = "top" >< a class = "anchor" id = "abb51208e2509a7a1d107f0da69108938" ></ a >
int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#abb51208e2509a7a1d107f0da69108938" > minor</ a ></ td ></ tr >
< tr class = "memdesc:abb51208e2509a7a1d107f0da69108938" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Minor compute capability. On HCC, this is an approximation and features may differ from CUDA CC. See the arch feature flags for portable ways to query feature caps. < br /></ td ></ tr >
< tr class = "separator:abb51208e2509a7a1d107f0da69108938" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
< tr class = "memitem:add8d9d2ad52aece9fd1dbe25c18d9d57" >< td class = "memItemLeft" align = "right" valign = "top" >< a class = "anchor" id = "add8d9d2ad52aece9fd1dbe25c18d9d57" ></ a >
int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#add8d9d2ad52aece9fd1dbe25c18d9d57" > multiProcessorCount</ a ></ td ></ tr >
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< tr class = "memdesc:add8d9d2ad52aece9fd1dbe25c18d9d57" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Number of multi-processors (compute units). < br /></ td ></ tr >
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< tr class = "separator:add8d9d2ad52aece9fd1dbe25c18d9d57" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a24404decccc16833973c803ced6f3a51" > l2CacheSize</ a ></ td ></ tr >
< tr class = "memdesc:a24404decccc16833973c803ced6f3a51" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > L2 cache size. < br /></ td ></ tr >
< tr class = "separator:a24404decccc16833973c803ced6f3a51" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
< tr class = "memitem:a23a39f4fd795addb3b125e9c3f6295ea" >< td class = "memItemLeft" align = "right" valign = "top" >< a class = "anchor" id = "a23a39f4fd795addb3b125e9c3f6295ea" ></ a >
int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a23a39f4fd795addb3b125e9c3f6295ea" > maxThreadsPerMultiProcessor</ a ></ td ></ tr >
< tr class = "memdesc:a23a39f4fd795addb3b125e9c3f6295ea" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Maximum resident threads per multi-processor. < br /></ td ></ tr >
< tr class = "separator:a23a39f4fd795addb3b125e9c3f6295ea" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#ae7d9216f8583a703359d0b9373823f5d" > computeMode</ a ></ td ></ tr >
< tr class = "memdesc:ae7d9216f8583a703359d0b9373823f5d" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Compute mode. < br /></ td ></ tr >
< tr class = "separator:ae7d9216f8583a703359d0b9373823f5d" >< td class = "memSeparator" colspan = "2" >   </ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a6fbf3b08a1a08ae700f1a06265f6666b" > clockInstructionRate</ a ></ td ></ tr >
< tr class = "memdesc:a6fbf3b08a1a08ae700f1a06265f6666b" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Frequency in khz of the timer used by the device-side "clock*" instructions. New for HIP. < br /></ td ></ tr >
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< a class = "el" href = "structhipDeviceArch__t.html" > hipDeviceArch_t</ a >   </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#afc58158e44bef6ad26f2be401434b049" > arch</ a ></ td ></ tr >
< tr class = "memdesc:afc58158e44bef6ad26f2be401434b049" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Architectural feature flags. New for HIP. < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#ad8461a28caf9c38c58cf358583b5bee3" > concurrentKernels</ a ></ td ></ tr >
< tr class = "memdesc:ad8461a28caf9c38c58cf358583b5bee3" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Device can possibly execute multiple kernels concurrently. < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a1350f64d49b717ed3a06458f7549ccb0" > pciBusID</ a ></ td ></ tr >
< tr class = "memdesc:a1350f64d49b717ed3a06458f7549ccb0" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > PCI Bus ID. < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#ae6aa845dc2d540f85098ea30be35f4eb" > pciDeviceID</ a ></ td ></ tr >
< tr class = "memdesc:ae6aa845dc2d540f85098ea30be35f4eb" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > PCI Device ID. < br /></ td ></ tr >
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size_t  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#aa1a32a7f387f6da845db7b228711fce8" > maxSharedMemoryPerMultiProcessor</ a ></ td ></ tr >
< tr class = "memdesc:aa1a32a7f387f6da845db7b228711fce8" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Maximum Shared Memory Per Multiprocessor. < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#a9bb19b2b0cdee8977ed63964532d639d" > isMultiGpuBoard</ a ></ td ></ tr >
< tr class = "memdesc:a9bb19b2b0cdee8977ed63964532d639d" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > 1 if device is on a multi-GPU board, 0 if not. < br /></ td ></ tr >
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int  </ td >< td class = "memItemRight" valign = "bottom" >< a class = "el" href = "structhipDeviceProp__t.html#ac2143f5448607d1a02a9e8783fcf06a1" > canMapHostMemory</ a ></ td ></ tr >
< tr class = "memdesc:ac2143f5448607d1a02a9e8783fcf06a1" >< td class = "mdescLeft" >   </ td >< td class = "mdescRight" > Check whether HIP can map host memory. < br /></ td ></ tr >
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</ table >
< a name = "details" id = "details" ></ a >< h2 class = "groupheader" > Detailed Description</ h2 >
< div class = "textblock" >< p > hipDeviceProp </ p >
</ div >< hr /> The documentation for this struct was generated from the following file:< ul >
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< li > /home/bensander/HIP-privatestaging/include/< a class = "el" href = "hip__runtime__api_8h_source.html" > hip_runtime_api.h</ a ></ li >
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</ ul >
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Generated on Wed Mar 23 2016 23:11:07 for HIP: Heterogenous-computing Interface for Portability by   < a href = "http://www.doxygen.org/index.html" >
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</ a > 1.8.6
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