P4 to Git Change 1130172 by asalmanp@asalmanp-opencl-stg1 on 2015/03/12 14:15:06
EPR #394115 - Adding the environment variable "GPU_SELECT_COMPUTE_RINGS_ID" to select a specific compute queue for OCL submission. This EV was requested from KMD team for testing the CWSR demo on CZ. ReviewBoardURL = http://ocltc.amd.com/reviews/r/7082/ Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpuvirtual.cpp#354 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp#111 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDevice.h#44 edit ... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#226 edit
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@@ -495,7 +495,8 @@ VirtualGPU::create(
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// hwRing_ should be set 0 if forced to have single scratch buffer
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hwRing_ = (dev().settings().useSingleScratch_) ? 0 : idx;
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engineMask = dev().engines().getMask((gslEngineID)(GSL_ENGINEID_COMPUTE0 + idx));
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engineMask = dev().engines().getMask((gslEngineID)(dev().isComputeRingIDForced() ?
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dev().getforcedComputeEngineID() : (GSL_ENGINEID_COMPUTE0 + idx)));
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if (dev().canDMA()) {
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if (index() & 0x1) {
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engineMask |= dev().engines().getMask(GSL_ENGINEID_DRMDMA0);
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@@ -42,7 +42,8 @@ void CALGSLDevice::Initialize()
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m_vpuMask = 1;
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m_PerformLazyDeviceInit = false;
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m_computeRing = false;
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m_isComputeRingIDForced = false;
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m_forcedComputeEngineID = GSL_ENGINEID_INVALID;
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gslDeviceOps_ = NULL;
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}
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@@ -313,8 +314,6 @@ CALGSLDevice::open(uint32 gpuIndex, bool enableHighPerformanceState, bool report
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return false;
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}
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m_adp->queryAvailableEngines(&m_nEngines, m_engines);
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if (m_PerformLazyDeviceInit)
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{
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// close the adaptor
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@@ -411,7 +410,9 @@ CALGSLDevice::SetupAdapter(int32 &asic_id)
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m_canDMA = hasDmaEngine;
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//Disable DRMDMA on CFX mode for linux on all GPUs.
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m_adp->queryAvailableEngines(&m_nEngines, m_engines);
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//Disable DRMDMA on CFX mode for linux on all GPUs.
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#ifdef ATI_OS_LINUX
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if ((m_vpucount > 1) && !DRMDMA_FOR_LNX_CF)
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{
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@@ -426,7 +427,7 @@ CALGSLDevice::SetupAdapter(int32 &asic_id)
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m_computeRing = false;
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}
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else
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{
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{
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m_computeRing = true;
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}
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@@ -435,6 +436,22 @@ CALGSLDevice::SetupAdapter(int32 &asic_id)
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m_computeRing = (GPU_NUM_COMPUTE_RINGS != 0);
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}
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if ((!flagIsDefault(GPU_SELECT_COMPUTE_RINGS_ID)) && (m_computeRing))
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{
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gslEngineID engineID;
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engineID = static_cast<gslEngineID>(GPU_SELECT_COMPUTE_RINGS_ID + GSL_ENGINEID_COMPUTE0);
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if ((engineID >= GSL_ENGINEID_COMPUTE0) && (engineID <= GSL_ENGINEID_COMPUTE7))
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{
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for (uint i = 0; i < m_nEngines; ++i) {
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if (m_engines[i].id == engineID){
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m_isComputeRingIDForced = true;
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m_forcedComputeEngineID = engineID;
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break;
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}
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}
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}
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}
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if (m_computeRing && !hasComputeEngine)
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{
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return false;
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@@ -446,8 +463,8 @@ CALGSLDevice::SetupAdapter(int32 &asic_id)
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bool
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CALGSLDevice::SetupContext(int32 &asic_id)
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{
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gsl::gsCtx* temp_cs = m_adp->createComputeContext(m_computeRing ? GSL_ENGINEID_COMPUTE0 : GSL_ENGINEID_3DCOMPUTE0,
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m_canDMA ? GSL_ENGINEID_DRMDMA0 : GSL_ENGINEID_INVALID);
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gsl::gsCtx* temp_cs = m_adp->createComputeContext(m_computeRing ? (m_isComputeRingIDForced ? m_forcedComputeEngineID : GSL_ENGINEID_COMPUTE0)
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: GSL_ENGINEID_3DCOMPUTE0, m_canDMA ? GSL_ENGINEID_DRMDMA0 : GSL_ENGINEID_INVALID);
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temp_cs->getMainSubCtx()->setVPUMask(m_vpuMask);
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m_revision = temp_cs->getChipRev();
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@@ -632,8 +649,8 @@ CALGSLDevice::PerformFullInitialization_int()
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if (m_cs == 0)
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{
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m_cs = m_adp->createComputeContext(m_computeRing ? GSL_ENGINEID_COMPUTE0 : GSL_ENGINEID_3DCOMPUTE0,
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m_canDMA ? GSL_ENGINEID_DRMDMA0 : GSL_ENGINEID_INVALID);
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m_cs = m_adp->createComputeContext(m_computeRing ? (m_isComputeRingIDForced ? m_forcedComputeEngineID : GSL_ENGINEID_COMPUTE0)
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: GSL_ENGINEID_3DCOMPUTE0, m_canDMA ? GSL_ENGINEID_DRMDMA0 : GSL_ENGINEID_INVALID);
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m_cs->getMainSubCtx()->setVPUMask(m_vpuMask);
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//
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@@ -134,6 +134,9 @@ public:
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gsl::gsCtx* gslCtx() const { return m_cs; }
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bool isComputeRingIDForced() const { return m_isComputeRingIDForced; }
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gslEngineID getforcedComputeEngineID() const { return m_forcedComputeEngineID; }
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protected:
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//
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/// channel order enumerants
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@@ -211,7 +214,7 @@ private:
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CALdevicestatus m_deviceStatus;
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gslTextureResourceObject m_textureResource;
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gslSamplerObject m_textureSampler;
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bool m_isOpenCL200Device;
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gslEngineID m_forcedComputeEngineID;
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union {
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struct {
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@@ -222,6 +225,8 @@ private:
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uint m_PerformLazyDeviceInit : 1;
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uint m_vmMode : 1;
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uint m_uavInCB : 1;
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uint m_isComputeRingIDForced : 1;
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bool m_isOpenCL200Device : 1;
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};
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};
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@@ -122,6 +122,8 @@ release(uint, GPU_SINGLE_ALLOC_PERCENT, 75, \
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"Maximum size of a single allocation as percentage of total") \
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release(uint, GPU_NUM_COMPUTE_RINGS, 2, \
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"GPU number of compute rings. 0 - disabled, 1 , 2,.. - the number of compute rings") \
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release(int, GPU_SELECT_COMPUTE_RINGS_ID, -1, \
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"GPU select the compute rings ID -1 - disabled, 0 , 1,.. - the forced compute rings ID for submission") \
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release_on_stg(bool, C1X_ATOMICS, !IS_MAINLINE, \
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"Runtime will report c1x atomics support") \
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release(uint, GPU_WORKLOAD_SPLIT, 22, \
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