P4 to Git Change 1973670 by gandryey@gera-win10 on 2019/07/25 11:27:11
SWDEV-79445 - OCL generic changes and code clean-up
- Don't create an extra queue for DMA transfers when SDMA is disabled. That should allow to avoid useless sync operations.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palconstbuf.cpp#13 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palgpuopen.cpp#15 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palresource.cpp#75 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paltimestamp.cpp#5 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paltimestamp.hpp#5 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palvirtual.cpp#143 edit
[ROCm/clr commit: b9b798616f]
This commit is contained in:
@@ -69,8 +69,10 @@ address ManagedBuffer::reserve(uint32_t size, uint64_t* gpu_address) {
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// Get the next buffer in the list
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++activeBuffer_;
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activeBuffer_ %= MaxNumberOfBuffers;
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// Make sure the buffer isn't busy
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gpu().waitForEvent(&pool_[activeBuffer_].events[SdmaEngine]);
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if (!gpu().dev().settings().disableSdma_) {
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// Make sure the buffer isn't busy
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gpu().waitForEvent(&pool_[activeBuffer_].events[SdmaEngine]);
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}
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gpu().waitForEvent(&pool_[activeBuffer_].events[MainEngine]);
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wrtAddress_ = pool_[activeBuffer_].buf->data();
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wrtOffset_ = 0;
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@@ -582,10 +582,11 @@ Pal::Result RgpCaptureMgr::EndRGPTrace(VirtualGPU* gpu) {
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// end the session itself
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if (result == Pal::Result::Success) {
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assert(trace_.gpa_session_ != nullptr);
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EngineType engine = (gpu->dev().settings().disableSdma_) ? MainEngine : SdmaEngine;
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// Initiate SDMA copy
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gpu->eventBegin(SdmaEngine);
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result = trace_.gpa_session_->End(gpu->queue(SdmaEngine).iCmd());
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gpu->eventEnd(SdmaEngine, trace_.end_event_);
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gpu->eventBegin(engine);
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result = trace_.gpa_session_->End(gpu->queue(engine).iCmd());
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gpu->eventEnd(engine, trace_.end_event_);
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}
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// Submit the trace-end command buffer
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@@ -1332,7 +1332,12 @@ bool Resource::partialMemCopyTo(VirtualGPU& gpu, const amd::Coord3D& srcOrigin,
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}
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}
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gpu.engineID_ = SdmaEngine;
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if (dev().settings().disableSdma_) {
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// Make sure compute is done before CP DMA start
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gpu.addBarrier(RgpSqqtBarrierReason::MemDependency);
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} else {
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gpu.engineID_ = SdmaEngine;
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}
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// Wait for the resources, since runtime may use async transfers
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wait(gpu, waitOnBusyEngine);
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@@ -1423,6 +1428,11 @@ bool Resource::partialMemCopyTo(VirtualGPU& gpu, const amd::Coord3D& srcOrigin,
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}
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}
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if (dev().settings().disableSdma_) {
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// Make sure CP dma is done
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gpu.addBarrier(RgpSqqtBarrierReason::MemDependency);
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}
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gpu.eventEnd(gpu.engineID_, event);
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// Mark source and destination as busy
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@@ -17,7 +17,7 @@ TimeStamp::TimeStamp(const VirtualGPU& gpu, Pal::IGpuMemory* iMem, uint memOffse
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TimeStamp::~TimeStamp() {}
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void TimeStamp::begin(bool sdma) {
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void TimeStamp::begin() {
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if (!flags_.beginIssued_) {
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gpu().iCmd()->CmdWriteTimestamp(Pal::HwPipePoint::HwPipeTop, *iMem_,
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memOffset_ + CommandStartTime * sizeof(uint64_t));
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@@ -25,12 +25,11 @@ void TimeStamp::begin(bool sdma) {
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}
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}
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void TimeStamp::end(bool sdma) {
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void TimeStamp::end() {
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CondLog(!flags_.beginIssued_, "We didn't issue a begin operation!");
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gpu().iCmd()->CmdWriteTimestamp(Pal::HwPipePoint::HwPipeTop, *iMem_,
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memOffset_ + CommandEndTime * sizeof(uint64_t));
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flags_.endIssued_ = true;
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flags_.sdma_ = sdma;
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}
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inline void SetValue(uint64_t* time, uint64_t val, double nanos) {
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@@ -57,7 +56,9 @@ TimeStampCache::~TimeStampCache() {
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for (uint i = 0; i < tsBuf_.size(); ++i) {
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tsBuf_[i]->unmap(&gpu_);
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gpu_.queue(MainEngine).removeMemRef(tsBuf_[i]->iMem());
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gpu_.queue(SdmaEngine).removeMemRef(tsBuf_[i]->iMem());
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if (!gpu_.dev().settings().disableSdma_) {
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gpu_.queue(SdmaEngine).removeMemRef(tsBuf_[i]->iMem());
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}
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delete tsBuf_[i];
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}
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tsBuf_.clear();
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@@ -77,7 +78,9 @@ TimeStamp* TimeStampCache::allocTimeStamp() {
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return nullptr;
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}
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gpu_.queue(MainEngine).addMemRef(buf->iMem());
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gpu_.queue(SdmaEngine).addMemRef(buf->iMem());
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if (!gpu_.dev().settings().disableSdma_) {
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gpu_.queue(SdmaEngine).addMemRef(buf->iMem());
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}
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tsBufCpu_ = reinterpret_cast<address>(buf->map(&gpu_));
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memset(tsBufCpu_, 0, TimerBufSize);
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tsOffset_ = 0;
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@@ -29,7 +29,6 @@ class TimeStamp : public amd::HeapObject {
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struct {
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uint32_t beginIssued_ : 1;
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uint32_t endIssued_ : 1;
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uint32_t sdma_ : 1;
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};
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uint32_t value_;
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Flags() : value_(0) {}
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@@ -46,10 +45,10 @@ class TimeStamp : public amd::HeapObject {
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~TimeStamp();
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//! Starts the timestamp
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void begin(bool sdma = false);
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void begin();
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//! Ends the timestamp
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void end(bool sdma = false);
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void end();
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//! Returns the timestamp result in nano seconds
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void value(uint64_t* startTime, uint64_t* endTime);
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@@ -838,13 +838,6 @@ bool VirtualGPU::create(bool profiling, uint deviceQueueSize, uint rtCUs,
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if (nullptr == queues_[SdmaEngine]) {
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return false;
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}
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} else {
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queues_[SdmaEngine] =
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Queue::Create(*this, Pal::QueueTypeCompute, idx, cmdAllocator_, rtCUs,
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amd::CommandQueue::Priority::Normal, residency_limit, max_cmd_buffers);
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if (nullptr == queues_[SdmaEngine]) {
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return false;
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}
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}
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} else {
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LogError("Runtme couldn't find compute queues!");
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@@ -2484,7 +2477,9 @@ void VirtualGPU::submitMarker(amd::Marker& vcmd) {
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void VirtualGPU::releaseMemory(GpuMemoryReference* mem) {
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queues_[MainEngine]->removeCmdMemRef(mem);
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queues_[SdmaEngine]->removeCmdMemRef(mem);
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if (!dev().settings().disableSdma_) {
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queues_[SdmaEngine]->removeCmdMemRef(mem);
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}
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}
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void VirtualGPU::submitPerfCounter(amd::PerfCounterCommand& vcmd) {
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@@ -3128,9 +3123,9 @@ void VirtualGPU::profileEvent(EngineType engine, bool type) const {
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return;
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}
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if (type) {
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profileTs_->begin((engine == SdmaEngine) ? true : false);
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profileTs_->begin();
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} else {
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profileTs_->end((engine == SdmaEngine) ? true : false);
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profileTs_->end();
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}
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}
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