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@@ -4,7 +4,7 @@ import sys
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import subprocess
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# Order of colls, redops, tys, protos, algos must match src/include/device.h
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all_colls = ["Broadcast", "Reduce", "AllGather", "ReduceScatter", "AllReduce", "AllReduceWithBias", "SendRecv", "", "", "AllToAllPivot"]
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all_colls = ["Broadcast", "Reduce", "AllGather", "ReduceScatter", "AllReduce", "SendRecv", "", "", "AllToAllPivot"]
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all_redops = ["Sum","Prod","MinMax","PreMulSum","SumPostDiv"]
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all_tys = ["i8","u8","i32","u32","i64","u64","f16","f32","f64","bf16","f8e4m3","f8e5m2"]
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all_protos = ["LL","LL128","SIMPLE"]
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@@ -82,14 +82,13 @@ func_pattern = sys.argv[6:7]
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if func_pattern and func_pattern[0]:
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func_pattern = func_pattern[0]
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else:
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func_pattern = "AllGather|AllReduce|AllReduceWithBias|AllToAllPivot|Broadcast|Reduce|ReduceScatter|SendRecv"
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func_pattern = "AllGather|AllReduce|AllToAllPivot|Broadcast|Reduce|ReduceScatter|SendRecv"
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################################################################################
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algos_of_coll = {
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"AllGather": ["RING", "PAT"],
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"AllReduce": ["RING", "TREE"],
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"AllReduceWithBias": ["RING", "TREE"],
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"AllToAllPivot": ["RING"],
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"Broadcast": ["RING"],
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"Reduce": ["RING"],
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@@ -100,7 +99,6 @@ algos_of_coll = {
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protos_of_coll = {
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"AllGather": all_protos,
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"AllReduce": all_protos,
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"AllReduceWithBias": all_protos,
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"AllToAllPivot": ["SIMPLE"],
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"Broadcast": all_protos,
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"Reduce": all_protos,
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@@ -111,7 +109,6 @@ protos_of_coll = {
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redops_of_coll = {
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"AllGather": ["Sum"],
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"AllReduce": all_redops,
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"AllReduceWithBias": all_redops,
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"AllToAllPivot": ["Sum"],
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"Broadcast": ["Sum"],
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"Reduce": all_redops,
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@@ -122,7 +119,6 @@ redops_of_coll = {
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tys_of_coll = {
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"AllGather": ["i8"],
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"AllReduce": all_tys,
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"AllReduceWithBias": all_tys,
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"AllToAllPivot": ["i8"],
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"Broadcast": ["i8"],
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"Reduce": all_tys,
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@@ -130,10 +126,19 @@ tys_of_coll = {
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"SendRecv": ["i8"]
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}
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acc_of_coll = {
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"AllGather": ["0"],
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"AllReduce": use_acc,
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"AllToAllPivot": ["0"],
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"Broadcast": ["0"],
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"Reduce": ["0"],
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"ReduceScatter": ["0"],
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"SendRecv": ["0"]
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}
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pipelines_of_coll = {
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"AllGather": ["0"],
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"AllReduce": all_pipeline,
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"AllReduceWithBias": ["0"],
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"AllToAllPivot": ["0"],
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"Broadcast": ["0"],
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"Reduce": all_pipeline,
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@@ -144,7 +149,6 @@ pipelines_of_coll = {
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coll_camel_to_lower = {
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"AllGather": "all_gather",
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"AllReduce": "all_reduce",
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"AllReduceWithBias": "allreduce_with_bias",
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"AllToAllPivot": "alltoall_pivot",
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"Broadcast": "broadcast",
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"Reduce": "reduce",
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@@ -197,15 +201,17 @@ def calc_unroll_for_local_arch():
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# Helper function to check if the conditions for the collective is being met
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def func_validate(coll, algo, proto, redop, ty, acc, pipeline, unroll):
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if acc == "1" and coll != "AllReduceWithBias":
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return False
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if acc == "0" and coll == "AllReduceWithBias":
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return False
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if redop == "SumPostDiv" and ty[0] not in ("i","u"):
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return False
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if coll == "" or algo == "":
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return False
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if algo not in algos_of_coll[coll] or proto not in protos_of_coll[coll] or redop not in redops_of_coll[coll] or ty not in tys_of_coll[coll] or acc not in use_acc or unroll not in all_unroll or pipeline not in pipelines_of_coll[coll] or (pipeline in ["1"] and ty not in pipelined_types):
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if (algo not in algos_of_coll[coll] or
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proto not in protos_of_coll[coll] or
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redop not in redops_of_coll[coll] or
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ty not in tys_of_coll[coll] or
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acc not in acc_of_coll[coll] or
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pipeline not in pipelines_of_coll[coll] or (pipeline in ["1"] and ty not in pipelined_types) or
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unroll not in all_unroll):
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return False
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return True
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@@ -274,7 +280,7 @@ def parse_input(func_pattern):
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# Maps functions to the chosen representative for the equivalence class it
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# belongs to. For instance (sum, signed int) maps to (sum, unsigned int).
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def equivalent_primary(coll, algo, proto, redop, ty, acc, pipeline, unroll):
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if coll in ("AllReduce", "AllReduceWithBias", "Reduce", "ReduceScatter"):
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if coll in ("AllReduce", "Reduce", "ReduceScatter"):
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# map signed integer sum/prod to unsigned
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if redop in ("Sum","Prod","PreMulSum","SumPostDiv") and ty[0]=="i":
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ty = "u"+ty[1:]
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@@ -291,26 +297,27 @@ def equivalent_primary(coll, algo, proto, redop, ty, acc, pipeline, unroll):
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# outermost loop should be for unroll factor; refer to host_table section
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def enumerate_func_rows():
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for unroll in all_unroll:
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for acc in use_acc:
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for coll in all_colls:
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for algo in all_algos:
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for proto in all_protos:
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for redop in all_redops:
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for ty in all_tys:
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for coll in all_colls:
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for algo in all_algos:
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for proto in all_protos:
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for redop in all_redops:
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for ty in all_tys:
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for acc in use_acc:
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for pipeline in all_pipeline:
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if func_validate(coll, algo, proto, redop, ty, acc, pipeline, unroll):
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yield (coll, algo, proto, redop, ty, acc, pipeline, unroll)
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# Sort the hashmap based on custom key <coll> <algo> <proto> <redop> <ty>
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def custom_sort_key(fn):
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coll, algo, proto, redop, ty, acc, pipeline, unroll = fn
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return (
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all_unroll.index(unroll),
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use_acc.index(acc),
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all_colls.index(coll),
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all_algos.index(algo),
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all_protos.index(proto),
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all_redops.index(redop),
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all_tys.index(ty),
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use_acc.index(acc),
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all_pipeline.index(pipeline)
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)
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@@ -488,15 +495,15 @@ with open(os.path.join(gensrc, "host_table.cpp"), "w") as f:
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out('#include "device.h"\n')
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out("\n")
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out("// The key for the ncclDevFuncNameToId map is a 64-bit unsigned integer.\n")
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out("// Each field (coll, algo, proto, redop, ty, pipeline) is packed into 4 bits,\n")
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out("// Each field (coll, algo, proto, redop, ty) is packed into 4 bits,\n")
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out("// Each field (coll, algo, proto, redop, ty, acc, pipeline) is packed into 4 bits,\n")
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out("// This allows up to 16 unique values per field. The layout is:\n")
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out("// bits 0-3: coll index\n")
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out("// bits 4-7: algo index\n")
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out("// bits 8-11: proto index\n")
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out("// bits 12-15: redop index\n")
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out("// bits 16-19: ty index\n")
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out("// bits 20-23: pipeline index\n")
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out("// bits 20-23: accumulator index\n")
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out("// bits 24-27: pipeline index\n")
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out("#include <unordered_map>\n")
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out("std::unordered_map<uint64_t, int> ncclDevFuncNameToId = {\n")
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@@ -515,6 +522,7 @@ with open(os.path.join(gensrc, "host_table.cpp"), "w") as f:
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proto_idx = all_protos.index(fn[2])
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redop_idx = all_redops.index(fn[3])
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ty_idx = all_tys.index(fn[4])
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acc_idx = use_acc.index(fn[5])
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pipeline_idx = all_pipeline.index(fn[6])
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# Assert that 4 bits (16 values) is enough to map all_colls, all_algos, etc.
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assert len(all_colls) <= 16, "Error: all_colls has more than 16 values, which exceeds 4-bit capacity."
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@@ -522,6 +530,7 @@ with open(os.path.join(gensrc, "host_table.cpp"), "w") as f:
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assert len(all_protos) <= 16, "Error: all_protos has more than 16 values, which exceeds 4-bit capacity."
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assert len(all_redops) <= 16, "Error: all_redops has more than 16 values, which exceeds 4-bit capacity."
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assert len(all_tys) <= 16, "Error: all_tys has more than 16 values, which exceeds 4-bit capacity."
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assert len(use_acc) <= 16, "Error: use_acc has more than 16 values, which exceeds 4-bit capacity."
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assert len(all_pipeline) <= 16, "Error: all_pipeline has more than 16 values, which exceeds 4-bit capacity."
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# Create a 64-bit unsigned integer key and pack the indices into 4 bits each
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key = (
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@@ -530,9 +539,10 @@ with open(os.path.join(gensrc, "host_table.cpp"), "w") as f:
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| ((proto_idx & 0xF) << 8)
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| ((redop_idx & 0xF) << 12)
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| ((ty_idx & 0xF) << 16)
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| ((pipeline_idx & 0xF) << 20)
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| ((acc_idx & 0xF) << 20)
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| ((pipeline_idx & 0xF) << 24)
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)
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fn_str = f"{coll_idx} {algo_idx} {proto_idx} {redop_idx} {ty_idx} {pipeline_idx}"
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fn_str = f"{coll_idx} {algo_idx} {proto_idx} {redop_idx} {ty_idx} {acc_idx} {pipeline_idx}"
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if fn[0] == "Broadcast":
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key = ((coll_idx & 0x3F) | ((proto_idx & 0x3F) << 8))
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if fn[0] in ["SendRecv", "AllToAllPivot"]:
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@@ -592,8 +602,6 @@ for name in name_to_funcs.keys():
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print("-- Generating %s" % os.path.join(gensrc, name))
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out = f.write
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if coll == "AllReduceWithBias":
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coll = "AllReduce"
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out(
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'#include "common.h"\n'
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'#include "{lower_coll}.h"\n'
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@@ -603,8 +611,6 @@ for name in name_to_funcs.keys():
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for fn in fns:
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(coll, algo, proto, redop, ty, acc, pipeline, unroll) = fn
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sym = paste("_", coll, algo, proto, redop, ty, acc, pipeline, unroll)
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if coll == "AllReduceWithBias":
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coll = "AllReduce"
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if proto == "LL128":
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out("#if (defined(__gfx90a__) || defined(__gfx942__) || defined(__gfx950__)) && defined(ENABLE_LL128)\n")
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out(
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