Make HSA_DISABLE_CACHE work on gfx900
Change-Id: I624390bfa70b2ff4cefd1bbdf8d960b7121f22bb
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: c48ff6b482]
Este cometimento está contido em:
@@ -44,7 +44,8 @@
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.guard_pages = 1, \
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.vm_ranges = NULL, \
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.vm_objects = NULL, \
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.fmm_mutex = PTHREAD_MUTEX_INITIALIZER \
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.fmm_mutex = PTHREAD_MUTEX_INITIALIZER, \
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.is_coherent = false \
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}
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struct vm_object {
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@@ -96,6 +97,7 @@ typedef struct {
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vm_area_t *vm_ranges;
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vm_object_t *vm_objects;
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pthread_mutex_t fmm_mutex;
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bool is_coherent;
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} manageable_aperture_t;
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typedef struct {
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@@ -1028,6 +1030,9 @@ void *fmm_allocate_device(uint32_t gpu_id, uint64_t MemorySizeInBytes, HsaMemFla
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offset = GPUVM_APP_OFFSET;
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}
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if (aperture->is_coherent)
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ioc_flags |= KFD_IOC_ALLOC_MEM_FLAGS_COHERENT;
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mem = __fmm_allocate_device(gpu_id, size,
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aperture, offset, &mmap_offset,
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ioc_flags, &vm_obj);
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@@ -1156,13 +1161,15 @@ static void *fmm_allocate_host_gpu(uint32_t node_id, uint64_t MemorySizeInBytes,
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size = MemorySizeInBytes;
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ioc_flags = 0;
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if (flags.ui32.CoarseGrain) {
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if (flags.ui32.CoarseGrain)
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aperture = &svm.dgpu_aperture;
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} else {
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aperture = &svm.dgpu_alt_aperture; /* coherent */
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else
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aperture = &svm.dgpu_alt_aperture; /* always coherent */
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if (aperture->is_coherent)
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ioc_flags |= KFD_IOC_ALLOC_MEM_FLAGS_COHERENT;
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}
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ioc_flags |= fmm_translate_hsa_to_ioc_flags(flags);
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if (flags.ui32.AQLQueueMemory)
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size = MemorySizeInBytes * 2;
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@@ -1548,7 +1555,9 @@ HSAKMT_STATUS fmm_init_process_apertures(unsigned int NumNodes)
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alt_size = (alt_size + 0xffff) & ~0xffffULL;
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svm.dgpu_alt_aperture.base = (void *)alt_base;
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svm.dgpu_alt_aperture.limit = (void *)(alt_base + alt_size - 1);
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svm.dgpu_alt_aperture.is_coherent = true;
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svm.dgpu_aperture.base = VOID_PTR_ADD(svm.dgpu_alt_aperture.limit, 1);
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svm.dgpu_aperture.is_coherent = !!disableCache;
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err = fmm_set_memory_policy(gpu_mem[gpu_mem_id].gpu_id,
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disableCache ?
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KFD_IOC_CACHE_POLICY_COHERENT :
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