kfdtest: Overhaul KFDCWSRTest.BasicTest
This patch restructures the CWSR basic test and allows for creating parameterized CWSR tests. This patch introduces four parameterizations. These tests behave as follows: This test dispatches the IterateIsa shader, which continuously increments a vgpr for (num_witems / WAVE_SIZE) waves. While this shader is running, dequeue/requeue requests are sent in a loop to trigger CWSRs. This test defines a CWSR threshold. Once the number of CWSRs triggered reaches the threshold, a known-value is filled into the inputBuf to signal the shader to exit. 4 parameterized tests are defined: KFDCWSRTest.BasicTest/0 KFDCWSRTest.BasicTest/1 KFDCWSRTest.BasicTest/2 KFDCWSRTest.BasicTest/3 0: 1 work-item, CWSR threshold of 10 1: 256 work-items, CWSR threshold of 50 2: 512 work-items, CWSR threshold of 100 3: 1024 work-items, CWSR threshold of 1000 Tuple Format: (num_witems, cwsr_thresh) num_witems: Defines the number of work-items. cwsr_thresh: Defines the number of CWSRs to trigger. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Change-Id: I639eb7bd75b14ee70e190b4bd19dcf34096fc7bf
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@@ -29,8 +29,6 @@ void KFDCWSRTest::SetUp() {
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KFDBaseComponentTest::SetUp();
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wave_number = 1;
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ROUTINE_END
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}
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@@ -42,14 +40,6 @@ void KFDCWSRTest::TearDown() {
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ROUTINE_END
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}
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bool isOnEmulator() {
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uint32_t isEmuMode = 0;
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fscanf_dec("/sys/module/amdgpu/parameters/emu_mode", &isEmuMode);
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return isEmuMode;
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}
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static inline uint32_t checkCWSREnabled() {
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uint32_t cwsr_enable = 0;
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@@ -61,66 +51,93 @@ static inline uint32_t checkCWSREnabled() {
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/**
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* KFDCWSRTest.BasicTest
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*
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* This test dispatches the loop_inc_isa shader and lets it run, ensuring its destination pointer gets incremented.
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* It then triggers CWSR and ensures the shader stops running.
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* It then resumes the shader, ensures that it's running again and terminates it.
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* This test dispatches the IterateIsa shader, which continuously increments a vgpr for
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* (num_witems / WAVE_SIZE) waves. While this shader is running, dequeue/requeue requests
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* are sent in a loop to trigger CWSRs.
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*
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* This is a paremeterized test. See the INSTANTIATE_TEST_CASE_P below for an explanation
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* on the parameters.
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*
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* This test defines a CWSR threshold. The shader will continuously loop until inputBuf is
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* filled with the known stop value, which occurs once cwsr_thresh CWSRs have been
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* successfully triggered.
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*
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* 4 parameterized tests are defined:
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*
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* KFDCWSRTest.BasicTest/0
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* KFDCWSRTest.BasicTest/1
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* KFDCWSRTest.BasicTest/2
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* KFDCWSRTest.BasicTest/3
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*
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* 0: 1 work-item, CWSR threshold of 10
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* 1: 256 work-items (multi-wave), CWSR threshold of 50
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* 2: 512 work-items (multi-wave), CWSR threshold of 100
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* 3: 1024 work-items (multi-wave), CWSR threshold of 1000
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*/
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TEST_F(KFDCWSRTest, BasicTest) {
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TEST_P(KFDCWSRTest, BasicTest) {
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TEST_START(TESTPROFILE_RUNALL);
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int num_witems = std::get<0>(GetParam());
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int cwsr_thresh = std::get<1>(GetParam());
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int defaultGPUNode = m_NodeInfo.HsaDefaultGPUNode();
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if ((m_FamilyId >= FAMILY_VI) && (checkCWSREnabled())) {
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HsaMemoryBuffer isaBuffer(PAGE_SIZE, defaultGPUNode, true/*zero*/, false/*local*/, true/*exec*/);
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HsaMemoryBuffer resultBuf1(PAGE_SIZE, defaultGPUNode, true, false, false);
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uint64_t count1 = 400000000;
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if (isOnEmulator()) {
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// Divide the iterator times by 10000 so that the test can
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// finish in a reasonable time.
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count1 /= 10000;
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LOG() << "On Emulators" << std::endl;
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}
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unsigned int* result1 = resultBuf1.As<unsigned int*>();
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HsaMemoryBuffer isaBuffer(PAGE_SIZE, defaultGPUNode, true, false, true);
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ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(IterateIsa, isaBuffer.As<char*>()));
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PM4Queue queue1;
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unsigned stopval = 0x1234'5678;
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unsigned outval = 0x8765'4321;
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ASSERT_SUCCESS(queue1.Create(defaultGPUNode));
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HsaMemoryBuffer inputBuf(PAGE_SIZE, defaultGPUNode, true, false, false);
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HsaMemoryBuffer outputBuf(PAGE_SIZE, defaultGPUNode, true, false, false);
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unsigned int* input = inputBuf.As<unsigned int*>();
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unsigned int* output = outputBuf.As<unsigned int*>();
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inputBuf.Fill(0);
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outputBuf.Fill(outval);
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Dispatch *dispatch1;
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PM4Queue queue;
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ASSERT_SUCCESS(queue.Create(defaultGPUNode));
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dispatch1 = new Dispatch(isaBuffer);
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Dispatch dispatch(isaBuffer);
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dispatch.SetArgs(input, output);
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dispatch.SetDim(num_witems, 1, 1);
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dispatch.Submit(queue);
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dispatch1->SetArgs(reinterpret_cast<void *>(count1), result1);
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dispatch1->SetDim(wave_number, 1, 1);
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// Submit the shader, queue1
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dispatch1->Submit(queue1);
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//Give time for waves to launch before disabling queue.
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Delay(1);
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EXPECT_SUCCESS(queue1.Update(0/*percentage*/, BaseQueue::DEFAULT_PRIORITY, false));
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Delay(5);
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EXPECT_SUCCESS(queue1.Update(100/*percentage*/, BaseQueue::DEFAULT_PRIORITY, false));
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dispatch1->Sync();
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// Ensure all the waves complete as expected
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int i;
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for (i = 0 ; i < wave_number; ++i) {
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if (result1[i] != count1) {
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LOG() << "Dispatch 1, work item [" << std::dec << i << "] "
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<< result1[i] << " != " << count1 << std::endl;
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break;
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LOG() << "Starting iteration for " << std::dec << num_witems
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<< " work items(s) (targeting " << std::dec << cwsr_thresh
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<< " CWSRs)" << std::endl;
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for (int num_cwsrs = 0; num_cwsrs < cwsr_thresh; num_cwsrs++) {
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// Send dequeue request
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EXPECT_SUCCESS(queue.Update(0, BaseQueue::DEFAULT_PRIORITY, false));
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Delay(5);
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// Send requeue request
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EXPECT_SUCCESS(queue.Update(100, BaseQueue::DEFAULT_PRIORITY, false));
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Delay(50);
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// Check for reg mangling
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for (int i = 0; i < num_witems; i++) {
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EXPECT_EQ(outval, output[i]);
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}
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}
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EXPECT_EQ(i, wave_number);
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EXPECT_SUCCESS(queue1.Destroy());
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LOG() << "Successful completion for " << std::dec << num_witems
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<< " work item(s) (CWSRs triggered: " << std::dec << cwsr_thresh
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<< ")" << std::endl;
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LOG() << "Signalling shader stop..." << std::endl;
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delete dispatch1;
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inputBuf.Fill(stopval);
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// Wait for shader to finish or timeout if shader has vm page fault
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EXPECT_EQ(0, dispatch.SyncWithStatus(180000));
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EXPECT_SUCCESS(queue.Destroy());
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} else {
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LOG() << "Skipping test: No CWSR present for family ID 0x" << m_FamilyId << "." << std::endl;
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}
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@@ -128,6 +145,23 @@ TEST_F(KFDCWSRTest, BasicTest) {
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TEST_END
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}
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/**
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* Instantiates various KFDCWSRTest.BasicTest parameterizations
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* Tuple Format: (num_witems, cwsr_thresh)
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*
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* num_witems: Defines the number of work-items.
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* cwsr_thresh: Defines the number of CWSRs to trigger.
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*/
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INSTANTIATE_TEST_CASE_P(
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, KFDCWSRTest,
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::testing::Values(
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std::make_tuple(1, 10), /* Single Wave Test, 10 CWSR Triggers */
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std::make_tuple(256, 50), /* Multi Wave Test, 50 CWSR Triggers */
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std::make_tuple(512, 100), /* Multi Wave Test, 100 CWSR Triggers */
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std::make_tuple(1024, 1000) /* Multi Wave Test, 1000 CWSR Triggers */
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)
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);
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/**
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* KFDCWSRTest.InterruptRestore
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*
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@@ -29,7 +29,8 @@
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#include "PM4Queue.hpp"
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#include "KFDBaseComponentTest.hpp"
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class KFDCWSRTest : public KFDBaseComponentTest {
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class KFDCWSRTest : public KFDBaseComponentTest,
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public ::testing::WithParamInterface<std::tuple<int, int>> {
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public:
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KFDCWSRTest() {}
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~KFDCWSRTest() {}
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@@ -37,9 +38,6 @@ class KFDCWSRTest : public KFDBaseComponentTest {
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protected:
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virtual void SetUp();
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virtual void TearDown();
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protected: // Members
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unsigned wave_number;
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};
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#endif // __KFD_CWSR_TEST__H__
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@@ -453,35 +453,50 @@ const char *LoopIsa = R"(
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*/
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/* Initial state:
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* s[0:1] - 64 bits iteration number; only the lower 32 bits are useful.
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* s[2:3] - result buffer base address
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* s[0:1] - input buffer base address
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* s[2:3] - output buffer base address
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* s4 - workgroup id
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* v0 - workitem id, always 0 because
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* NUM_THREADS_X(number of threads) in workgroup set to 1
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* v0 - workitem id
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* Registers:
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* v0 - calculated workitem = v0 + s4 * NUM_THREADS_X, which is s4
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* v2 - = s0, 32 bits iteration number
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* v[2:3] - corresponding input buf address: s[0:1] + v0 * 8
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* v[4:5] - corresponding output buf address: s[2:3] + v0 * 4
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* v6 - counter
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* v6 - register storing known-value output for mangle testing
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* v7 - counter
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*/
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const char *IterateIsa = SHADER_MACROS R"(
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// Copy the parameters from scalar registers to vector registers
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v_mov_b32 v2, s0 // v[2:3] = s[0:1]
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v_mov_b32 v3, s1 // v[2:3] = s[0:1]
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// Compute address of output buffer
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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V_ADD_CO_U32 v4, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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V_ADD_CO_CI_U32 v5, v5, 0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v6, 0
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LOOP:
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V_ADD_CO_U32 v6, 1, v6
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// Compare the result value (v6) to iteration value (v2), and
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// jump if equal (i.e. if VCC is not zero after the comparison)
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V_CMP_LT_U32 v6, v2
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s_cbranch_vccnz LOOP
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flat_store_dword v[4:5], v6
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// Compute address of input buffer
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v_lshlrev_b32 v0, 1, v0 // v0 *= 8
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V_ADD_CO_U32 v2, s0, v0 // v[2:3] = s[0:1] + v0 * 8
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v_mov_b32 v3, s1 // v[2:3] = s[0:1] + v0 * 8
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V_ADD_CO_CI_U32 v3, v3, 0 // v[2:3] = s[0:1] + v0 * 8
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// Store known-value output in register
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flat_load_dword v6, v[4:5] glc
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s_waitcnt vmcnt(0) & lgkmcnt(0) // wait for memory reads to finish
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// Initialize counter
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v_mov_b32 v7, 0
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LOOP:
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flat_store_dword v[4:5], v6 // store known-val in output
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V_ADD_CO_U32 v7, 1, v7 // increment counter
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s_load_dword s6, s[0:1], 0 glc
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s_waitcnt vmcnt(0) & lgkmcnt(0) // wait for memory reads to finish
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s_cmp_eq_i32 s6, 0x12345678 // compare input buf to stopval
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s_cbranch_scc1 L_QUIT // branch if notified to quit by host
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s_branch LOOP
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L_QUIT:
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s_waitcnt vmcnt(0) & lgkmcnt(0)
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s_endpgm
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)";
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