EXSWHTEC-275 - Implement tests for atomic CAS operations. (#197)
[ROCm/hip-tests commit: a8640d8c62]
This commit is contained in:
Mirza Halilčević
GitHub
@@ -0,0 +1,42 @@
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# Copyright (c) 2023 Advanced Micro Devices, Inc. All Rights Reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
|
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
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# copies of the Software, and to permit persons to whom the Software is
|
||||
# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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# THE SOFTWARE.
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set(TEST_SRC
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atomicCAS.cc
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atomicCAS_system.cc
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)
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if(HIP_PLATFORM MATCHES "nvidia")
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set_source_files_properties(atomicCAS_system.cc PROPERTIES COMPILE_FLAGS "-rdc=true -gencode arch=compute_60,code=sm_60 -gencode arch=compute_70,code=sm_70 -gencode arch=compute_80,code=sm_80")
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hip_add_exe_to_target(NAME AtomicsTest
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TEST_SRC ${TEST_SRC}
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TEST_TARGET_NAME build_tests
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LINKER_LIBS "nvrtc -rdc=true -gencode arch=compute_60,code=sm_60 -gencode arch=compute_70,code=sm_70 -gencode arch=compute_80,code=sm_80")
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elseif(HIP_PLATFORM MATCHES "amd")
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hip_add_exe_to_target(NAME AtomicsTest
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TEST_SRC ${TEST_SRC}
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TEST_TARGET_NAME build_tests
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LINKER_LIBS hiprtc)
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endif()
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add_test(NAME Unit_atomicCAS_Negative_Parameters
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COMMAND python3 ${CMAKE_CURRENT_SOURCE_DIR}/../compileAndCaptureOutput.py
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${CMAKE_CURRENT_SOURCE_DIR} ${HIP_PLATFORM} ${HIP_PATH}
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atomicCAS_negative_kernels.cc 48)
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@@ -0,0 +1,449 @@
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/*
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Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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#pragma once
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#include <hip_test_common.hh>
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#include <hip/hip_cooperative_groups.h>
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#include <resource_guards.hh>
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#include <cmd_options.hh>
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namespace cg = cooperative_groups;
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enum class AtomicOperation {
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kAdd = 0,
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kAddSystem,
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kSub,
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kSubSystem,
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kInc,
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kDec,
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kUnsafeAdd,
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kSafeAdd,
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kCASAdd,
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kCASAddSystem
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};
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constexpr auto kIntegerTestValue = 7;
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constexpr auto kFloatingPointTestValue = 3.125;
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constexpr auto kIncDecWraparoundValue = 1023;
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template <typename TestType, AtomicOperation operation>
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__host__ __device__ TestType GetTestValue() {
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if constexpr (operation == AtomicOperation::kInc || operation == AtomicOperation::kDec) {
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return kIncDecWraparoundValue;
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}
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return std::is_floating_point_v<TestType> ? kFloatingPointTestValue : kIntegerTestValue;
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}
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template <typename TestType> __device__ TestType CASAtomicAdd(TestType* address, TestType val) {
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TestType old = *address, assumed;
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do {
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assumed = old;
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old = atomicCAS(address, assumed, val + assumed);
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} while (assumed != old);
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return old;
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}
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template <typename TestType>
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__device__ TestType CASAtomicAddSystem(TestType* address, TestType val) {
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TestType old = *address, assumed;
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do {
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assumed = old;
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old = atomicCAS_system(address, assumed, val + assumed);
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} while (assumed != old);
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return old;
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}
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template <typename TestType, AtomicOperation operation>
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__device__ TestType PerformAtomicOperation(TestType* const mem) {
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const auto val = GetTestValue<TestType, operation>();
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if constexpr (operation == AtomicOperation::kAdd) {
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return atomicAdd(mem, val);
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} else if constexpr (operation == AtomicOperation::kAddSystem) {
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return atomicAdd_system(mem, val);
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} else if constexpr (operation == AtomicOperation::kSub) {
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return atomicSub(mem, val);
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} else if constexpr (operation == AtomicOperation::kSubSystem) {
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return atomicSub_system(mem, val);
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} else if constexpr (operation == AtomicOperation::kInc) {
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return atomicInc(mem, val);
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} else if constexpr (operation == AtomicOperation::kDec) {
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return atomicDec(mem, val);
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} else if constexpr (operation == AtomicOperation::kUnsafeAdd) {
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return unsafeAtomicAdd(mem, val);
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} else if constexpr (operation == AtomicOperation::kSafeAdd) {
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return safeAtomicAdd(mem, val);
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} else if constexpr (operation == AtomicOperation::kCASAdd) {
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return CASAtomicAdd(mem, val);
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} else if constexpr (operation == AtomicOperation::kCASAddSystem) {
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return CASAtomicAddSystem(mem, val);
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}
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}
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template <typename TestType, AtomicOperation operation, bool use_shared_mem>
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__global__ void TestKernel(TestType* const global_mem, TestType* const old_vals) {
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__shared__ TestType shared_mem;
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const auto tid = cg::this_grid().thread_rank();
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TestType* const mem = use_shared_mem ? &shared_mem : global_mem;
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if constexpr (use_shared_mem) {
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if (tid == 0) mem[0] = global_mem[0];
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__syncthreads();
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}
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old_vals[tid] = PerformAtomicOperation<TestType, operation>(mem);
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if constexpr (use_shared_mem) {
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__syncthreads();
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if (tid == 0) global_mem[0] = mem[0];
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}
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}
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template <typename TestType>
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__host__ __device__ TestType* PitchedOffset(TestType* const ptr, const unsigned int pitch,
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const unsigned int idx) {
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const auto byte_ptr = reinterpret_cast<uint8_t*>(ptr);
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return reinterpret_cast<TestType*>(byte_ptr + idx * pitch);
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}
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template <typename TestType, AtomicOperation operation, bool use_shared_mem>
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__global__ void TestKernel(TestType* const global_mem, TestType* const old_vals,
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const unsigned int width, const unsigned pitch) {
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extern __shared__ uint8_t shared_mem[];
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const auto tid = cg::this_grid().thread_rank();
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TestType* const mem = use_shared_mem ? reinterpret_cast<TestType*>(shared_mem) : global_mem;
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if constexpr (use_shared_mem) {
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if (tid < width) {
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const auto target = PitchedOffset(mem, pitch, tid);
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*target = *PitchedOffset(global_mem, pitch, tid);
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};
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__syncthreads();
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}
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old_vals[tid] =
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PerformAtomicOperation<TestType, operation>(PitchedOffset(mem, pitch, tid % width));
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if constexpr (use_shared_mem) {
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__syncthreads();
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if (tid < width) {
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const auto target = PitchedOffset(global_mem, pitch, tid);
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*target = *PitchedOffset(mem, pitch, tid);
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};
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}
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}
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struct TestParams {
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auto ThreadCount() const {
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return blocks.x * blocks.y * blocks.z * threads.x * threads.y * threads.z;
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}
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auto HostIterationsPerThread() const {
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return std::max(num_devices * kernel_count * ThreadCount() / 20, width);
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}
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dim3 blocks;
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dim3 threads;
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unsigned int num_devices = 1u;
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unsigned int kernel_count = 1u;
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unsigned int width = 1u;
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unsigned int pitch = 0u;
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unsigned int host_thread_count = 0u;
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LinearAllocs alloc_type;
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};
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template <typename TestType, AtomicOperation operation>
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std::tuple<std::vector<TestType>, std::vector<TestType>> TestKernelHostRef(const TestParams& p) {
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const auto val = GetTestValue<TestType, operation>();
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const auto total_thread_count = p.num_devices * p.kernel_count * p.ThreadCount() +
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p.host_thread_count * p.HostIterationsPerThread();
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std::vector<TestType> res_vals(p.width);
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std::vector<TestType> old_vals;
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old_vals.reserve(total_thread_count);
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auto perform_op = [&](unsigned id) {
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auto& res = res_vals[id % p.width];
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old_vals.push_back(res);
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if constexpr (operation == AtomicOperation::kAdd || operation == AtomicOperation::kAddSystem ||
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operation == AtomicOperation::kUnsafeAdd ||
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operation == AtomicOperation::kSafeAdd || operation == AtomicOperation::kCASAdd ||
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operation == AtomicOperation::kCASAddSystem) {
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res = res + val;
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} else if constexpr (operation == AtomicOperation::kSub ||
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operation == AtomicOperation::kSubSystem) {
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res = res - val;
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} else if constexpr (operation == AtomicOperation::kInc) {
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res = (res >= val) ? 0 : res + 1;
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} else if constexpr (operation == AtomicOperation::kDec) {
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res = ((res == 0) || (res > val)) ? val : res - 1;
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}
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};
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for (auto i = 0u; i < p.num_devices; ++i) {
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for (auto j = 0u; j < p.kernel_count; ++j) {
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for (auto tid = 0u; tid < p.ThreadCount(); ++tid) {
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perform_op(tid);
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}
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}
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}
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for (auto i = 0u; i < p.host_thread_count; ++i) {
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for (auto j = 0u; j < p.HostIterationsPerThread(); ++j) {
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perform_op(j);
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}
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}
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return {res_vals, old_vals};
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}
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template <typename TestType, AtomicOperation operation>
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void Verify(const TestParams& p, std::vector<TestType>& res_vals, std::vector<TestType>& old_vals) {
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auto [expected_res_vals, expected_old_vals] = TestKernelHostRef<TestType, operation>(p);
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for (auto i = 0u; i < res_vals.size(); ++i) {
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INFO("Results index: " << i);
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REQUIRE(expected_res_vals[i] == res_vals[i]);
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}
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std::sort(begin(old_vals), end(old_vals));
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std::sort(begin(expected_old_vals), end(expected_old_vals));
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for (auto i = 0u; i < old_vals.size(); ++i) {
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INFO("Old values index: " << i);
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REQUIRE(expected_old_vals[i] == old_vals[i]);
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}
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}
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template <typename TestType, AtomicOperation operation, bool use_shared_mem>
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void LaunchKernel(const TestParams& p, hipStream_t stream, TestType* const mem_ptr,
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TestType* const old_vals) {
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const auto shared_mem_size = use_shared_mem ? p.width * p.pitch : 0u;
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if (p.width == 1 && p.pitch == sizeof(TestType))
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TestKernel<TestType, operation, use_shared_mem>
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<<<p.blocks, p.threads, shared_mem_size, stream>>>(mem_ptr, old_vals);
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else
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TestKernel<TestType, operation, use_shared_mem>
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<<<p.blocks, p.threads, shared_mem_size, stream>>>(mem_ptr, old_vals, p.width, p.pitch);
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}
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template <typename TestType, AtomicOperation operation>
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void HostAtomicOperation(const unsigned int iterations, TestType* mem, TestType* const old_vals,
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const unsigned int width, const unsigned pitch, TestType base_val) {
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const auto val = GetTestValue<TestType, operation>();
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for (auto i = 0u; i < iterations; ++i) {
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if constexpr (operation == AtomicOperation::kAddSystem ||
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operation == AtomicOperation::kCASAddSystem) {
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old_vals[i] = __atomic_fetch_add(PitchedOffset(mem, pitch, i % width), val, __ATOMIC_RELAXED);
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} else if constexpr (operation == AtomicOperation::kSubSystem) {
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old_vals[i] = __atomic_fetch_sub(PitchedOffset(mem, pitch, i % width), val, __ATOMIC_RELAXED);
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}
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}
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}
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template <typename TestType, AtomicOperation operation>
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void PerformHostAtomicOperation(const TestParams& p, TestType* mem, TestType* const old_vals) {
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if (p.host_thread_count == 0) {
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return;
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}
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const auto host_base_val = p.num_devices * p.kernel_count * p.ThreadCount();
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std::vector<std::thread> threads;
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for (auto i = 0u; i < p.host_thread_count; ++i) {
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const auto iterations = p.HostIterationsPerThread();
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const auto thread_base_val = host_base_val + i * iterations;
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threads.push_back(std::thread(HostAtomicOperation<TestType, operation>, iterations, mem,
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old_vals + thread_base_val, p.width, p.pitch, thread_base_val));
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}
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for (auto& th : threads) {
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th.join();
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}
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}
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template <typename TestType, AtomicOperation operation, bool use_shared_mem>
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void TestCore(const TestParams& p) {
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const unsigned int flags =
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p.alloc_type == LinearAllocs::mallocAndRegister ? hipHostRegisterMapped : 0u;
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const auto old_vals_alloc_size = p.kernel_count * p.ThreadCount() * sizeof(TestType);
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std::vector<LinearAllocGuard<TestType>> old_vals_devs;
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std::vector<StreamGuard> streams;
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for (auto i = 0; i < p.num_devices; ++i) {
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HIP_CHECK(hipSetDevice(i));
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old_vals_devs.emplace_back(LinearAllocs::hipMalloc, old_vals_alloc_size);
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for (auto j = 0; j < p.kernel_count; ++j) {
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streams.emplace_back(Streams::created);
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}
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}
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const auto mem_alloc_size = p.width * p.pitch;
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LinearAllocGuard<TestType> mem_dev(p.alloc_type, mem_alloc_size, flags);
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std::vector<TestType> old_vals(p.num_devices * p.kernel_count * p.ThreadCount() +
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p.host_thread_count * p.HostIterationsPerThread());
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std::vector<TestType> res_vals(p.width);
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TestType* const mem_ptr =
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p.alloc_type == LinearAllocs::hipMalloc ? mem_dev.ptr() : mem_dev.host_ptr();
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HIP_CHECK(hipMemset(mem_ptr, 0, mem_alloc_size));
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for (auto i = 0u; i < p.num_devices; ++i) {
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for (auto j = 0u; j < p.kernel_count; ++j) {
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const auto& stream = streams[i * p.kernel_count + j].stream();
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const auto old_vals = old_vals_devs[i].ptr() + j * p.ThreadCount();
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LaunchKernel<TestType, operation, use_shared_mem>(p, stream, mem_dev.ptr(), old_vals);
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}
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}
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PerformHostAtomicOperation<TestType, operation>(p, mem_dev.host_ptr(), old_vals.data());
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for (auto i = 0u; i < p.num_devices; ++i) {
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const auto device_offset = i * p.kernel_count * p.ThreadCount();
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HIP_CHECK(hipMemcpy(old_vals.data() + device_offset, old_vals_devs[i].ptr(),
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old_vals_alloc_size, hipMemcpyDeviceToHost));
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}
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HIP_CHECK(hipMemcpy2D(res_vals.data(), sizeof(TestType), mem_ptr, p.pitch, sizeof(TestType),
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p.width, hipMemcpyDeviceToHost));
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Verify<TestType, operation>(p, res_vals, old_vals);
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}
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inline dim3 GenerateThreadDimensions() { return GENERATE(dim3(16), dim3(1024)); }
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inline dim3 GenerateBlockDimensions() {
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int sm_count = 0;
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HIP_CHECK(hipDeviceGetAttribute(&sm_count, hipDeviceAttributeMultiprocessorCount, 0));
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return GENERATE_COPY(dim3(sm_count), dim3(sm_count + sm_count / 2));
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}
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template <typename TestType, AtomicOperation operation>
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void SingleDeviceSingleKernelTest(const unsigned int width, const unsigned int pitch) {
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TestParams params;
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params.num_devices = 1;
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params.kernel_count = 1;
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params.threads = GenerateThreadDimensions();
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params.width = width;
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params.pitch = pitch;
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SECTION("Global memory") {
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params.blocks = GenerateBlockDimensions();
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using LA = LinearAllocs;
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for (const auto alloc_type :
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{LA::hipMalloc, LA::hipHostMalloc, LA::hipMallocManaged, LA::mallocAndRegister}) {
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params.alloc_type = alloc_type;
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DYNAMIC_SECTION("Allocation type: " << to_string(alloc_type)) {
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TestCore<TestType, operation, false>(params);
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}
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}
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}
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SECTION("Shared memory") {
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params.blocks = dim3(1);
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params.alloc_type = LinearAllocs::hipMalloc;
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TestCore<TestType, operation, true>(params);
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}
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}
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template <typename TestType, AtomicOperation operation>
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void SingleDeviceMultipleKernelTest(const unsigned int kernel_count, const unsigned int width,
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const unsigned int pitch) {
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int concurrent_kernels = 0;
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HIP_CHECK(hipDeviceGetAttribute(&concurrent_kernels, hipDeviceAttributeConcurrentKernels, 0));
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if (!concurrent_kernels) {
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HipTest::HIP_SKIP_TEST("Test requires support for concurrent kernel execution");
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return;
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}
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||||
|
||||
TestParams params;
|
||||
params.num_devices = 1;
|
||||
params.kernel_count = kernel_count;
|
||||
params.blocks = GenerateBlockDimensions();
|
||||
params.threads = GenerateThreadDimensions();
|
||||
params.width = width;
|
||||
params.pitch = pitch;
|
||||
|
||||
using LA = LinearAllocs;
|
||||
for (const auto alloc_type :
|
||||
{LA::hipMalloc, LA::hipHostMalloc, LA::hipMallocManaged, LA::mallocAndRegister}) {
|
||||
params.alloc_type = alloc_type;
|
||||
DYNAMIC_SECTION("Allocation type: " << to_string(alloc_type)) {
|
||||
TestCore<TestType, operation, false>(params);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
template <typename TestType, AtomicOperation operation>
|
||||
void MultipleDeviceMultipleKernelAndHostTest(const unsigned int num_devices,
|
||||
const unsigned int kernel_count,
|
||||
const unsigned int width, const unsigned int pitch,
|
||||
const unsigned int host_thread_count = 0u) {
|
||||
if (num_devices > 1) {
|
||||
if (HipTest::getDeviceCount() < num_devices) {
|
||||
std::string msg = std::to_string(num_devices) + " devices are required";
|
||||
HipTest::HIP_SKIP_TEST(msg.c_str());
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
if (kernel_count > 1) {
|
||||
for (auto i = 0u; i < num_devices; ++i) {
|
||||
int concurrent_kernels = 0;
|
||||
HIP_CHECK(hipDeviceGetAttribute(&concurrent_kernels, hipDeviceAttributeConcurrentKernels, i));
|
||||
if (!concurrent_kernels) {
|
||||
HipTest::HIP_SKIP_TEST("Test requires support for concurrent kernel execution");
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
TestParams params;
|
||||
params.num_devices = num_devices;
|
||||
params.kernel_count = kernel_count;
|
||||
params.blocks = GenerateBlockDimensions();
|
||||
params.threads = GenerateThreadDimensions();
|
||||
params.width = width;
|
||||
params.pitch = pitch;
|
||||
params.host_thread_count = host_thread_count;
|
||||
|
||||
using LA = LinearAllocs;
|
||||
for (const auto alloc_type : {LA::hipHostMalloc, LA::hipMallocManaged, LA::mallocAndRegister}) {
|
||||
params.alloc_type = alloc_type;
|
||||
DYNAMIC_SECTION("Allocation type: " << to_string(alloc_type)) {
|
||||
TestCore<TestType, operation, false>(params);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,172 @@
|
||||
/*
|
||||
Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved.
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "arithmetic_common.hh"
|
||||
#include "atomicCAS_negative_kernels_rtc.hh"
|
||||
|
||||
#include <hip_test_common.hh>
|
||||
|
||||
/**
|
||||
* @addtogroup atomicCAS atomicCAS
|
||||
* @{
|
||||
* @ingroup AtomicsTest
|
||||
*/
|
||||
|
||||
#ifdef HT_NVIDIA
|
||||
#define TYPES
|
||||
#else
|
||||
#define TYPES , float, double
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Test Description
|
||||
* ------------------------
|
||||
* - Executes a single kernel on a single device wherein all threads will perform an atomic
|
||||
* addition, implemented using an atomic CAS operation, on a target memory location. Each thread
|
||||
* will add the same value to the memory location, storing the return value into a separate output
|
||||
* array slot corresponding to it. Once complete, the output array and target memory is validated to
|
||||
* contain all the expected values. Several memory access patterns are tested:
|
||||
* -# All threads exchange to a single, compile time deducible, memory location
|
||||
* -# Each thread targets an array containing warp_size elements, using tid % warp_size
|
||||
* for indexing
|
||||
* -# Same as the above, but the elements are spread out by L1 cache line size bytes.
|
||||
*
|
||||
* - The test is run for:
|
||||
* - All overloads of atomicCAS
|
||||
* - hipMalloc, hipMallocManaged, hipHostMalloc and hipHostRegister allocated memory
|
||||
* - Shared memory
|
||||
* - Several grid and block dimension combinations (only one block is used for shared memory).
|
||||
* Test source
|
||||
* ------------------------
|
||||
* - unit/atomics/atomicCAS.cc
|
||||
* Test requirements
|
||||
* ------------------------
|
||||
* - HIP_VERSION >= 5.2
|
||||
*/
|
||||
TEMPLATE_TEST_CASE("Unit_atomicCAS_Positive", "", int, unsigned int, unsigned long long TYPES) {
|
||||
int warp_size = 0;
|
||||
HIP_CHECK(hipDeviceGetAttribute(&warp_size, hipDeviceAttributeWarpSize, 0));
|
||||
const auto cache_line_size = 128u;
|
||||
|
||||
for (auto current = 0; current < cmd_options.iterations; ++current) {
|
||||
DYNAMIC_SECTION("Same address " << current) {
|
||||
SingleDeviceSingleKernelTest<TestType, AtomicOperation::kCASAdd>(1, sizeof(TestType));
|
||||
}
|
||||
|
||||
DYNAMIC_SECTION("Adjacent addresses " << current) {
|
||||
SingleDeviceSingleKernelTest<TestType, AtomicOperation::kCASAdd>(warp_size, sizeof(TestType));
|
||||
}
|
||||
|
||||
DYNAMIC_SECTION("Scattered addresses " << current) {
|
||||
SingleDeviceSingleKernelTest<TestType, AtomicOperation::kCASAdd>(warp_size, cache_line_size);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Test Description
|
||||
* ------------------------
|
||||
* - Executes a kernel two times concurrently on a single device wherein all threads will perform
|
||||
* an atomic addition, implemented using an atomic CAS operation, on a target memory location. Each
|
||||
* thread will add the same value to the memory location, storing the return value into a separate
|
||||
* output array slot corresponding to it. Once complete, the output array and target memory is
|
||||
* validated to contain all the expected values. Several memory access patterns are tested:
|
||||
* -# All threads exchange to a single, compile time deducible, memory location
|
||||
* -# Each thread targets an array containing warp_size elements, using tid % warp_size
|
||||
* for indexing
|
||||
* -# Same as the above, but the elements are spread out by L1 cache line size bytes.
|
||||
*
|
||||
* - The test is run for:
|
||||
* - All overloads of atomicCAS
|
||||
* - hipMalloc, hipMallocManaged, hipHostMalloc and hipHostRegister allocated memory
|
||||
* - Several grid and block dimension combinations.
|
||||
* Test source
|
||||
* ------------------------
|
||||
* - unit/atomics/atomicCAS.cc
|
||||
* Test requirements
|
||||
* ------------------------
|
||||
* - HIP_VERSION >= 5.2
|
||||
*/
|
||||
TEMPLATE_TEST_CASE("Unit_atomicCAS_Positive_Multi_Kernel", "", int, unsigned int,
|
||||
unsigned long long TYPES) {
|
||||
int warp_size = 0;
|
||||
HIP_CHECK(hipDeviceGetAttribute(&warp_size, hipDeviceAttributeWarpSize, 0));
|
||||
const auto cache_line_size = 128u;
|
||||
|
||||
for (auto current = 0; current < cmd_options.iterations; ++current) {
|
||||
DYNAMIC_SECTION("Same address " << current) {
|
||||
SingleDeviceMultipleKernelTest<TestType, AtomicOperation::kCASAdd>(2, 1, sizeof(TestType));
|
||||
}
|
||||
|
||||
DYNAMIC_SECTION("Adjacent addresses " << current) {
|
||||
SingleDeviceMultipleKernelTest<TestType, AtomicOperation::kCASAdd>(2, warp_size,
|
||||
sizeof(TestType));
|
||||
}
|
||||
|
||||
DYNAMIC_SECTION("Scattered addresses " << current) {
|
||||
SingleDeviceMultipleKernelTest<TestType, AtomicOperation::kCASAdd>(2, warp_size,
|
||||
cache_line_size);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Test Description
|
||||
* ------------------------
|
||||
* - RTCs kernels that pass combinations of arguments of invalid types for all overloads of
|
||||
* atomicCAS.
|
||||
* Test source
|
||||
* ------------------------
|
||||
* - unit/atomics/atomicCAS.cc
|
||||
* Test requirements
|
||||
* ------------------------
|
||||
* - HIP_VERSION >= 5.2
|
||||
*/
|
||||
TEST_CASE("Unit_atomicCAS_Negative_Parameters_RTC") {
|
||||
hiprtcProgram program{};
|
||||
|
||||
const auto program_source = GENERATE(kAtomicCAS_int, kAtomicCAS_uint, kAtomicCAS_ulong,
|
||||
kAtomicCAS_ulonglong, kAtomicCAS_float, kAtomicCAS_double);
|
||||
HIPRTC_CHECK(
|
||||
hiprtcCreateProgram(&program, program_source, "atomicCAS_negative.cc", 0, nullptr, nullptr));
|
||||
hiprtcResult result{hiprtcCompileProgram(program, 0, nullptr)};
|
||||
|
||||
// Get the compile log and count compiler error messages
|
||||
size_t log_size{};
|
||||
HIPRTC_CHECK(hiprtcGetProgramLogSize(program, &log_size));
|
||||
std::string log(log_size, ' ');
|
||||
HIPRTC_CHECK(hiprtcGetProgramLog(program, log.data()));
|
||||
int error_count{0};
|
||||
|
||||
int expected_error_count{8};
|
||||
std::string error_message{"error:"};
|
||||
|
||||
size_t n_pos = log.find(error_message, 0);
|
||||
while (n_pos != std::string::npos) {
|
||||
++error_count;
|
||||
n_pos = log.find(error_message, n_pos + 1);
|
||||
}
|
||||
|
||||
HIPRTC_CHECK(hiprtcDestroyProgram(&program));
|
||||
HIPRTC_CHECK_ERROR(result, HIPRTC_ERROR_COMPILATION);
|
||||
REQUIRE(error_count == expected_error_count);
|
||||
}
|
||||
@@ -0,0 +1,62 @@
|
||||
/*
|
||||
Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved.
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <hip_test_common.hh>
|
||||
|
||||
class Dummy {
|
||||
public:
|
||||
__device__ Dummy() {}
|
||||
__device__ ~Dummy() {}
|
||||
};
|
||||
|
||||
#define ATOMIC_CAS_NEGATIVE_KERNEL(type_name) \
|
||||
__global__ void atomicCAS_v1(type_name* address, type_name* result) { \
|
||||
*result = atomicCAS(&address, 12, 13); \
|
||||
} \
|
||||
__global__ void atomicCAS_v2(type_name* address, type_name* result) { \
|
||||
*result = atomicCAS(address, address, 13); \
|
||||
} \
|
||||
__global__ void atomicCAS_v3(type_name* address, type_name* result) { \
|
||||
*result = atomicCAS(address, 12, address); \
|
||||
} \
|
||||
__global__ void atomicCAS_v4(Dummy* address, type_name* result) { \
|
||||
*result = atomicCAS(address, 12, 13); \
|
||||
} \
|
||||
__global__ void atomicCAS_v5(char* address, type_name* result) { \
|
||||
*result = atomicCAS(address, 12, 13); \
|
||||
} \
|
||||
__global__ void atomicCAS_v6(short* address, type_name* result) { \
|
||||
*result = atomicCAS(address, 12, 13); \
|
||||
} \
|
||||
__global__ void atomicCAS_v7(long* address, type_name* result) { \
|
||||
*result = atomicCAS(address, 12, 13); \
|
||||
} \
|
||||
__global__ void atomicCAS_v8(long long* address, type_name* result) { \
|
||||
*result = atomicCAS(address, 12, 13); \
|
||||
}
|
||||
|
||||
ATOMIC_CAS_NEGATIVE_KERNEL(int)
|
||||
ATOMIC_CAS_NEGATIVE_KERNEL(unsigned int)
|
||||
ATOMIC_CAS_NEGATIVE_KERNEL(unsigned long)
|
||||
ATOMIC_CAS_NEGATIVE_KERNEL(unsigned long long)
|
||||
ATOMIC_CAS_NEGATIVE_KERNEL(float)
|
||||
ATOMIC_CAS_NEGATIVE_KERNEL(double)
|
||||
@@ -0,0 +1,273 @@
|
||||
/*
|
||||
Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved.
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
/*
|
||||
Negative kernels used for the atomics negative Test Cases that are using RTC.
|
||||
*/
|
||||
|
||||
static constexpr auto kAtomicCAS_int{
|
||||
R"(
|
||||
class Dummy {
|
||||
public:
|
||||
__device__ Dummy() {}
|
||||
__device__ ~Dummy() {}
|
||||
};
|
||||
|
||||
__global__ void atomicCAS_int_v1(int* address, int* result) {
|
||||
*result = atomicCAS(&address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_int_v2(int* address, int* result) {
|
||||
*result = atomicCAS(address, address, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_int_v3(int* address, int* result) {
|
||||
*result = atomicCAS(address, 12, address);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_int_v4(Dummy* address, int* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_int_v5(char* address, int* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_int_v6(short* address, int* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_int_v7(long* address, int* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_int_v8(long long* address, int* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
)"};
|
||||
|
||||
static constexpr auto kAtomicCAS_uint{
|
||||
R"(
|
||||
class Dummy {
|
||||
public:
|
||||
__device__ Dummy() {}
|
||||
__device__ ~Dummy() {}
|
||||
};
|
||||
|
||||
__global__ void atomicCAS_uint_v1(unsigned int* address, unsigned int* result) {
|
||||
*result = atomicCAS(&address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_uint_v2(unsigned int* address, unsigned int* result) {
|
||||
*result = atomicCAS(address, address, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_uint_v3(unsigned int* address, unsigned int* result) {
|
||||
*result = atomicCAS(address, 12, address);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_uint_v4(Dummy* address, unsigned int* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_uint_v5(char* address, unsigned int* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_uint_v6(short* address, unsigned int* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_uint_v7(long* address, unsigned int* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_uint_v8(long long* address, unsigned int* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
)"};
|
||||
|
||||
static constexpr auto kAtomicCAS_ulong{
|
||||
R"(
|
||||
class Dummy {
|
||||
public:
|
||||
__device__ Dummy() {}
|
||||
__device__ ~Dummy() {}
|
||||
};
|
||||
|
||||
__global__ void atomicCAS_ulong_v1(unsigned long* address, unsigned long* result) {
|
||||
*result = atomicCAS(&address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulong_v2(unsigned long* address, unsigned long* result) {
|
||||
*result = atomicCAS(address, address, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulong_v3(unsigned long* address, unsigned long* result) {
|
||||
*result = atomicCAS(address, 12, address);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulong_v4(Dummy* address, unsigned long* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulong_v5(char* address, unsigned long* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulong_v6(short* address, unsigned long* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulong_v7(long* address, unsigned long* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulong_v8(long long* address, unsigned long* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
)"};
|
||||
|
||||
static constexpr auto kAtomicCAS_ulonglong{
|
||||
R"(
|
||||
class Dummy {
|
||||
public:
|
||||
__device__ Dummy() {}
|
||||
__device__ ~Dummy() {}
|
||||
};
|
||||
|
||||
__global__ void atomicCAS_ulonglong_v1(unsigned long long* address, unsigned long long* result) {
|
||||
*result = atomicCAS(&address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulonglong_v2(unsigned long long* address, unsigned long long* result) {
|
||||
*result = atomicCAS(address, address, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulonglong_v3(unsigned long long* address, unsigned long long* result) {
|
||||
*result = atomicCAS(address, 12, address);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulonglong_v4(Dummy* address, unsigned long long* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulonglong_v5(char* address, unsigned long long* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulonglong_v6(short* address, unsigned long long* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulonglong_v7(long* address, unsigned long long* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_ulonglong_v8(long long* address, unsigned long long* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
)"};
|
||||
|
||||
static constexpr auto kAtomicCAS_float{
|
||||
R"(
|
||||
class Dummy {
|
||||
public:
|
||||
__device__ Dummy() {}
|
||||
__device__ ~Dummy() {}
|
||||
};
|
||||
|
||||
__global__ void atomicCAS_float_v1(float* address, float* result) {
|
||||
*result = atomicCAS(&address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_float_v2(float* address, float* result) {
|
||||
*result = atomicCAS(address, address, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_float_v3(float* address, float* result) {
|
||||
*result = atomicCAS(address, 12, address);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_float_v4(Dummy* address, float* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_float_v5(char* address, float* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_float_v6(short* address, float* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_float_v7(long* address, float* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_float_v8(long long* address, float* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
)"};
|
||||
|
||||
static constexpr auto kAtomicCAS_double{
|
||||
R"(
|
||||
class Dummy {
|
||||
public:
|
||||
__device__ Dummy() {}
|
||||
__device__ ~Dummy() {}
|
||||
};
|
||||
|
||||
__global__ void atomicCAS_double_v1(double* address, double* result) {
|
||||
*result = atomicCAS(&address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_double_v2(double* address, double* result) {
|
||||
*result = atomicCAS(address, address, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_double_v3(double* address, double* result) {
|
||||
*result = atomicCAS(address, 12, address);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_double_v4(Dummy* address, double* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_double_v5(char* address, double* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_double_v6(short* address, double* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_double_v7(long* address, double* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
|
||||
__global__ void atomicCAS_double_v8(long long* address, double* result) {
|
||||
*result = atomicCAS(address, 12, 13);
|
||||
}
|
||||
)"};
|
||||
@@ -0,0 +1,185 @@
|
||||
/*
|
||||
Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved.
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "arithmetic_common.hh"
|
||||
|
||||
#include <hip_test_common.hh>
|
||||
|
||||
/**
|
||||
* @addtogroup atomicCAS_system atomicCAS_system
|
||||
* @{
|
||||
* @ingroup AtomicsTest
|
||||
*/
|
||||
|
||||
#ifdef HT_NVIDIA
|
||||
#define TYPES
|
||||
#else
|
||||
#define TYPES , float, double
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Test Description
|
||||
* ------------------------
|
||||
* - Executes a kernel two times concurrently on a two devices wherein all threads will perform
|
||||
* an atomic addition, implemented using an atomic CAS operation, on a target memory location. Each
|
||||
* thread will add the same value to the memory location, storing the return value into a separate
|
||||
* output array slot corresponding to it. Once complete, the output array and target memory is
|
||||
* validated to contain all the expected values. Several memory access patterns are tested:
|
||||
* -# All threads exchange to a single, compile time deducible, memory location
|
||||
* -# Each thread targets an array containing warp_size elements, using tid % warp_size
|
||||
* for indexing
|
||||
* -# Same as the above, but the elements are spread out by L1 cache line size bytes.
|
||||
*
|
||||
* - The test is run for:
|
||||
* - All overloads of atomicCAS_system
|
||||
* - hipMalloc, hipMallocManaged, hipHostMalloc and hipHostRegister allocated memory
|
||||
* - Several grid and block dimension combinations.
|
||||
* Test source
|
||||
* ------------------------
|
||||
* - unit/atomics/atomicCAS_system.cc
|
||||
* Test requirements
|
||||
* ------------------------
|
||||
* - HIP_VERSION >= 5.2
|
||||
*/
|
||||
TEMPLATE_TEST_CASE("Unit_atomicCAS_system_Positive_Peer_GPUs", "", int, unsigned int,
|
||||
unsigned long long TYPES) {
|
||||
int warp_size = 0;
|
||||
HIP_CHECK(hipDeviceGetAttribute(&warp_size, hipDeviceAttributeWarpSize, 0));
|
||||
const auto cache_line_size = 128u;
|
||||
|
||||
for (auto current = 0; current < cmd_options.iterations; ++current) {
|
||||
DYNAMIC_SECTION("Same address " << current) {
|
||||
MultipleDeviceMultipleKernelAndHostTest<TestType, AtomicOperation::kCASAddSystem>(
|
||||
2, 2, 1, sizeof(TestType));
|
||||
}
|
||||
|
||||
DYNAMIC_SECTION("Adjacent addresses " << current) {
|
||||
MultipleDeviceMultipleKernelAndHostTest<TestType, AtomicOperation::kCASAddSystem>(
|
||||
2, 2, warp_size, sizeof(TestType));
|
||||
}
|
||||
|
||||
DYNAMIC_SECTION("Scattered addresses " << current) {
|
||||
MultipleDeviceMultipleKernelAndHostTest<TestType, AtomicOperation::kCASAddSystem>(
|
||||
2, 2, warp_size, cache_line_size);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Test Description
|
||||
* ------------------------
|
||||
* - Executes a kernel on a single device wherein all threads will perform
|
||||
* an atomic addition, implemented using an atomic CAS operation, on a target memory location.
|
||||
* Each thread will add the same value to the memory location, storing the return value into a
|
||||
* separate output array slot corresponding to it. While the kernel is running, the host
|
||||
* performs atomic additions, in 4 threads, on the same memory location(s). Once complete, the
|
||||
* output array and target memory is validated to contain all the expected values. Several
|
||||
* memory access patterns are tested:
|
||||
* -# All threads exchange to a single, compile time deducible, memory location
|
||||
* -# Each thread targets an array containing warp_size elements, using tid % warp_size
|
||||
* for indexing
|
||||
* -# Same as the above, but the elements are spread out by L1 cache line size bytes.
|
||||
*
|
||||
* - The test is run for:
|
||||
* - All overloads of atomicCAS_system
|
||||
* - hipMalloc, hipMallocManaged, hipHostMalloc and hipHostRegister allocated memory
|
||||
* - Several grid and block dimension combinations.
|
||||
* Test source
|
||||
* ------------------------
|
||||
* - unit/atomics/atomicCAS_system.cc
|
||||
* Test requirements
|
||||
* ------------------------
|
||||
* - HIP_VERSION >= 5.2
|
||||
*/
|
||||
TEMPLATE_TEST_CASE("Unit_atomicCAS_system_Positive_Host_And_GPU", "", int, unsigned int,
|
||||
unsigned long long TYPES) {
|
||||
int warp_size = 0;
|
||||
HIP_CHECK(hipDeviceGetAttribute(&warp_size, hipDeviceAttributeWarpSize, 0));
|
||||
const auto cache_line_size = 128u;
|
||||
|
||||
for (auto current = 0; current < cmd_options.iterations; ++current) {
|
||||
DYNAMIC_SECTION("Same address " << current) {
|
||||
MultipleDeviceMultipleKernelAndHostTest<TestType, AtomicOperation::kCASAddSystem>(
|
||||
1, 1, 1, sizeof(TestType), 4);
|
||||
}
|
||||
|
||||
DYNAMIC_SECTION("Adjacent addresses " << current) {
|
||||
MultipleDeviceMultipleKernelAndHostTest<TestType, AtomicOperation::kCASAddSystem>(
|
||||
1, 1, warp_size, sizeof(TestType), 4);
|
||||
}
|
||||
|
||||
DYNAMIC_SECTION("Scattered addresses " << current) {
|
||||
MultipleDeviceMultipleKernelAndHostTest<TestType, AtomicOperation::kCASAddSystem>(
|
||||
1, 1, warp_size, cache_line_size, 4);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Test Description
|
||||
* ------------------------
|
||||
* - Executes a kernel two times on two devices wherein all threads will perform
|
||||
* an atomic addition, implemented using an atomic CAS operation, on a target memory location.
|
||||
* Each thread will add the same value to the memory location, storing the return value into a
|
||||
* separate output array slot corresponding to it. While the kernel is running, the host
|
||||
* performs atomic additions, in 4 threads, on the same memory location(s). Once complete, the
|
||||
* output array and target memory is validated to contain all the expected values. Several
|
||||
* memory access patterns are tested:
|
||||
* -# All threads exchange to a single, compile time deducible, memory location
|
||||
* -# Each thread targets an array containing warp_size elements, using tid % warp_size
|
||||
* for indexing
|
||||
* -# Same as the above, but the elements are spread out by L1 cache line size bytes.
|
||||
*
|
||||
* - The test is run for:
|
||||
* - All overloads of atomicCAS_system
|
||||
* - hipMalloc, hipMallocManaged, hipHostMalloc and hipHostRegister allocated memory
|
||||
* - Several grid and block dimension combinations.
|
||||
* Test source
|
||||
* ------------------------
|
||||
* - unit/atomics/atomicCAS_system.cc
|
||||
* Test requirements
|
||||
* ------------------------
|
||||
* - HIP_VERSION >= 5.2
|
||||
*/
|
||||
TEMPLATE_TEST_CASE("Unit_atomicCAS_system_Positive_Host_And_Peer_GPUs", "", int, unsigned int,
|
||||
unsigned long long TYPES) {
|
||||
int warp_size = 0;
|
||||
HIP_CHECK(hipDeviceGetAttribute(&warp_size, hipDeviceAttributeWarpSize, 0));
|
||||
const auto cache_line_size = 128u;
|
||||
|
||||
for (auto current = 0; current < cmd_options.iterations; ++current) {
|
||||
DYNAMIC_SECTION("Same address " << current) {
|
||||
MultipleDeviceMultipleKernelAndHostTest<TestType, AtomicOperation::kCASAddSystem>(
|
||||
2, 2, 1, sizeof(TestType), 4);
|
||||
}
|
||||
|
||||
DYNAMIC_SECTION("Adjacent addresses " << current) {
|
||||
MultipleDeviceMultipleKernelAndHostTest<TestType, AtomicOperation::kCASAddSystem>(
|
||||
2, 2, warp_size, sizeof(TestType), 4);
|
||||
}
|
||||
|
||||
DYNAMIC_SECTION("Scattered addresses " << current) {
|
||||
MultipleDeviceMultipleKernelAndHostTest<TestType, AtomicOperation::kCASAddSystem>(
|
||||
2, 2, warp_size, cache_line_size, 4);
|
||||
}
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user