Add TCC_TOO_MANY_EA_WRREQS_STALL to gfx940 input configs (#349)

Signed-off-by: coleramos425 <colramos@amd.com>

src/omniperf_soc/profile_configs/gfx940/pmc_tcc2_perf.txt

@@ -13,7 +13,7 @@ pmc: TCC_EA0_RDREQ[0]                TCC_EA0_RDREQ_32B[0]         TCC_EA0_WRREQ[
 
 pmc: TCC_EA0_ATOMIC[0]               TCC_EA0_RDREQ_LEVEL[0]       TCC_EA0_WRREQ_LEVEL[0]       TCC_EA0_ATOMIC_LEVEL[0]  TCC_EA0_ATOMIC[1]               TCC_EA0_RDREQ_LEVEL[1]       TCC_EA0_WRREQ_LEVEL[1]       TCC_EA0_ATOMIC_LEVEL[1]  TCC_EA0_ATOMIC[2]               TCC_EA0_RDREQ_LEVEL[2]       TCC_EA0_WRREQ_LEVEL[2]       TCC_EA0_ATOMIC_LEVEL[2]  TCC_EA0_ATOMIC[3]               TCC_EA0_RDREQ_LEVEL[3]       TCC_EA0_WRREQ_LEVEL[3]       TCC_EA0_ATOMIC_LEVEL[3]  TCC_EA0_ATOMIC[4]               TCC_EA0_RDREQ_LEVEL[4]       TCC_EA0_WRREQ_LEVEL[4]       TCC_EA0_ATOMIC_LEVEL[4]  TCC_EA0_ATOMIC[5]               TCC_EA0_RDREQ_LEVEL[5]       TCC_EA0_WRREQ_LEVEL[5]       TCC_EA0_ATOMIC_LEVEL[5]  TCC_EA0_ATOMIC[6]               TCC_EA0_RDREQ_LEVEL[6]       TCC_EA0_WRREQ_LEVEL[6]       TCC_EA0_ATOMIC_LEVEL[6]  TCC_EA0_ATOMIC[7]               TCC_EA0_RDREQ_LEVEL[7]       TCC_EA0_WRREQ_LEVEL[7]       TCC_EA0_ATOMIC_LEVEL[7]  TCC_EA0_ATOMIC[8]               TCC_EA0_RDREQ_LEVEL[8]       TCC_EA0_WRREQ_LEVEL[8]       TCC_EA0_ATOMIC_LEVEL[8]  TCC_EA0_ATOMIC[9]               TCC_EA0_RDREQ_LEVEL[9]       TCC_EA0_WRREQ_LEVEL[9]       TCC_EA0_ATOMIC_LEVEL[9]  TCC_EA0_ATOMIC[10]              TCC_EA0_RDREQ_LEVEL[10]      TCC_EA0_WRREQ_LEVEL[10]      TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_ATOMIC[11]              TCC_EA0_RDREQ_LEVEL[11]      TCC_EA0_WRREQ_LEVEL[11]      TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_ATOMIC[12]              TCC_EA0_RDREQ_LEVEL[12]      TCC_EA0_WRREQ_LEVEL[12]      TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_ATOMIC[13]              TCC_EA0_RDREQ_LEVEL[13]      TCC_EA0_WRREQ_LEVEL[13]      TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_ATOMIC[14]              TCC_EA0_RDREQ_LEVEL[14]      TCC_EA0_WRREQ_LEVEL[14]      TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_ATOMIC[15]              TCC_EA0_RDREQ_LEVEL[15]      TCC_EA0_WRREQ_LEVEL[15]      TCC_EA0_ATOMIC_LEVEL[15]
 
-pmc: TCC_TAG_STALL[0]  TCC_BUBBLE[0]  TCC_TAG_STALL[1]  TCC_BUBBLE[1]  TCC_TAG_STALL[2] TCC_BUBBLE[2]  TCC_TAG_STALL[3]  TCC_BUBBLE[3]  TCC_TAG_STALL[4]  TCC_BUBBLE[4]  TCC_TAG_STALL[5] TCC_BUBBLE[5]  TCC_TAG_STALL[6]  TCC_BUBBLE[6]  TCC_TAG_STALL[7]  TCC_BUBBLE[7]  TCC_TAG_STALL[8] TCC_BUBBLE[8]  TCC_TAG_STALL[9]  TCC_BUBBLE[9]  TCC_TAG_STALL[10]  TCC_BUBBLE[10]  TCC_TAG_STALL[11]  TCC_BUBBLE[11]  TCC_TAG_STALL[12] TCC_BUBBLE[12] TCC_TAG_STALL[13]  TCC_BUBBLE[13]  TCC_TAG_STALL[14]  TCC_BUBBLE[14]  TCC_TAG_STALL[15] TCC_BUBBLE[15]
+pmc: TCC_TAG_STALL[0]  TCC_BUBBLE[0]  TCC_TOO_MANY_EA_WRREQS_STALL[0]  TCC_TAG_STALL[1]  TCC_BUBBLE[1]  TCC_TOO_MANY_EA_WRREQS_STALL[1]  TCC_TAG_STALL[2] TCC_BUBBLE[2]  TCC_TOO_MANY_EA_WRREQS_STALL[2]  TCC_TAG_STALL[3]  TCC_BUBBLE[3]  TCC_TOO_MANY_EA_WRREQS_STALL[3]  TCC_TAG_STALL[4]  TCC_BUBBLE[4]  TCC_TOO_MANY_EA_WRREQS_STALL[4]  TCC_TAG_STALL[5] TCC_BUBBLE[5]  TCC_TOO_MANY_EA_WRREQS_STALL[5]  TCC_TAG_STALL[6]  TCC_BUBBLE[6]  TCC_TOO_MANY_EA_WRREQS_STALL[6]  TCC_TAG_STALL[7]  TCC_BUBBLE[7]  TCC_TOO_MANY_EA_WRREQS_STALL[7]  TCC_TAG_STALL[8] TCC_BUBBLE[8]  TCC_TOO_MANY_EA_WRREQS_STALL[8]  TCC_TAG_STALL[9]  TCC_BUBBLE[9]  TCC_TOO_MANY_EA_WRREQS_STALL[9]  TCC_TAG_STALL[10]  TCC_BUBBLE[10]  TCC_TOO_MANY_EA_WRREQS_STALL[10]  TCC_TAG_STALL[11]  TCC_BUBBLE[11]  TCC_TOO_MANY_EA_WRREQS_STALL[11]  TCC_TAG_STALL[12] TCC_BUBBLE[12]  TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_TAG_STALL[13]  TCC_BUBBLE[13]  TCC_TOO_MANY_EA_WRREQS_STALL[13]  TCC_TAG_STALL[14]  TCC_BUBBLE[14]  TCC_TOO_MANY_EA_WRREQS_STALL[14]  TCC_TAG_STALL[15] TCC_BUBBLE[15]  TCC_TOO_MANY_EA_WRREQS_STALL[15]