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P4 to Git Change 1752541 by wchau@wchau_OCL_Linux on 2019/03/06 17:02:07

Sfoglia il codice sorgente 
SWDEV-168145 - Add ECC target feature to OpenCL runtime

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/device.hpp#334 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/devprogram.cpp#29 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/devprogram.hpp#17 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldevice.cpp#125 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palprogram.cpp#86 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.cpp#119 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.hpp#35 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rockernel.cpp#50 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocprogram.cpp#99 edit


[ROCm/clr commit: 5195305426]
This commit is contained in:
foreman
2019-03-06 17:52:14 -05:00
parent 22ce219069
commit 13bce0fbf5
9 ha cambiato i file con 64 aggiunte e 12 eliminazioni
Scarica il file Patch Scarica il file Diff Expand all files Collapse all files
projects/clr/rocclr/runtime/device/device.hpp
+2
Vedi File
@@ -459,6 +459,8 @@ struct Info : public amd::EmbeddedObject {
cl_uint numRTCUs_;
//! Thread trace enable
cl_bool threadTraceEnable_;
//! ECC protected GPRs support (only available Vega20+)
cl_bool sramEccEnabled_;
//! Image pitch alignment for image2d_from_buffer
cl_uint imagePitchAlignment_;
projects/clr/rocclr/runtime/device/devprogram.cpp
+19
Vedi File
@@ -336,6 +336,9 @@ void Program::setLangAndTargetStr(const char* clStd, amd_comgr_language_t* oclve
if (xnackEnabled_) {
targetIdent.append("+xnack");
}
if (sramEccEnabled_) {
targetIdent.append("+sram-ecc");
}
}
@@ -810,6 +813,14 @@ bool Program::compileImplLC(const std::string& sourceCode,
driverOptions.append(" -mxnack");
}
// Set SRAM ECC option if needed
if (sramEccEnabled_) {
driverOptions.append(" -msram-ecc");
}
else {
driverOptions.append(" -mno-sram-ecc");
}
driverOptions.append(options->llvmOptions);
driverOptions.append(ProcessOptions(options));
@@ -1692,6 +1703,14 @@ bool Program::linkImplLC(amd::option::Options* options) {
codegenOptions.append(" -mxnack");
}
// Set SRAM ECC option if needed
if (sramEccEnabled_) {
codegenOptions.append(" -msram-ecc");
}
else {
codegenOptions.append(" -mno-sram-ecc");
}
// Set the -O#
std::ostringstream optLevel;
optLevel << "-O" << options->oVariables->OptLevel;
projects/clr/rocclr/runtime/device/devprogram.hpp
+4
Vedi File
@@ -88,6 +88,7 @@ class Program : public amd::HeapObject {
uint32_t isLC_ : 1; //!< LC was used for the program compilation
uint32_t hasGlobalStores_ : 1; //!< Program has writable program scope variables
uint32_t xnackEnabled_ : 1; //!< Xnack was enabled during compilation
uint32_t sramEccEnabled_ : 1; //!< SRAM ECC was enabled during compilation
};
uint32_t flags_; //!< Program flags
};
@@ -218,6 +219,9 @@ class Program : public amd::HeapObject {
//! Check if xnack is enable
const bool xnackEnable() const { return (xnackEnabled_ == 1); }
//! Check if SRAM ECC is enable
const bool sramEccEnable() const { return (sramEccEnabled_ == 1); }
protected:
//! pre-compile setup
bool initBuild(amd::option::Options* options);
projects/clr/rocclr/runtime/device/pal/paldevice.cpp
+19 -6
Vedi File
@@ -291,7 +291,10 @@ bool NullDevice::create(Pal::AsicRevision asicRevision, Pal::GfxIpLevel ipLevel,
std::ostringstream cacheTarget;
cacheTarget << "AMD-AMDGPU-" << gfxipMajor << "-" << gfxipMinor << "-" << gfxipStepping;
if (hwInfo_->xnackEnabled_) {
cacheTarget << "-xnack";
cacheTarget << "+xnack";
}
if (info_.sramEccEnabled_) {
cacheTarget << "+sram-ecc";
}
// Create CacheCompilation for the offline device
@@ -484,6 +487,8 @@ void NullDevice::fillDeviceInfo(const Pal::DeviceProperties& palProp,
info_.maxConstantBufferSize_ = info_.maxMemAllocSize_;
info_.maxConstantArgs_ = MaxConstArguments;
info_.sramEccEnabled_ = palProp.gfxipProperties.shaderCore.flags.eccProtectedGprs;
// Image support fields
if (settings().imageSupport_) {
info_.imageSupport_ = CL_TRUE;
@@ -528,12 +533,17 @@ void NullDevice::fillDeviceInfo(const Pal::DeviceProperties& palProp,
const static char* bristol = "Bristol Ridge";
::strcpy(info_.name_, bristol);
} else {
if (settings().useLightning_ && hwInfo()->xnackEnabled_) {
::snprintf(info_.name_, sizeof(info_.name_) - 1, "%s-xnack", hwInfo()->targetName_);
} else {
::strcpy(info_.name_, hwInfo()->targetName_);
::strcpy(info_.name_, hwInfo()->targetName_);
if (settings().useLightning_) {
if (hwInfo()->xnackEnabled_) {
::strcat(info_.name_, "+xnack");
}
if (info_.sramEccEnabled_) {
::strcat(info_.name_, "+sram-ecc");
}
}
}
::strcpy(info_.vendor_, "Advanced Micro Devices, Inc.");
::snprintf(info_.driverVersion_, sizeof(info_.driverVersion_) - 1, AMD_BUILD_STRING " (PAL%s)",
settings().useLightning_ ? ",LC" : ",HSAIL");
@@ -968,7 +978,10 @@ bool Device::create(Pal::IDevice* device) {
std::ostringstream cacheTarget;
cacheTarget << "AMD-AMDGPU-" << gfxipMajor << "-" << gfxipMinor << "-" << gfxipStepping;
if (isXNACKSupported) {
cacheTarget << "-xnack";
cacheTarget << "+xnack";
}
if (info_.sramEccEnabled_) {
cacheTarget << "+sram-ecc";
}
amd::CacheCompilation* compObj = new amd::CacheCompilation(
projects/clr/rocclr/runtime/device/pal/palprogram.cpp
+2
Vedi File
@@ -145,6 +145,7 @@ HSAILProgram::HSAILProgram(Device& device)
executable_(nullptr),
loaderContext_(this) {
xnackEnabled_ = dev().hwInfo()->xnackEnabled_;
sramEccEnabled_ = dev().info().sramEccEnabled_;
if (dev().asicRevision() == Pal::AsicRevision::Bristol) {
machineTarget_ = Carrizo;
} else {
@@ -164,6 +165,7 @@ HSAILProgram::HSAILProgram(NullDevice& device)
loaderContext_(this) {
isNull_ = true;
xnackEnabled_ = dev().hwInfo()->xnackEnabled_;
sramEccEnabled_ = dev().info().sramEccEnabled_;
if (dev().asicRevision() == Pal::AsicRevision::Bristol) {
machineTarget_ = Carrizo;
} else {
projects/clr/rocclr/runtime/device/rocm/rocdevice.cpp
+12 -5
Vedi File
@@ -542,7 +542,8 @@ bool Device::init() {
roc_device->deviceInfo_.gfxipVersion_ = gfxipVersionNum;
if (!roc_device->create()) {
bool sramEccEnabled = (str.find("+sram-ecc") != std::string::npos);
if (!roc_device->create(sramEccEnabled)) {
LogError("Error creating new instance of Device.");
continue;
}
@@ -592,7 +593,7 @@ void Device::tearDown() {
hsa_shut_down();
}
bool Device::create() {
bool Device::create(bool sramEccEnabled) {
if (HSA_STATUS_SUCCESS !=
hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_PROFILE, &agent_profile_)) {
return false;
@@ -625,6 +626,7 @@ bool Device::create() {
info_.deviceTopology_.pcie.bus = (hsa_bdf_id & (0xFF << 8)) >> 8;
info_.deviceTopology_.pcie.device = (hsa_bdf_id & (0x1F << 3)) >> 3;
info_.deviceTopology_.pcie.function = (hsa_bdf_id & 0x07);
info_.sramEccEnabled_ = sramEccEnabled;
#ifdef WITH_AMDGPU_PRO
// Create amdgpu-pro device interface for SSG support
@@ -660,7 +662,10 @@ bool Device::create() {
std::ostringstream cacheTarget;
cacheTarget << "AMD-AMDGPU-" << gfxipMajor << "-" << gfxipMinor << "-" << gfxipStepping;
if (settings().enableXNACK_) {
cacheTarget << "-xnack";
cacheTarget << "+xnack";
}
if (info_.sramEccEnabled_) {
cacheTarget << "+sram-ecc";
}
amd::CacheCompilation* compObj = new amd::CacheCompilation(
@@ -914,9 +919,11 @@ bool Device::populateOCLDeviceConstants() {
std::ostringstream oss;
oss << "gfx" << gfxipMajor << gfxipMinor << gfxipStepping;
if (settings().useLightning_ && hsa_settings->enableXNACK_) {
oss << "-xnack";
oss << "+xnack";
}
if (info_.sramEccEnabled_) {
oss << "+sram-ecc";
}
::strcpy(info_.name_, oss.str().c_str());
char device_name[64] = {0};
projects/clr/rocclr/runtime/device/rocm/rocdevice.hpp
+1 -1
Vedi File
@@ -276,7 +276,7 @@ class Device : public NullDevice {
static bool loadHsaModules();
bool create();
bool create(bool sramEccEnabled);
//! Construct a new physical HSA device
Device(hsa_agent_t bkendDevice);
projects/clr/rocclr/runtime/device/rocm/rockernel.cpp
+3
Vedi File
@@ -57,6 +57,9 @@ bool LightningKernel::init() {
if (program_->xnackEnable()) {
targetIdent.append("+xnack");
}
if (program_->sramEccEnable()) {
targetIdent.append("+sram-ecc");
}
if (!SetAvailableSgprVgpr(targetIdent)) {
return false;
projects/clr/rocclr/runtime/device/rocm/rocprogram.cpp
+2
Vedi File
@@ -113,6 +113,7 @@ bool Program::initClBinary(char* binaryIn, size_t size) {
HSAILProgram::HSAILProgram(roc::NullDevice& device) : roc::Program(device) {
xnackEnabled_ = dev().settings().enableXNACK_;
sramEccEnabled_ = dev().info().sramEccEnabled_;
machineTarget_ = dev().deviceInfo().complibTarget_;
}
@@ -319,6 +320,7 @@ LightningProgram::LightningProgram(roc::NullDevice& device)
: roc::Program(device) {
isLC_ = true;
xnackEnabled_ = dev().settings().enableXNACK_;
sramEccEnabled_ = dev().info().sramEccEnabled_;
machineTarget_ = dev().deviceInfo().machineTargetLC_;
}