Change-Id: I5819aa62693dc3b9b5d7e39944d1e58aadc72027


[ROCm/hip commit: d46b3446de]
Этот коммит содержится в:
Rahul Garg
2016-05-20 11:12:32 +05:30
родитель 760c8c4990
Коммит 170796f4e9
2 изменённых файлов: 3 добавлений и 13 удалений
+1 -11
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@@ -420,17 +420,7 @@ HIP provides the following built-in functions for reading a high-resolution time
clock_t clock()
long long int clock64()
```
AMD devices employ a per-GPU timer that increments at a constant time interval regardless of any dynamic frequency changes. All compute units in the system share the timer.
Nvidia devices implement the timer as a per-compute-unit clock that increments on every clock cycle.
To obtain the clock frequency, use the hipDeviceProp_t.clockInstructionRate field:
```
hipGetDeviceProperties(&deviceProps, deviceId);
// Compute time in ms--device_ticks is based on values reported from clock() device function
float time = device_ticks / (float)deviceProps.clockInstructionRate;
```
Returns the value of counter that is incremented every clock cycle on device. Difference in values returned provides the cycles used.
## Atomic Functions
+2 -2
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@@ -501,8 +501,8 @@ __device__ double trunc(double x)
const int warpSize = 64;
__device__ long long int clock64() { return (long long int)hc::__clock_u64(); };
__device__ clock_t clock() { return (clock_t)hc::__clock_u64(); };
__device__ long long int clock64() { return (long long int)hc::__cycle_u64(); };
__device__ clock_t clock() { return (clock_t)hc::__cycle_u64(); };
//atomicAdd()