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P4 to Git Change 1392885 by gandryey@gera-w8 on 2017/03/30 17:28:48

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SWDEV-115408 - [Vega10] IB size mismatch in OCL submissions
	- Incorrect result for OS event wait was causing this issue, because runtime could overwrite an incomplete IB. A workaround is to check TS value after a wait returned a successful code

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palvirtual.hpp#18 edit
... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#266 edit


[ROCm/clr commit: 39290bb733]
This commit is contained in:
foreman
2017-03-30 17:37:14 -04:00
parent 1a19de73d9
commit 1a66409908
2 changed files with 10 additions and 0 deletions
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projects/clr/rocclr/runtime/device/pal/palvirtual.hpp
+8
View File
@@ -106,6 +106,14 @@ public:
}
result = iDev_->WaitForFences(1, &iCmdFences_[cbId], true, WaitTimeoutInNsec);
if (Pal::Result::Success == result) {
// Note: This is a workaround for a timing sensitive issue when OS event
// succeeded without the actual GPU operation completion.
// The issue occurs under heavy GPU load with more than 1 OCL app running and
// HWS enabled under Win10
while (GPU_PAL_FENCE_VALIDATION &&
(Pal::Result::Success != iCmdFences_[cbId]->GetStatus())) {
amd::Os::yield();
}
break;
}
else if ((Pal::Result::NotReady == result) ||
projects/clr/rocclr/runtime/utils/flags.hpp
+2
View File
@@ -181,6 +181,8 @@ release(uint, GPU_WAVES_PER_SIMD, 0, \
"Force the number of waves per SIMD (1-10)") \
release(bool, GPU_WAVE_LIMIT_ENABLE, false, \
"1 = Enable adaptive wave limiter") \
release(bool, GPU_PAL_FENCE_VALIDATION, true, \
"1 = Enables PAL fence validation with TS") \
release_on_stg(uint, GPU_WAVE_LIMIT_CU_PER_SH, 0, \
"Assume the number of CU per SH for wave limiter") \
release_on_stg(uint, GPU_WAVE_LIMIT_MAX_WAVE, 10, \