Move Images code to hsa-runtime folder
Change-Id: I53c1845d985ac3e9708d952865009c0021f3bb4f
[ROCm/ROCR-Runtime commit: 7e3db20826]
このコミットが含まれているのは:
Sean Keely
@@ -0,0 +1,61 @@
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/*
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* Copyright © 2007-2019 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
|
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
|
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* permit persons to whom the Software is furnished to do so, subject to
|
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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#if !defined (__GFX10_GB_REG_H__)
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#define __GFX10_GB_REG_H__
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/*
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* gfx10_gb_reg.h
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*
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* Register Spec Release: 1.0
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*
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*/
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union GB_ADDR_CONFIG
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{
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struct
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{
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#if defined(LITTLEENDIAN_CPU)
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unsigned int NUM_PIPES : 3;
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unsigned int PIPE_INTERLEAVE_SIZE : 3;
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unsigned int MAX_COMPRESSED_FRAGS : 2;
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unsigned int NUM_PKRS : 3;
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unsigned int : 21;
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#elif defined(BIGENDIAN_CPU)
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unsigned int : 21;
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unsigned int NUM_PKRS : 3;
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unsigned int MAX_COMPRESSED_FRAGS : 2;
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unsigned int PIPE_INTERLEAVE_SIZE : 3;
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unsigned int NUM_PIPES : 3;
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#endif
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} bitfields, bits;
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unsigned int u32All;
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int i32All;
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float f32All;
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};
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#endif
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@@ -0,0 +1,79 @@
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/*
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* Copyright © 2007-2019 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
|
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* a copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
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* distribute, sub license, and/or sell copies of the Software, and to
|
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* permit persons to whom the Software is furnished to do so, subject to
|
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* the following conditions:
|
||||
*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
|
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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#if !defined (__GFX9_GB_REG_H__)
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#define __GFX9_GB_REG_H__
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/*
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* gfx9_gb_reg.h
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*
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* Register Spec Release: 1.0
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*
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*/
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union GB_ADDR_CONFIG {
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struct {
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#if defined(LITTLEENDIAN_CPU)
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unsigned int NUM_PIPES : 3;
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unsigned int PIPE_INTERLEAVE_SIZE : 3;
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unsigned int MAX_COMPRESSED_FRAGS : 2;
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unsigned int BANK_INTERLEAVE_SIZE : 3;
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unsigned int : 1;
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unsigned int NUM_BANKS : 3;
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unsigned int : 1;
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unsigned int SHADER_ENGINE_TILE_SIZE : 3;
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unsigned int NUM_SHADER_ENGINES : 2;
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unsigned int NUM_GPUS : 3;
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unsigned int MULTI_GPU_TILE_SIZE : 2;
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unsigned int NUM_RB_PER_SE : 2;
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unsigned int ROW_SIZE : 2;
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unsigned int NUM_LOWER_PIPES : 1;
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unsigned int SE_ENABLE : 1;
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#elif defined(BIGENDIAN_CPU)
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unsigned int SE_ENABLE : 1;
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unsigned int NUM_LOWER_PIPES : 1;
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unsigned int ROW_SIZE : 2;
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unsigned int NUM_RB_PER_SE : 2;
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unsigned int MULTI_GPU_TILE_SIZE : 2;
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unsigned int NUM_GPUS : 3;
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unsigned int NUM_SHADER_ENGINES : 2;
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unsigned int SHADER_ENGINE_TILE_SIZE : 3;
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unsigned int : 1;
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unsigned int NUM_BANKS : 3;
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unsigned int : 1;
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unsigned int BANK_INTERLEAVE_SIZE : 3;
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unsigned int MAX_COMPRESSED_FRAGS : 2;
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unsigned int PIPE_INTERLEAVE_SIZE : 3;
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unsigned int NUM_PIPES : 3;
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#endif
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} bitfields, bits;
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unsigned int u32All;
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signed int i32All;
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float f32All;
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};
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#endif
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@@ -0,0 +1,154 @@
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/*
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* Copyright © 2007-2019 Advanced Micro Devices, Inc.
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* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining
|
||||
* a copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
|
||||
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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#if !defined (__SI_GB_REG_H__)
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#define __SI_GB_REG_H__
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/*****************************************************************************************************************
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*
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* si_gb_reg.h
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*
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* Register Spec Release: Chip Spec 0.28
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*
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*****************************************************************************************************************/
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/*
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* GB_ADDR_CONFIG struct
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*/
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#if defined(LITTLEENDIAN_CPU)
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typedef struct _GB_ADDR_CONFIG_T {
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unsigned int num_pipes : 3;
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unsigned int : 1;
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unsigned int pipe_interleave_size : 3;
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unsigned int : 1;
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unsigned int bank_interleave_size : 3;
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unsigned int : 1;
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unsigned int num_shader_engines : 2;
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unsigned int : 2;
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unsigned int shader_engine_tile_size : 3;
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unsigned int : 1;
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unsigned int num_gpus : 3;
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unsigned int : 1;
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unsigned int multi_gpu_tile_size : 2;
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unsigned int : 2;
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unsigned int row_size : 2;
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unsigned int num_lower_pipes : 1;
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unsigned int : 1;
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} GB_ADDR_CONFIG_T;
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#elif defined(BIGENDIAN_CPU)
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typedef struct _GB_ADDR_CONFIG_T {
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unsigned int : 1;
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unsigned int num_lower_pipes : 1;
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unsigned int row_size : 2;
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unsigned int : 2;
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unsigned int multi_gpu_tile_size : 2;
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unsigned int : 1;
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unsigned int num_gpus : 3;
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unsigned int : 1;
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unsigned int shader_engine_tile_size : 3;
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unsigned int : 2;
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unsigned int num_shader_engines : 2;
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unsigned int : 1;
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unsigned int bank_interleave_size : 3;
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unsigned int : 1;
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unsigned int pipe_interleave_size : 3;
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unsigned int : 1;
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unsigned int num_pipes : 3;
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} GB_ADDR_CONFIG_T;
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#endif
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typedef union {
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unsigned int val : 32;
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GB_ADDR_CONFIG_T f;
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} GB_ADDR_CONFIG;
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#if defined(LITTLEENDIAN_CPU)
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typedef struct _GB_TILE_MODE_T {
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unsigned int micro_tile_mode : 2;
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unsigned int array_mode : 4;
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unsigned int pipe_config : 5;
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unsigned int tile_split : 3;
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unsigned int bank_width : 2;
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unsigned int bank_height : 2;
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unsigned int macro_tile_aspect : 2;
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unsigned int num_banks : 2;
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unsigned int micro_tile_mode_new : 3;
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unsigned int sample_split : 2;
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unsigned int : 5;
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} GB_TILE_MODE_T;
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typedef struct _GB_MACROTILE_MODE_T {
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unsigned int bank_width : 2;
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unsigned int bank_height : 2;
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unsigned int macro_tile_aspect : 2;
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unsigned int num_banks : 2;
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unsigned int : 24;
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} GB_MACROTILE_MODE_T;
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#elif defined(BIGENDIAN_CPU)
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typedef struct _GB_TILE_MODE_T {
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unsigned int : 5;
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unsigned int sample_split : 2;
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unsigned int micro_tile_mode_new : 3;
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unsigned int num_banks : 2;
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unsigned int macro_tile_aspect : 2;
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unsigned int bank_height : 2;
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unsigned int bank_width : 2;
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unsigned int tile_split : 3;
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unsigned int pipe_config : 5;
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unsigned int array_mode : 4;
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unsigned int micro_tile_mode : 2;
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} GB_TILE_MODE_T;
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typedef struct _GB_MACROTILE_MODE_T {
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unsigned int : 24;
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unsigned int num_banks : 2;
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unsigned int macro_tile_aspect : 2;
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unsigned int bank_height : 2;
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unsigned int bank_width : 2;
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} GB_MACROTILE_MODE_T;
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#endif
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typedef union {
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unsigned int val : 32;
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GB_TILE_MODE_T f;
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} GB_TILE_MODE;
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typedef union {
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unsigned int val : 32;
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GB_MACROTILE_MODE_T f;
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} GB_MACROTILE_MODE;
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#endif
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