Fix sL1D values in memory chart (#2037)

Αυτή η υποβολή περιλαμβάνεται σε:
vedithal-amd
2025-11-27 09:13:19 -05:00
υποβλήθηκε από GitHub
γονέας 2e1c37a926
υποβολή 2e10041210
2 αρχεία άλλαξαν με 6 προσθήκες και 4 διαγραφές
@@ -38,6 +38,8 @@ Full documentation for ROCm Compute Profiler is available at [https://rocm.docs.
* Corrected peak VALU Roofline profiling and analysis by removing `FP8` VALU and `BF16` VALU benchmarking.
* Fixed sL1D metric values showing up as N/A in memory chart diagram
## ROCm Compute Profiler 3.4.0 for ROCm 7.2.0
### Added
@@ -1075,7 +1075,7 @@ class MemChart:
wires_E_GLV.vl1_rd = metric_dict.get("VL1 Rd", "n/a")
wires_E_GLV.vl1_wr = metric_dict.get("VL1 Wr", "n/a")
wires_E_GLV.vl1_atomic = metric_dict.get("VL1 Atomic", "n/a")
wires_E_GLV.sl1_rd = metric_dict.get("VL1D Rd", "n/a")
wires_E_GLV.sl1_rd = metric_dict.get("sL1D Rd", "n/a")
wires_E_GLV.draw(canvas)
@@ -1170,9 +1170,9 @@ class MemChart:
wires_L1_L2.vl1_l2_rd = metric_dict.get("VL1_L2 Rd", "n/a")
wires_L1_L2.vl1_l2_wr = metric_dict.get("VL1_L2 Wr", "n/a")
wires_L1_L2.vl1_l2_atomic = metric_dict.get("VL1_L2 Atomic", "n/a")
wires_L1_L2.sl1_l2_rd = metric_dict.get("VL1D_L2 Rd", "n/a")
wires_L1_L2.sl1_l2_wr = metric_dict.get("VL1D_L2 Wr", "n/a")
wires_L1_L2.sl1_l2_atomic = metric_dict.get("VL1D_L2 Atomic", "n/a")
wires_L1_L2.sl1_l2_rd = metric_dict.get("sL1D_L2 Rd", "n/a")
wires_L1_L2.sl1_l2_wr = metric_dict.get("sL1D_L2 Wr", "n/a")
wires_L1_L2.sl1_l2_atomic = metric_dict.get("sL1D_L2 Atomic", "n/a")
wires_L1_L2.il1_l2_req = metric_dict.get("IL1_L2 Rd", "n/a")
wires_L1_L2.draw(canvas)