Add SP3 assembler support for gfx90a.
Add updated SP3 static library with support for gfx90a and
also add initial corresponding changes in kfdtest.
Change-Id: I71bc6404ace7f9bf0dd74e712287136aa2b8a03d
[ROCm/ROCR-Runtime commit: c861873dae]
このコミットが含まれているのは:
@@ -109,6 +109,7 @@ set (SRC_FILES gtest-1.6.0/gtest-all.cpp
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src/GoogleTestExtension.cpp
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src/IndirectBuffer.cpp
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src/IsaGenerator.cpp
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src/IsaGenerator_Aldebaran.cpp
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src/IsaGenerator_Gfx10.cpp
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src/IsaGenerator_Gfx72.cpp
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src/IsaGenerator_Gfx8.cpp
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@@ -108,9 +108,11 @@ struct sp3_shader {
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uint32_t nsgprs; ///< Number of scalar GPRs used.
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uint32_t nvgprs; ///< Number of vector GPRs used.
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uint32_t nsvgprs; ///< Number of shared vector GPRs used.
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uint32_t naccvgprs; ///< Number of accumulator vector GPRs used (only available in certain projects).
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uint32_t nsgprs_manual_alloc;
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uint32_t nvgprs_manual_alloc;
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uint32_t nsvgprs_manual_alloc;
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uint32_t naccvgprs_manual_alloc;
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uint32_t trap_present;
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uint32_t user_sgpr_count;
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uint32_t scratch_en;
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@@ -30,6 +30,7 @@
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#include "IsaGenerator_Gfx8.hpp"
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#include "IsaGenerator_Gfx9.hpp"
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#include "IsaGenerator_Gfx10.hpp"
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#include "IsaGenerator_Aldebaran.hpp"
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#include "GoogleTestExtension.hpp"
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@@ -92,8 +93,9 @@ IsaGenerator* IsaGenerator::Create(unsigned int familyId) {
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case FAMILY_AI:
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case FAMILY_RV:
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case FAMILY_AR:
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case FAMILY_AL:
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return new IsaGenerator_Gfx9;
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case FAMILY_AL:
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return new IsaGenerator_Aldbrn;
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case FAMILY_NV:
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return new IsaGenerator_Gfx10;
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@@ -0,0 +1,113 @@
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/*
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* Copyright (C) 2020 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "IsaGenerator_Aldebaran.hpp"
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#include <algorithm>
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#include <string>
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const std::string IsaGenerator_Aldbrn::ASIC_NAME = "ALDEBARAN";
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/* The binaries are generated from following ISA */
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#if 0
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/* flat_atomic_inc will not support by some PCIE, use flat_atomic_add instead */
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shader atomic_add
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asic(ALDEBARAN)
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type(CS)
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v_mov_b32 v0, s0
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v_mov_b32 v1, s1
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v_mov_b32 v2, 1
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flat_atomic_add v3, v[0:1], v2 slc glc
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s_waitcnt 0
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s_endpgm
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end
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shader copy_dword
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asic(ALDEBARAN)
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type(CS)
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/* copy the parameters from scalar registers to vector registers */
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v_mov_b32 v0, s0
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v_mov_b32 v1, s1
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v_mov_b32 v2, s2
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v_mov_b32 v3, s3
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/* copy a dword between the passed addresses */
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flat_load_dword v4, v[0:1] slc glc
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s_waitcnt 0
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flat_store_dword v[2:3], v4 slc glc
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s_endpgm
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end
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shader main
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asic(ALDEBARAN)
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type(CS)
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loop:
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s_branch loop
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s_endpgm
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end
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#endif
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const uint32_t IsaGenerator_Aldbrn::NOOP_ISA[] = {
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0xbf810000
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};
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const uint32_t IsaGenerator_Aldbrn::COPY_DWORD_ISA[] = {
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0x7e000200, 0x7e020201,
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0x7e040202, 0x7e060203,
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0xdc530000, 0x047f0000,
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0xbf8c0000, 0xdc730000,
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0x007f0402, 0xbf810000
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};
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const uint32_t IsaGenerator_Aldbrn::INFINITE_LOOP_ISA[] = {
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0xbf82ffff, 0xbf810000
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};
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const uint32_t IsaGenerator_Aldbrn::ATOMIC_ADD_ISA[] = {
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0x7e000200, 0x7e020201,
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0x7e040281, 0xdd0b0000,
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0x037f0200, 0xbf8c0000,
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0xbf810000, 0x00000000
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};
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void IsaGenerator_Aldbrn::GetNoopIsa(HsaMemoryBuffer& rBuf) {
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std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
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}
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void IsaGenerator_Aldbrn::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
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std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
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}
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void IsaGenerator_Aldbrn::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
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std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
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}
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void IsaGenerator_Aldbrn::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
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std::copy(ATOMIC_ADD_ISA, ATOMIC_ADD_ISA+ARRAY_SIZE(ATOMIC_ADD_ISA), rBuf.As<uint32_t*>());
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}
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const std::string& IsaGenerator_Aldbrn::GetAsicName() {
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return ASIC_NAME;
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}
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@@ -0,0 +1,49 @@
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/*
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* Copyright (C) 2020 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _ISAGENERATOR_ALDEBARAN_H_
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#define _ISAGENERATOR_ALDEBARAN_H_
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#include <string>
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#include "IsaGenerator.hpp"
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class IsaGenerator_Aldbrn : public IsaGenerator {
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public:
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virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
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virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
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virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
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virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
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protected:
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virtual const std::string& GetAsicName();
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private:
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static const std::string ASIC_NAME;
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static const uint32_t NOOP_ISA[];
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static const uint32_t COPY_DWORD_ISA[];
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static const uint32_t INFINITE_LOOP_ISA[];
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static const uint32_t ATOMIC_ADD_ISA[];
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};
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#endif // _ISAGENERATOR_ALDEBARAN_H_
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@@ -108,6 +108,29 @@ wave_size(32)\n\
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end\n\
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";
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const char* aldbrn_ScratchCopyDword =
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"\
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shader ScratchCopyDword\n\
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asic(ALDEBARAN)\n\
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type(CS)\n\
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/*copy the parameters from scalar registers to vector registers*/\n\
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v_mov_b32 v0, s0\n\
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v_mov_b32 v1, s1\n\
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v_mov_b32 v2, s2\n\
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v_mov_b32 v3, s3\n\
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/*set up the scratch parameters. This assumes a single 16-reg block.*/\n\
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s_mov_b32 flat_scratch_lo, s4\n\
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s_mov_b32 flat_scratch_hi, s5\n\
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/*copy a dword between the passed addresses*/\n\
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flat_load_dword v4, v[0:1] slc\n\
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s_waitcnt vmcnt(0)&lgkmcnt(0)\n\
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flat_store_dword v[2:3], v4 slc\n\
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\n\
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s_endpgm\n\
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\n\
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end\n\
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";
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/* Continuously poll src buffer and check buffer value
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@@ -650,8 +673,10 @@ TEST_F(KFDMemoryTest, FlatScratchAccess) {
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const char *pScratchCopyDword;
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if (m_FamilyId < FAMILY_AI)
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pScratchCopyDword = gfx8_ScratchCopyDword;
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else if (m_FamilyId < FAMILY_NV)
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else if (m_FamilyId < FAMILY_AL)
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pScratchCopyDword = gfx9_ScratchCopyDword;
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else if (m_FamilyId == FAMILY_AL)
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pScratchCopyDword = aldbrn_ScratchCopyDword;
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else
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pScratchCopyDword = gfx10_ScratchCopyDword;
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m_pIsaGen->CompileShader(pScratchCopyDword, "ScratchCopyDword", isaBuffer);
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@@ -1508,8 +1533,10 @@ TEST_F(KFDMemoryTest, PtraceAccessInvisibleVram) {
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const char *pScratchCopyDword;
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if (m_FamilyId < FAMILY_AI)
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pScratchCopyDword = gfx8_ScratchCopyDword;
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else if (m_FamilyId < FAMILY_NV)
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else if (m_FamilyId < FAMILY_AL)
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pScratchCopyDword = gfx9_ScratchCopyDword;
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else if (m_FamilyId == FAMILY_AL)
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pScratchCopyDword = aldbrn_ScratchCopyDword;
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else
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pScratchCopyDword = gfx10_ScratchCopyDword;
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