Change the confusing type and name in topology
node is used repeatedly and excessively, which caused unnecessary confusion.
Change-Id: I4ae4171887df5e5b85209a5af8a636e6d72e5e82
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
[ROCm/ROCR-Runtime commit: 08b6685dd5]
Этот коммит содержится в:
@@ -53,10 +53,10 @@ typedef struct {
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HsaMemoryProperties *mem; /* node->NumBanks elements */
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HsaCacheProperties *cache;
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HsaIoLinkProperties *link;
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} node_t;
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} node_props_t;
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static HsaSystemProperties *_system = NULL;
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static node_t *node = NULL;
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static node_props_t *g_props;
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static int is_valgrind;
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static int processor_vendor;
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@@ -234,30 +234,17 @@ union _cpuid_leaf_ebx { /* Register EBX */
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uint32_t full;
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};
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static void
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free_node(node_t *n)
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static void free_properties(node_props_t *props, int size)
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{
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assert(n);
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if (props) {
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int i;
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for (i = 0; i < size; i++) {
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free(props[i].mem);
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free(props[i].cache);
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free(props[i].link);
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}
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if (!n)
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return;
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if ((n)->mem)
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free((n)->mem);
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if ((n)->cache)
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free((n)->cache);
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if ((n)->link)
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free((n)->link);
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}
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static void free_nodes(node_t *temp_nodes, int size)
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{
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int i;
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if (temp_nodes) {
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for (i = 0; i < size; i++)
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free_node(&temp_nodes[i]);
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free(temp_nodes);
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free(props);
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}
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}
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@@ -1082,7 +1069,7 @@ exit:
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* @cpu_ci_list - the cpu cache information list to look up cache info
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* Return - HSAKMT_STATUS_SUCCESS in success or error number in failure
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*/
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static HSAKMT_STATUS topology_get_cpu_cache_props(node_t *tbl,
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static HSAKMT_STATUS topology_get_cpu_cache_props(node_props_t *tbl,
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cpu_cacheinfo_t *cpu_ci_list)
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{
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HSAKMT_STATUS ret = HSAKMT_STATUS_SUCCESS;
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@@ -1154,7 +1141,7 @@ static HSAKMT_STATUS topology_create_temp_cpu_cache_list(void **temp_cpu_ci_list
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return HSAKMT_STATUS_SUCCESS;
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}
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static HSAKMT_STATUS topology_get_cpu_cache_props(node_t *tbl,
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static HSAKMT_STATUS topology_get_cpu_cache_props(node_props_t *tbl,
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cpu_cacheinfo_t *cpu_ci_list)
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{
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return HSAKMT_STATUS_SUCCESS;
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@@ -1311,7 +1298,7 @@ err1:
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*/
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static HsaIoLinkProperties *topology_get_free_io_link_slot_for_node(uint32_t node_id,
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const HsaSystemProperties *sys_props,
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node_t *nodes)
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node_props_t *node_props)
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{
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HsaIoLinkProperties *props;
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@@ -1320,18 +1307,18 @@ static HsaIoLinkProperties *topology_get_free_io_link_slot_for_node(uint32_t nod
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return NULL;
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}
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props = nodes[node_id].link;
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props = node_props[node_id].link;
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if (!props) {
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pr_err("No io_link reported for Node [%d]\n", node_id);
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return NULL;
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}
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if (nodes[node_id].node.NumIOLinks >= sys_props->NumNodes - 1) {
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if (node_props[node_id].node.NumIOLinks >= sys_props->NumNodes - 1) {
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pr_err("No more space for io_link for Node [%d]\n", node_id);
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return NULL;
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}
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return &props[nodes[node_id].node.NumIOLinks];
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return &props[node_props[node_id].node.NumIOLinks];
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}
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/* topology_add_io_link_for_node - If a free slot is available,
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@@ -1341,7 +1328,7 @@ static HsaIoLinkProperties *topology_get_free_io_link_slot_for_node(uint32_t nod
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*/
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static HSAKMT_STATUS topology_add_io_link_for_node(uint32_t node_id,
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const HsaSystemProperties *sys_props,
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node_t *nodes,
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node_props_t *node_props,
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HSA_IOLINKTYPE IoLinkType,
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uint32_t NodeTo,
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uint32_t Weight, bool bi_dir)
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@@ -1353,7 +1340,7 @@ static HSAKMT_STATUS topology_add_io_link_for_node(uint32_t node_id,
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for (i = 0; i < num_links; i++) {
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props = topology_get_free_io_link_slot_for_node(node_from,
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sys_props, nodes);
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sys_props, node_props);
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if (!props)
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return HSAKMT_STATUS_NO_MEMORY;
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@@ -1361,7 +1348,7 @@ static HSAKMT_STATUS topology_add_io_link_for_node(uint32_t node_id,
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props->NodeFrom = node_from;
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props->NodeTo = node_to;
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props->Weight = Weight;
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nodes[node_from].node.NumIOLinks++;
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node_props[node_from].node.NumIOLinks++;
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/* switch direction on the 2nd link when num_links=2 */
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node_from = NodeTo;
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node_to = node_id;
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@@ -1371,16 +1358,16 @@ static HSAKMT_STATUS topology_add_io_link_for_node(uint32_t node_id,
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}
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/* Find the CPU that this GPU (gpu_node) directly connects to */
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static int32_t gpu_get_direct_link_cpu(uint32_t gpu_node, node_t *nodes)
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static int32_t gpu_get_direct_link_cpu(uint32_t gpu_node, node_props_t *node_props)
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{
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HsaIoLinkProperties *props = nodes[gpu_node].link;
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HsaIoLinkProperties *props = node_props[gpu_node].link;
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uint32_t i;
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if (!nodes[gpu_node].gpu_id || !props ||
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nodes[gpu_node].node.NumIOLinks == 0)
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if (!node_props[gpu_node].gpu_id || !props ||
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node_props[gpu_node].node.NumIOLinks == 0)
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return -1;
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for (i = 0; i < nodes[gpu_node].node.NumIOLinks; i++)
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for (i = 0; i < node_props[gpu_node].node.NumIOLinks; i++)
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if (props[i].IoLinkType == HSA_IOLINKTYPE_PCIEXPRESS &&
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props[i].Weight <= 20) /* >20 is GPU->CPU->GPU */
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return props[i].NodeTo;
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@@ -1392,16 +1379,16 @@ static int32_t gpu_get_direct_link_cpu(uint32_t gpu_node, node_t *nodes)
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* been created in the kernel.
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*/
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static HSAKMT_STATUS get_direct_iolink_info(uint32_t node1, uint32_t node2,
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node_t *nodes, HSAuint32 *weight,
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node_props_t *node_props, HSAuint32 *weight,
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HSA_IOLINKTYPE *type)
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{
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HsaIoLinkProperties *props = nodes[node1].link;
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HsaIoLinkProperties *props = node_props[node1].link;
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uint32_t i;
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if (!props)
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return HSAKMT_STATUS_INVALID_NODE_UNIT;
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for (i = 0; i < nodes[node1].node.NumIOLinks; i++)
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for (i = 0; i < node_props[node1].node.NumIOLinks; i++)
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if (props[i].NodeTo == node2) {
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if (weight)
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*weight = props[i].Weight;
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@@ -1414,7 +1401,7 @@ static HSAKMT_STATUS get_direct_iolink_info(uint32_t node1, uint32_t node2,
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}
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static HSAKMT_STATUS get_indirect_iolink_info(uint32_t node1, uint32_t node2,
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node_t *nodes, HSAuint32 *weight,
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node_props_t *node_props, HSAuint32 *weight,
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HSA_IOLINKTYPE *type)
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{
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int32_t dir_cpu1 = -1, dir_cpu2 = -1;
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@@ -1428,13 +1415,13 @@ static HSAKMT_STATUS get_indirect_iolink_info(uint32_t node1, uint32_t node2,
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return HSAKMT_STATUS_INVALID_PARAMETER;
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/* CPU->CPU is not an indirect link */
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if (!nodes[node1].gpu_id && !nodes[node2].gpu_id)
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if (!node_props[node1].gpu_id && !node_props[node2].gpu_id)
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return HSAKMT_STATUS_INVALID_NODE_UNIT;
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if (nodes[node1].gpu_id)
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dir_cpu1 = gpu_get_direct_link_cpu(node1, nodes);
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if (nodes[node2].gpu_id)
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dir_cpu2 = gpu_get_direct_link_cpu(node2, nodes);
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if (node_props[node1].gpu_id)
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dir_cpu1 = gpu_get_direct_link_cpu(node1, node_props);
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if (node_props[node2].gpu_id)
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dir_cpu2 = gpu_get_direct_link_cpu(node2, node_props);
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if (dir_cpu1 < 0 && dir_cpu2 < 0)
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return HSAKMT_STATUS_ERROR;
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@@ -1449,18 +1436,18 @@ static HSAKMT_STATUS get_indirect_iolink_info(uint32_t node1, uint32_t node2,
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if (dir_cpu2 >= 0) {
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if (dir_cpu1 == dir_cpu2) /* GPU->CPU->GPU*/ {
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ret = get_direct_iolink_info(node1, dir_cpu1,
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nodes, &weight1, NULL);
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node_props, &weight1, NULL);
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if (ret != HSAKMT_STATUS_SUCCESS)
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return ret;
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ret = get_direct_iolink_info(dir_cpu1, node2,
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nodes, &weight2, type);
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node_props, &weight2, type);
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} else /* GPU->CPU->CPU->GPU*/ {
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ret = get_direct_iolink_info(node1, dir_cpu1,
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nodes, &weight1, NULL);
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node_props, &weight1, NULL);
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if (ret != HSAKMT_STATUS_SUCCESS)
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return ret;
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ret = get_direct_iolink_info(dir_cpu1, dir_cpu2,
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nodes, &weight2, type);
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node_props, &weight2, type);
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if (ret != HSAKMT_STATUS_SUCCESS)
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return ret;
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/* On QPI interconnection, GPUs can't access
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@@ -1472,22 +1459,22 @@ static HSAKMT_STATUS get_indirect_iolink_info(uint32_t node1, uint32_t node2,
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&& weight2 > 20)
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return HSAKMT_STATUS_NOT_SUPPORTED;
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ret = get_direct_iolink_info(dir_cpu2, node2,
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nodes, &weight3, NULL);
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node_props, &weight3, NULL);
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}
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} else /* GPU->CPU->CPU */ {
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ret = get_direct_iolink_info(node1, dir_cpu1, nodes,
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ret = get_direct_iolink_info(node1, dir_cpu1, node_props,
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&weight1, NULL);
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if (ret != HSAKMT_STATUS_SUCCESS)
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return ret;
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ret = get_direct_iolink_info(dir_cpu1, node2, nodes,
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ret = get_direct_iolink_info(dir_cpu1, node2, node_props,
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&weight2, type);
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}
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} else { /* CPU->CPU->GPU */
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ret = get_direct_iolink_info(node1, dir_cpu2, nodes, &weight2,
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ret = get_direct_iolink_info(node1, dir_cpu2, node_props, &weight2,
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type);
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if (ret != HSAKMT_STATUS_SUCCESS)
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return ret;
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ret = get_direct_iolink_info(dir_cpu2, node2, nodes, &weight3,
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ret = get_direct_iolink_info(dir_cpu2, node2, node_props, &weight3,
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NULL);
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}
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@@ -1499,7 +1486,7 @@ static HSAKMT_STATUS get_indirect_iolink_info(uint32_t node1, uint32_t node2,
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}
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static void topology_create_indirect_gpu_links(const HsaSystemProperties *sys_props,
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node_t *nodes)
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node_props_t *node_props)
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{
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uint32_t i, j;
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@@ -1508,10 +1495,10 @@ static void topology_create_indirect_gpu_links(const HsaSystemProperties *sys_pr
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for (i = 0; i < sys_props->NumNodes - 1; i++) {
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for (j = i + 1; j < sys_props->NumNodes; j++) {
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get_indirect_iolink_info(i, j, nodes, &weight, &type);
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get_indirect_iolink_info(i, j, node_props, &weight, &type);
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if (!weight)
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continue;
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if (topology_add_io_link_for_node(i, sys_props, nodes,
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if (topology_add_io_link_for_node(i, sys_props, node_props,
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type, j, weight, true) != HSAKMT_STATUS_SUCCESS)
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pr_err("Fail to add IO link %d->%d\n", i, j);
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}
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@@ -1522,7 +1509,7 @@ HSAKMT_STATUS topology_take_snapshot(void)
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{
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uint32_t gen_start, gen_end, i, mem_id, cache_id, link_id;
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HsaSystemProperties sys_props;
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node_t *temp_nodes = 0;
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node_props_t *temp_props = 0;
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void *cpu_ci_list = NULL;
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HSAKMT_STATUS ret = HSAKMT_STATUS_SUCCESS;
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struct pci_access *pacc;
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@@ -1544,54 +1531,54 @@ retry:
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return ret;
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if (sys_props.NumNodes > 0) {
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topology_create_temp_cpu_cache_list(&cpu_ci_list);
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temp_nodes = calloc(sys_props.NumNodes * sizeof(node_t), 1);
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if (!temp_nodes)
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temp_props = calloc(sys_props.NumNodes * sizeof(node_props_t), 1);
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if (!temp_props)
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return HSAKMT_STATUS_NO_MEMORY;
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pacc = pci_alloc();
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pci_init(pacc);
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for (i = 0; i < sys_props.NumNodes; i++) {
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ret = topology_sysfs_get_node_props(i,
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&temp_nodes[i].node,
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&temp_nodes[i].gpu_id, pacc);
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&temp_props[i].node,
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&temp_props[i].gpu_id, pacc);
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if (ret != HSAKMT_STATUS_SUCCESS) {
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free_nodes(temp_nodes, i);
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free_properties(temp_props, i);
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goto err;
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}
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if (temp_nodes[i].node.NumMemoryBanks) {
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temp_nodes[i].mem = calloc(temp_nodes[i].node.NumMemoryBanks * sizeof(HsaMemoryProperties), 1);
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if (!temp_nodes[i].mem) {
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if (temp_props[i].node.NumMemoryBanks) {
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temp_props[i].mem = calloc(temp_props[i].node.NumMemoryBanks * sizeof(HsaMemoryProperties), 1);
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if (!temp_props[i].mem) {
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ret = HSAKMT_STATUS_NO_MEMORY;
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free_nodes(temp_nodes, i + 1);
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free_properties(temp_props, i + 1);
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goto err;
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}
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for (mem_id = 0; mem_id < temp_nodes[i].node.NumMemoryBanks; mem_id++) {
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ret = topology_sysfs_get_mem_props(i, mem_id, &temp_nodes[i].mem[mem_id]);
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for (mem_id = 0; mem_id < temp_props[i].node.NumMemoryBanks; mem_id++) {
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ret = topology_sysfs_get_mem_props(i, mem_id, &temp_props[i].mem[mem_id]);
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if (ret != HSAKMT_STATUS_SUCCESS) {
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free_nodes(temp_nodes, i + 1);
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free_properties(temp_props, i + 1);
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goto err;
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}
|
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}
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}
|
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|
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if (temp_nodes[i].node.NumCaches) {
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temp_nodes[i].cache = calloc(temp_nodes[i].node.NumCaches * sizeof(HsaCacheProperties), 1);
|
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if (!temp_nodes[i].cache) {
|
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if (temp_props[i].node.NumCaches) {
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temp_props[i].cache = calloc(temp_props[i].node.NumCaches * sizeof(HsaCacheProperties), 1);
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if (!temp_props[i].cache) {
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ret = HSAKMT_STATUS_NO_MEMORY;
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free_nodes(temp_nodes, i + 1);
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free_properties(temp_props, i + 1);
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goto err;
|
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}
|
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for (cache_id = 0; cache_id < temp_nodes[i].node.NumCaches; cache_id++) {
|
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ret = topology_sysfs_get_cache_props(i, cache_id, &temp_nodes[i].cache[cache_id]);
|
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for (cache_id = 0; cache_id < temp_props[i].node.NumCaches; cache_id++) {
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ret = topology_sysfs_get_cache_props(i, cache_id, &temp_props[i].cache[cache_id]);
|
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if (ret != HSAKMT_STATUS_SUCCESS) {
|
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free_nodes(temp_nodes, i + 1);
|
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free_properties(temp_props, i + 1);
|
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goto err;
|
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}
|
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}
|
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} else if (!temp_nodes[i].gpu_id) { /* a CPU node */
|
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} else if (!temp_props[i].gpu_id) { /* a CPU node */
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ret = topology_get_cpu_cache_props(
|
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&temp_nodes[i], cpu_ci_list);
|
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&temp_props[i], cpu_ci_list);
|
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if (ret != HSAKMT_STATUS_SUCCESS) {
|
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free_nodes(temp_nodes, i + 1);
|
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free_properties(temp_props, i + 1);
|
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goto err;
|
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}
|
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}
|
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@@ -1599,18 +1586,18 @@ retry:
|
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/* To simplify, allocate maximum needed memory for io_links for each node. This
|
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* removes the need for realloc when indirect and QPI links are added later
|
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*/
|
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temp_nodes[i].link = calloc(sys_props.NumNodes - 1, sizeof(HsaIoLinkProperties));
|
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if (!temp_nodes[i].link) {
|
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temp_props[i].link = calloc(sys_props.NumNodes - 1, sizeof(HsaIoLinkProperties));
|
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if (!temp_props[i].link) {
|
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ret = HSAKMT_STATUS_NO_MEMORY;
|
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free_nodes(temp_nodes, i + 1);
|
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free_properties(temp_props, i + 1);
|
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goto err;
|
||||
}
|
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|
||||
if (temp_nodes[i].node.NumIOLinks) {
|
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for (link_id = 0; link_id < temp_nodes[i].node.NumIOLinks; link_id++) {
|
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ret = topology_sysfs_get_iolink_props(i, link_id, &temp_nodes[i].link[link_id]);
|
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if (temp_props[i].node.NumIOLinks) {
|
||||
for (link_id = 0; link_id < temp_props[i].node.NumIOLinks; link_id++) {
|
||||
ret = topology_sysfs_get_iolink_props(i, link_id, &temp_props[i].link[link_id]);
|
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if (ret != HSAKMT_STATUS_SUCCESS) {
|
||||
free_nodes(temp_nodes, i+1);
|
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free_properties(temp_props, i+1);
|
||||
goto err;
|
||||
}
|
||||
}
|
||||
@@ -1622,32 +1609,32 @@ retry:
|
||||
/* All direct IO links are created in the kernel. Here we need to
|
||||
* connect GPU<->GPU or GPU<->CPU indirect IO links.
|
||||
*/
|
||||
topology_create_indirect_gpu_links(&sys_props, temp_nodes);
|
||||
topology_create_indirect_gpu_links(&sys_props, temp_props);
|
||||
|
||||
ret = topology_sysfs_get_generation(&gen_end);
|
||||
if (ret != HSAKMT_STATUS_SUCCESS) {
|
||||
free_nodes(temp_nodes, sys_props.NumNodes);
|
||||
free_properties(temp_props, sys_props.NumNodes);
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (gen_start != gen_end) {
|
||||
free_nodes(temp_nodes, sys_props.NumNodes);
|
||||
temp_nodes = 0;
|
||||
free_properties(temp_props, sys_props.NumNodes);
|
||||
temp_props = 0;
|
||||
goto retry;
|
||||
}
|
||||
|
||||
if (!_system) {
|
||||
_system = malloc(sizeof(HsaSystemProperties));
|
||||
if (!_system) {
|
||||
free_nodes(temp_nodes, sys_props.NumNodes);
|
||||
free_properties(temp_props, sys_props.NumNodes);
|
||||
return HSAKMT_STATUS_NO_MEMORY;
|
||||
}
|
||||
}
|
||||
|
||||
*_system = sys_props;
|
||||
if (node)
|
||||
free(node);
|
||||
node = temp_nodes;
|
||||
if (g_props)
|
||||
free(g_props);
|
||||
g_props = temp_props;
|
||||
err:
|
||||
topology_destroy_temp_cpu_cache_list(cpu_ci_list);
|
||||
return ret;
|
||||
@@ -1658,16 +1645,16 @@ HSAKMT_STATUS topology_drop_snapshot(void)
|
||||
{
|
||||
HSAKMT_STATUS err;
|
||||
|
||||
if (!!_system != !!node) {
|
||||
if (!!_system != !!g_props) {
|
||||
pr_warn("Probably inconsistency?\n");
|
||||
err = HSAKMT_STATUS_SUCCESS;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (node) {
|
||||
if (g_props) {
|
||||
/* Remove state */
|
||||
free_nodes(node, _system->NumNodes);
|
||||
node = NULL;
|
||||
free_properties(g_props, _system->NumNodes);
|
||||
g_props = NULL;
|
||||
}
|
||||
|
||||
free(_system);
|
||||
@@ -1680,10 +1667,10 @@ out:
|
||||
|
||||
HSAKMT_STATUS validate_nodeid(uint32_t nodeid, uint32_t *gpu_id)
|
||||
{
|
||||
if (!node || !_system || _system->NumNodes <= nodeid)
|
||||
if (!g_props || !_system || _system->NumNodes <= nodeid)
|
||||
return HSAKMT_STATUS_INVALID_NODE_UNIT;
|
||||
if (gpu_id)
|
||||
*gpu_id = node[nodeid].gpu_id;
|
||||
*gpu_id = g_props[nodeid].gpu_id;
|
||||
|
||||
return HSAKMT_STATUS_SUCCESS;
|
||||
}
|
||||
@@ -1693,7 +1680,7 @@ HSAKMT_STATUS gpuid_to_nodeid(uint32_t gpu_id, uint32_t *node_id)
|
||||
uint64_t node_idx;
|
||||
|
||||
for (node_idx = 0; node_idx < _system->NumNodes; node_idx++) {
|
||||
if (node[node_idx].gpu_id == gpu_id) {
|
||||
if (g_props[node_idx].gpu_id == gpu_id) {
|
||||
*node_id = node_idx;
|
||||
return HSAKMT_STATUS_SUCCESS;
|
||||
}
|
||||
@@ -1771,7 +1758,7 @@ HSAKMT_STATUS HSAKMTAPI hsaKmtGetNodeProperties(HSAuint32 NodeId,
|
||||
if (err != HSAKMT_STATUS_SUCCESS)
|
||||
return err;
|
||||
|
||||
*NodeProperties = node[NodeId].node;
|
||||
*NodeProperties = g_props[NodeId].node;
|
||||
/* For CPU only node don't add any additional GPU memory banks. */
|
||||
if (gpu_id) {
|
||||
if (topology_is_dgpu(get_device_id_by_gpu_id(gpu_id)))
|
||||
@@ -1820,9 +1807,9 @@ HSAKMT_STATUS HSAKMTAPI hsaKmtGetNodeMemoryProperties(HSAuint32 NodeId,
|
||||
|
||||
memset(MemoryProperties, 0, NumBanks * sizeof(HsaMemoryProperties));
|
||||
|
||||
for (i = 0; i < MIN(node[NodeId].node.NumMemoryBanks, NumBanks); i++) {
|
||||
assert(node[NodeId].mem);
|
||||
MemoryProperties[i] = node[NodeId].mem[i];
|
||||
for (i = 0; i < MIN(g_props[NodeId].node.NumMemoryBanks, NumBanks); i++) {
|
||||
assert(g_props[NodeId].mem);
|
||||
MemoryProperties[i] = g_props[NodeId].mem[i];
|
||||
}
|
||||
|
||||
/* The following memory banks does not apply to CPU only node */
|
||||
@@ -1836,7 +1823,7 @@ HSAKMT_STATUS HSAKMTAPI hsaKmtGetNodeMemoryProperties(HSAuint32 NodeId,
|
||||
fmm_get_aperture_base_and_limit(FMM_LDS, gpu_id,
|
||||
&MemoryProperties[i].VirtualBaseAddress, &aperture_limit) == HSAKMT_STATUS_SUCCESS) {
|
||||
MemoryProperties[i].HeapType = HSA_HEAPTYPE_GPU_LDS;
|
||||
MemoryProperties[i].SizeInBytes = node[NodeId].node.LDSSizeInKB * 1024;
|
||||
MemoryProperties[i].SizeInBytes = g_props[NodeId].node.LDSSizeInKB * 1024;
|
||||
i++;
|
||||
}
|
||||
|
||||
@@ -1844,11 +1831,11 @@ HSAKMT_STATUS HSAKMTAPI hsaKmtGetNodeMemoryProperties(HSAuint32 NodeId,
|
||||
* For dGPU the topology node contains Local Memory and it is added by
|
||||
* the for loop above
|
||||
*/
|
||||
if (!nodeIsDGPU && i < NumBanks && node[NodeId].node.LocalMemSize > 0 &&
|
||||
if (!nodeIsDGPU && i < NumBanks && g_props[NodeId].node.LocalMemSize > 0 &&
|
||||
fmm_get_aperture_base_and_limit(FMM_GPUVM, gpu_id,
|
||||
&MemoryProperties[i].VirtualBaseAddress, &aperture_limit) == HSAKMT_STATUS_SUCCESS) {
|
||||
MemoryProperties[i].HeapType = HSA_HEAPTYPE_FRAME_BUFFER_PRIVATE;
|
||||
MemoryProperties[i].SizeInBytes = node[NodeId].node.LocalMemSize;
|
||||
MemoryProperties[i].SizeInBytes = g_props[NodeId].node.LocalMemSize;
|
||||
i++;
|
||||
}
|
||||
|
||||
@@ -1897,14 +1884,14 @@ HSAKMT_STATUS HSAKMTAPI hsaKmtGetNodeCacheProperties(HSAuint32 NodeId,
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (NodeId >= _system->NumNodes || NumCaches > node[NodeId].node.NumCaches) {
|
||||
if (NodeId >= _system->NumNodes || NumCaches > g_props[NodeId].node.NumCaches) {
|
||||
err = HSAKMT_STATUS_INVALID_PARAMETER;
|
||||
goto out;
|
||||
}
|
||||
|
||||
for (i = 0; i < MIN(node[NodeId].node.NumCaches, NumCaches); i++) {
|
||||
assert(node[NodeId].cache);
|
||||
CacheProperties[i] = node[NodeId].cache[i];
|
||||
for (i = 0; i < MIN(g_props[NodeId].node.NumCaches, NumCaches); i++) {
|
||||
assert(g_props[NodeId].cache);
|
||||
CacheProperties[i] = g_props[NodeId].cache[i];
|
||||
}
|
||||
|
||||
err = HSAKMT_STATUS_SUCCESS;
|
||||
@@ -1935,14 +1922,14 @@ HSAKMT_STATUS HSAKMTAPI hsaKmtGetNodeIoLinkProperties(HSAuint32 NodeId,
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (NodeId >= _system->NumNodes || NumIoLinks > node[NodeId].node.NumIOLinks) {
|
||||
if (NodeId >= _system->NumNodes || NumIoLinks > g_props[NodeId].node.NumIOLinks) {
|
||||
err = HSAKMT_STATUS_INVALID_PARAMETER;
|
||||
goto out;
|
||||
}
|
||||
|
||||
for (i = 0; i < MIN(node[NodeId].node.NumIOLinks, NumIoLinks); i++) {
|
||||
assert(node[NodeId].link);
|
||||
IoLinkProperties[i] = node[NodeId].link[i];
|
||||
for (i = 0; i < MIN(g_props[NodeId].node.NumIOLinks, NumIoLinks); i++) {
|
||||
assert(g_props[NodeId].link);
|
||||
IoLinkProperties[i] = g_props[NodeId].link[i];
|
||||
}
|
||||
|
||||
err = HSAKMT_STATUS_SUCCESS;
|
||||
@@ -1954,22 +1941,22 @@ out:
|
||||
|
||||
uint16_t get_device_id_by_node(HSAuint32 node_id)
|
||||
{
|
||||
if (!node || !_system || _system->NumNodes <= node_id)
|
||||
if (!g_props || !_system || _system->NumNodes <= node_id)
|
||||
return 0;
|
||||
|
||||
return node[node_id].node.DeviceId;
|
||||
return g_props[node_id].node.DeviceId;
|
||||
}
|
||||
|
||||
uint16_t get_device_id_by_gpu_id(HSAuint32 gpu_id)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
if (!node || !_system)
|
||||
if (!g_props || !_system)
|
||||
return 0;
|
||||
|
||||
for (i = 0; i < _system->NumNodes; i++) {
|
||||
if (node[i].gpu_id == gpu_id)
|
||||
return node[i].node.DeviceId;
|
||||
if (g_props[i].gpu_id == gpu_id)
|
||||
return g_props[i].node.DeviceId;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
Ссылка в новой задаче
Block a user