Update the trap handler for gfx940
gfx940 uses ttmp11 to hold the queue packet index so the first level
trap handler uses ttmp13 instead to save ib_sts.
Repurpose ttmp11[31] to mean that the ttmps are initialized. The issue
was that the debugger could not tell whether ttmp6 was written by the
trap handler when determining the stop reason.
If ttmp11[31]=0, then the trap handler has not been executed and ttmp6
should be assumed to be 0. If ttmp11[31]=1, then ttmp6 holds the
trap_id, if an s_trap instruction caused the exception.
Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Signed-off-by: Lancelot Six <lancelot.six@amd.com>
Change-Id: I9af903abae044b9ec530306229caf3b883f3ee46
[ROCm/ROCR-Runtime commit: f31b312611]
Этот коммит содержится в:
коммит произвёл
David Yat Sin
родитель
547d2aa3c8
Коммит
3603303bc7
@@ -243,6 +243,7 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
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ASICShader compute_8;
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ASICShader compute_9;
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ASICShader compute_90a;
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ASICShader compute_940;
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ASICShader compute_1010;
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ASICShader compute_10;
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ASICShader compute_11;
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@@ -255,6 +256,7 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
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{kCodeTrapHandler8, sizeof(kCodeTrapHandler8), 2, 4},
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{kCodeTrapHandler9, sizeof(kCodeTrapHandler9), 2, 4},
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{kCodeTrapHandler90a, sizeof(kCodeTrapHandler90a), 2, 4},
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{NULL, 0, 0, 0},
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{kCodeTrapHandler1010, sizeof(kCodeTrapHandler1010), 2, 4},
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{kCodeTrapHandler10, sizeof(kCodeTrapHandler10), 2, 4},
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{NULL, 0, 0, 0},
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@@ -265,6 +267,7 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
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{kCodeTrapHandler8, sizeof(kCodeTrapHandler8), 2, 4},
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{kCodeTrapHandlerV2_9, sizeof(kCodeTrapHandlerV2_9), 2, 4},
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{kCodeTrapHandlerV2_9, sizeof(kCodeTrapHandlerV2_9), 2, 4},
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{kCodeTrapHandlerV2_940, sizeof(kCodeTrapHandlerV2_940), 2, 4},
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{kCodeTrapHandlerV2_1010, sizeof(kCodeTrapHandlerV2_1010), 2, 4},
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{kCodeTrapHandlerV2_10, sizeof(kCodeTrapHandlerV2_10), 2, 4},
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{kCodeTrapHandlerV2_11, sizeof(kCodeTrapHandlerV2_11), 2, 4},
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@@ -275,6 +278,7 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
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{kCodeCopyAligned8, sizeof(kCodeCopyAligned8), 32, 12},
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{kCodeCopyAligned8, sizeof(kCodeCopyAligned8), 32, 12},
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{kCodeCopyAligned8, sizeof(kCodeCopyAligned8), 32, 12},
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{kCodeCopyAligned8, sizeof(kCodeCopyAligned8), 32, 12},
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{kCodeCopyAligned10, sizeof(kCodeCopyAligned10), 32, 12},
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{kCodeCopyAligned10, sizeof(kCodeCopyAligned10), 32, 12},
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{kCodeCopyAligned11, sizeof(kCodeCopyAligned11), 32, 12},
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@@ -285,6 +289,7 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
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{kCodeCopyMisaligned8, sizeof(kCodeCopyMisaligned8), 23, 10},
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{kCodeCopyMisaligned8, sizeof(kCodeCopyMisaligned8), 23, 10},
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{kCodeCopyMisaligned8, sizeof(kCodeCopyMisaligned8), 23, 10},
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{kCodeCopyMisaligned8, sizeof(kCodeCopyMisaligned8), 23, 10},
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{kCodeCopyMisaligned10, sizeof(kCodeCopyMisaligned10), 23, 10},
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{kCodeCopyMisaligned10, sizeof(kCodeCopyMisaligned10), 23, 10},
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{kCodeCopyMisaligned11, sizeof(kCodeCopyMisaligned11), 23, 10},
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@@ -295,6 +300,7 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
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{kCodeFill8, sizeof(kCodeFill8), 19, 8},
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{kCodeFill8, sizeof(kCodeFill8), 19, 8},
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{kCodeFill8, sizeof(kCodeFill8), 19, 8},
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{kCodeFill8, sizeof(kCodeFill8), 19, 8},
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{kCodeFill10, sizeof(kCodeFill10), 19, 8},
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{kCodeFill10, sizeof(kCodeFill10), 19, 8},
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{kCodeFill11, sizeof(kCodeFill11), 19, 8},
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@@ -314,9 +320,10 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
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asic_shader = &compiled_shader_it->second.compute_8;
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break;
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case 9:
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if(((isa_->GetMinorVersion() == 0) && (isa_->GetStepping() == 10)) ||
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((isa_->GetMinorVersion() == 4) && (isa_->GetStepping() == 0)))
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if((isa_->GetMinorVersion() == 0) && (isa_->GetStepping() == 10))
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asic_shader = &compiled_shader_it->second.compute_90a;
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else if((isa_->GetMinorVersion() == 4) && (isa_->GetStepping() == 0))
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asic_shader = &compiled_shader_it->second.compute_940;
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else
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asic_shader = &compiled_shader_it->second.compute_9;
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break;
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+3
-2
@@ -46,8 +46,9 @@ cmake_minimum_required ( VERSION 3.7 )
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find_package(Clang REQUIRED HINTS ${CMAKE_PREFIX_PATH}/llvm PATHS /opt/rocm/llvm )
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find_package(LLVM REQUIRED HINTS ${CMAKE_PREFIX_PATH}/llvm PATHS /opt/rocm/llvm )
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set (TARGET_DEVS "gfx900;gfx1010;gfx1030;gfx1100")
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set (POSTFIX "9;1010;10;11")
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set (TARGET_DEVS "gfx900;gfx940;gfx1010;gfx1030;gfx1100")
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set (POSTFIX "9;940;1010;10;11")
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if(${CMAKE_VERBOSE_MAKEFILE})
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get_property(clang_path TARGET clang PROPERTY LOCATION)
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+42
-22
@@ -71,22 +71,27 @@
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.set TTMP6_SAVED_TRAP_ID_SIZE , 4
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.set TTMP6_SAVED_TRAP_ID_MASK , (((1 << TTMP6_SAVED_TRAP_ID_SIZE) - 1) << TTMP6_SAVED_TRAP_ID_SHIFT)
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.set TTMP6_SAVED_TRAP_ID_BFE , (TTMP6_SAVED_TRAP_ID_SHIFT | (TTMP6_SAVED_TRAP_ID_SIZE << 16))
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.set TTMP11_PC_HI_SHIFT , 7
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.set TTMP11_DEBUG_ENABLED_SHIFT , 23
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.set TTMP_PC_HI_SHIFT , 7
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.set TTMP_DEBUG_ENABLED_SHIFT , 23
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.if .amdgcn.gfx_generation_number == 9
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.set TTMP11_SAVE_RCNT_FIRST_REPLAY_SHIFT , 26
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.set TTMP_SAVE_RCNT_FIRST_REPLAY_SHIFT , 26
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.set SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT , 15
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.set SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK , 0x1F8000
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.elseif .amdgcn.gfx_generation_number == 10 && .amdgcn.gfx_generation_minor < 3
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.set TTMP11_SAVE_REPLAY_W64H_SHIFT , 31
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.set TTMP11_SAVE_RCNT_FIRST_REPLAY_SHIFT , 24
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.set TTMP_SAVE_REPLAY_W64H_SHIFT , 31
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.set TTMP_SAVE_RCNT_FIRST_REPLAY_SHIFT , 24
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.set SQ_WAVE_IB_STS_REPLAY_W64H_SHIFT , 25
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.set SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT , 15
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.set SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK , 0x3F8000
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.set SQ_WAVE_IB_STS_REPLAY_W64H_MASK , 0x2000000
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.endif
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.if .amdgcn.gfx_generation_number == 9 && .amdgcn.gfx_generation_minor >= 4
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.set TTMP11_TTMPS_SETUP_SHIFT , 31
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.endif
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// ABI between first and second level trap handler:
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// ttmp0 = PC[31:0]
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// ttmp12 = SQ_WAVE_STATUS
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@@ -94,7 +99,10 @@
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// ttmp15 = TMA[63:32]
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// gfx9:
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// ttmp1 = 0[2:0], PCRewind[3:0], HostTrap[0], TrapId[7:0], PC[47:32]
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// gfx906/gfx908/gfx90a:
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// ttmp11 = SQ_WAVE_IB_STS[20:15], 0[1:0], DebugEnabled[0], 0[15:0], NoScratch[0], WaveIdInWG[5:0]
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// gfx940:
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// ttmp13 = SQ_WAVE_IB_STS[20:15], 0[1:0], DebugEnabled[0], 0[22:0]
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// gfx10:
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// ttmp1 = 0[0], PCRewind[5:0], HostTrap[0], TrapId[7:0], PC[47:32]
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// gfx1010:
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@@ -117,7 +125,11 @@ trap_entry:
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// If llvm.debugtrap and debugger is not attached.
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s_cmp_eq_u32 ttmp2, TRAP_ID_DEBUGTRAP
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s_cbranch_scc0 .no_skip_debugtrap
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s_bitcmp0_b32 ttmp11, TTMP11_DEBUG_ENABLED_SHIFT
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.if (.amdgcn.gfx_generation_number == 9 && .amdgcn.gfx_generation_minor < 4) || .amdgcn.gfx_generation_number == 10
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s_bitcmp0_b32 ttmp11, TTMP_DEBUG_ENABLED_SHIFT
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.else
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s_bitcmp0_b32 ttmp13, TTMP_DEBUG_ENABLED_SHIFT
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.endif
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s_cbranch_scc0 .no_skip_debugtrap
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// Ignore llvm.debugtrap.
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@@ -212,26 +224,18 @@ trap_entry:
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//
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// ttmp7: pc_lo[31:0]
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// ttmp11: 1st_level_ttmp11[31:23] pc_hi[15:0] 1st_level_ttmp11[6:0]
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.if ((.amdgcn.gfx_generation_number == 10 && .amdgcn.gfx_generation_minor >= 3) || .amdgcn.gfx_generation_number > 10)
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s_branch .halt_wave
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.else
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.if (.amdgcn.gfx_generation_number == 9 && .amdgcn.gfx_generation_minor < 4) || (.amdgcn.gfx_generation_number == 10 && .amdgcn.gfx_generation_minor < 3)
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// Save the PC
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s_mov_b32 ttmp7, ttmp0
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s_and_b32 ttmp1, ttmp1, SQ_WAVE_PC_HI_ADDRESS_MASK
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s_lshl_b32 ttmp1, ttmp1, TTMP11_PC_HI_SHIFT
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s_andn2_b32 ttmp11, ttmp11, (SQ_WAVE_PC_HI_ADDRESS_MASK << TTMP11_PC_HI_SHIFT)
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s_lshl_b32 ttmp1, ttmp1, TTMP_PC_HI_SHIFT
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s_andn2_b32 ttmp11, ttmp11, (SQ_WAVE_PC_HI_ADDRESS_MASK << TTMP_PC_HI_SHIFT)
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s_or_b32 ttmp11, ttmp11, ttmp1
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// Park the wave
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s_getpc_b64 [ttmp0, ttmp1]
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s_add_u32 ttmp0, ttmp0, .parked - .
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s_addc_u32 ttmp1, ttmp1, 0x0
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s_branch .halt_wave
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.parked:
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s_trap 0x2
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s_branch .parked
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.endif
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.halt_wave:
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@@ -239,17 +243,29 @@ trap_entry:
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s_bitset1_b32 ttmp6, TTMP6_WAVE_STOPPED_SHIFT
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s_bitset1_b32 ttmp12, SQ_WAVE_STATUS_HALT_SHIFT
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.if (.amdgcn.gfx_generation_number == 9 && .amdgcn.gfx_generation_minor >= 4)
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s_bitcmp1_b32 ttmp11, TTMP11_TTMPS_SETUP_SHIFT
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s_cbranch_scc1 .ttmps_initialized
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s_mov_b32 ttmp4, 0
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s_mov_b32 ttmp5, 0
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s_bitset1_b32 ttmp11, TTMP11_TTMPS_SETUP_SHIFT
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.ttmps_initialized:
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.endif
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.exit_trap:
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// Restore SQ_WAVE_IB_STS.
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.if .amdgcn.gfx_generation_number == 9
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s_lshr_b32 ttmp2, ttmp11, (TTMP11_SAVE_RCNT_FIRST_REPLAY_SHIFT - SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT)
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.if .amdgcn.gfx_generation_minor < 4
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s_lshr_b32 ttmp2, ttmp11, (TTMP_SAVE_RCNT_FIRST_REPLAY_SHIFT - SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT)
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.else
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s_lshr_b32 ttmp2, ttmp13, (TTMP_SAVE_RCNT_FIRST_REPLAY_SHIFT - SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT)
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.endif
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s_and_b32 ttmp2, ttmp2, SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK
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s_setreg_b32 hwreg(HW_REG_IB_STS), ttmp2
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.endif
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.if .amdgcn.gfx_generation_number == 10 && .amdgcn.gfx_generation_minor < 3
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s_lshr_b32 ttmp2, ttmp11, (TTMP11_SAVE_RCNT_FIRST_REPLAY_SHIFT - SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT)
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.elseif .amdgcn.gfx_generation_number == 10 && .amdgcn.gfx_generation_minor < 3
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s_lshr_b32 ttmp2, ttmp11, (TTMP_SAVE_RCNT_FIRST_REPLAY_SHIFT - SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT)
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s_and_b32 ttmp3, ttmp2, SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK
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s_lshr_b32 ttmp2, ttmp11, (TTMP11_SAVE_REPLAY_W64H_SHIFT - SQ_WAVE_IB_STS_REPLAY_W64H_SHIFT)
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s_lshr_b32 ttmp2, ttmp11, (TTMP_SAVE_REPLAY_W64H_SHIFT - SQ_WAVE_IB_STS_REPLAY_W64H_SHIFT)
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s_and_b32 ttmp2, ttmp2, SQ_WAVE_IB_STS_REPLAY_W64H_MASK
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s_or_b32 ttmp2, ttmp2, ttmp3
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s_setreg_b32 hwreg(HW_REG_IB_STS), ttmp2
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@@ -262,3 +278,7 @@ trap_entry:
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// Return to original (possibly modified) PC.
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s_rfe_b64 [ttmp0, ttmp1]
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.parked:
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s_trap 0x2
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s_branch .parked
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@@ -80,7 +80,8 @@ __attribute__((noinline)) static void _loader_debug_state() {
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// 5: New trap handler ABI. Save the PC in ttmp11[22:7] ttmp6[31:0], and park the wave if stopped
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// 6: New trap handler ABI. ttmp6[25:0] contains dispatch index modulo queue size
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// 7: New trap handler ABI. Send interrupts as a bitmask, coalescing concurrent exceptions.
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HSA_API r_debug _amdgpu_r_debug = {7,
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// 8: New trap handler ABI for gfx940: Initialize ttmp[4:5] if ttmp11[31] == 0.
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HSA_API r_debug _amdgpu_r_debug = {8,
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nullptr,
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reinterpret_cast<uintptr_t>(&_loader_debug_state),
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r_debug::RT_CONSISTENT,
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