Update the trap handler for gfx940

gfx940 uses ttmp11 to hold the queue packet index so the first level
trap handler uses ttmp13 instead to save ib_sts.

Repurpose ttmp11[31] to mean that the ttmps are initialized. The issue
was that the debugger could not tell whether ttmp6 was written by the
trap handler when determining the stop reason.

If ttmp11[31]=0, then the trap handler has not been executed and ttmp6
should be assumed to be 0.  If ttmp11[31]=1, then ttmp6 holds the
trap_id, if an s_trap instruction caused the exception.

Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Signed-off-by: Lancelot Six <lancelot.six@amd.com>

Change-Id: I9af903abae044b9ec530306229caf3b883f3ee46


[ROCm/ROCR-Runtime commit: f31b312611]

projects/rocr-runtime/runtime/hsa-runtime/loader/executable.cpp

@@ -80,7 +80,8 @@ __attribute__((noinline)) static void _loader_debug_state() {
 // 5: New trap handler ABI. Save the PC in ttmp11[22:7] ttmp6[31:0], and park the wave if stopped
 // 6: New trap handler ABI. ttmp6[25:0] contains dispatch index modulo queue size
 // 7: New trap handler ABI. Send interrupts as a bitmask, coalescing concurrent exceptions.
-HSA_API r_debug _amdgpu_r_debug = {7,
+// 8: New trap handler ABI for gfx940: Initialize ttmp[4:5] if ttmp11[31] == 0.
+HSA_API r_debug _amdgpu_r_debug = {8,
                            nullptr,
                            reinterpret_cast<uintptr_t>(&_loader_debug_state),
                            r_debug::RT_CONSISTENT,