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Kods Problēmas Izmaiņu pieprasījumi Darbības Pakotnes Projekti Laidieni Vikivietne Aktivitāte

kfdtest: Remove SP3/IsaGen

Pārlūkot izejas kodu 
- Remove SP3 lib directory
- Remove IsaGenerator* files
- Update CMakeLists accordingly

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I280161b0b238839ab318c18d6038cdd64fa66208


[ROCm/ROCR-Runtime commit: e6e498abf3]
Šī revīzija ir iekļauta:
Graham Sider
2021-10-08 14:50:04 -04:00
revīziju iesūtīja Harish Kasiviswanathan
vecāks d31d1ca19a
revīzija 36ee679ca3
18 mainīti faili ar 1 papildinājumiem un 1861 dzēšanām
Lejupielādēt ielāpa failu Lejupielādēt izmaiņu failu Izvērst visus failus Savērst visus failus
projects/rocr-runtime/tests/kfdtest/CMakeLists.txt
+1 -11
Parādīt failu
@@ -128,12 +128,9 @@ add_definitions(${LLVM_DEFINITIONS_LIST})
llvm_map_components_to_libnames(llvm_libs AMDGPUAsmParser Core Support)
set ( SP3_DIR ${PROJECT_SOURCE_DIR}/sp3 )
include_directories(${PROJECT_SOURCE_DIR}/gtest-1.6.0)
include_directories(${PROJECT_SOURCE_DIR}/include)
include_directories(${PROJECT_SOURCE_DIR}/../../include)
include_directories(${SP3_DIR})
include_directories(${DRM_INCLUDE_DIRS})
@@ -147,12 +144,6 @@ set (SRC_FILES gtest-1.6.0/gtest-all.cpp
src/IndirectBuffer.cpp
src/Assemble.cpp
src/ShaderStore.cpp
src/IsaGenerator.cpp
src/IsaGenerator_Aldebaran.cpp
src/IsaGenerator_Gfx10.cpp
src/IsaGenerator_Gfx72.cpp
src/IsaGenerator_Gfx8.cpp
src/IsaGenerator_Gfx9.cpp
src/LinuxOSWrapper.cpp
src/PM4Packet.cpp
src/PM4Queue.cpp
@@ -216,11 +207,10 @@ endif ()
# The modules found by pkg_check_modules() in the default pkg config
# path do not need to use link_directories() here.
link_directories(${HSAKMT_LIBRARY_DIRS})
link_directories(${SP3_DIR})
add_executable(kfdtest ${SRC_FILES})
target_link_libraries(kfdtest ${HSAKMT_LIBRARIES} ${DRM_LDFLAGS} ${DRM_AMDGPU_LDFLAGS} ${llvm_libs} pthread m stdc++ rt amdsp3 numa)
target_link_libraries(kfdtest ${HSAKMT_LIBRARIES} ${DRM_LDFLAGS} ${DRM_AMDGPU_LDFLAGS} ${llvm_libs} pthread m stdc++ rt numa)
configure_file ( scripts/kfdtest.exclude kfdtest.exclude COPYONLY )
configure_file ( scripts/run_kfdtest.sh run_kfdtest.sh COPYONLY )
projects/rocr-runtime/tests/kfdtest/sp3/README.txt
-6
Parādīt failu
@@ -1,6 +0,0 @@
Note: This folder is primarily intended for AMD internal developers.
The folder lib_helper contains the script to generate SP3 library libamdsp3.a
and the associated header files in the current folder for kfdtest to use.
cmake is required for the script to run. Just run ./build_sp3.sh after setting
up the environment variables (source build/envsetup.sh).
projects/rocr-runtime/tests/kfdtest/sp3/lib_helper/AMD_opensource_license.txt
-23
Parādīt failu
@@ -1,23 +0,0 @@
/*
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
projects/rocr-runtime/tests/kfdtest/sp3/lib_helper/CMakeLists_sp3.txt
-79
Parādīt failu
@@ -1,79 +0,0 @@
#
# Copyright (C) 2018 Advanced Micro Devices, Inc. All Rights Reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
# OTHER DEALINGS IN THE SOFTWARE.
#
#
cmake_minimum_required(VERSION 2.8 FATAL_ERROR)
project(amdsp3)
#set ( CMAKE_VERBOSE_MAKEFILE on )
find_package(PkgConfig)
set ( P4_PATH $ENV{WORK_ROOT}/p4/driver/drivers )
set ( SCLIB_SRC ${PROJECT_SOURCE_DIR} )
#if( DEFINED ENV{SCLIB_SRC} )
# set ( SCLIB_SRC $ENV{SCLIB_SRC} )
#else()
# set ( SCLIB_SRC ${P4_PATH}/sc/Chip )
#endif()
include_directories(${SCLIB_SRC}/sp3)
#include_directories(${SCLIB_SRC}/sp3/release_headers)
include_directories(${SCLIB_SRC}/sp3/gen)
set ( SRC_FILES ${SRC_FILES} ${SCLIB_SRC}/sp3/sp3-asic.c )
set ( SRC_FILES ${SRC_FILES} ${SCLIB_SRC}/sp3/sp3-dispatch.c )
set ( SRC_FILES ${SRC_FILES} ${SCLIB_SRC}/sp3/sp3-eval.c )
set ( SRC_FILES ${SRC_FILES} ${SCLIB_SRC}/sp3/sp3-gc.c )
set ( SRC_FILES ${SRC_FILES} ${SCLIB_SRC}/sp3/sp3-int.c )
set ( SRC_FILES ${SRC_FILES} ${SCLIB_SRC}/sp3/sp3-lib.c )
set ( SRC_FILES ${SRC_FILES} ${SCLIB_SRC}/sp3/sp3-native.c )
set ( SRC_FILES ${SRC_FILES} ${SCLIB_SRC}/sp3/sp3-cipher.c )
set ( SRC_FILES ${SRC_FILES} ${SCLIB_SRC}/sp3/sp3-vm.c )
aux_source_directory(${SCLIB_SRC}/sp3/gen SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/si/lib SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/ci/lib SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/gfx8/lib SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/gfx81/lib SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/gfx9/lib SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/gfx10/lib SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/aldbrn/lib SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/gfx81/arch SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/gfx9/arch SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/gfx10/arch SRC_FILES)
aux_source_directory(${SCLIB_SRC}/sp3/backend/aldbrn/arch SRC_FILES)
message( STATUS "PROJECT_SOURCE_DIR:" ${PROJECT_SOURCE_DIR} )
#message( STATUS "SRC_FILES: ")
#foreach(file ${SRC_FILES})
# message(STATUS "${file}")
#endforeach()
set ( CMAKE_C_FLAGS "-DSP3_STATIC_LIB -Wno-error -DPUBLIC_RELEASE -DLITTLEENDIAN_CPU -fPIC -DGFX101_BUILD -DALDBRN_BUILD" )
add_library(amdsp3 ${SRC_FILES})
projects/rocr-runtime/tests/kfdtest/sp3/lib_helper/build_sp3.sh
-57
Parādīt failu
@@ -1,57 +0,0 @@
#
# Copyright (C) 2018 Advanced Micro Devices, Inc. All Rights Reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
# OTHER DEALINGS IN THE SOFTWARE.
#
#
#!/bin/bash
if [ "$KFDTEST_ROOT" == "" ] || [ "$P4_ROOT" == "" ]; then
echo "Environment variables should be set before running this script"
exit 1
fi
cd $KFDTEST_ROOT/sp3/lib_helper
SP3_PROJECT=$P4_ROOT/driver/drivers/sc/Chip/
LIB_OUTPUT=$KFDTEST_ROOT/sp3/
cp CMakeLists_sp3.txt $SP3_PROJECT/CMakeLists.txt
mkdir -p build
echo "Building SP3 lib"
pushd build
cmake $SP3_PROJECT/
make
popd
rsync --progress -a build/libamdsp3.a $LIB_OUTPUT
# Put the intermediate header files in the current folder for further processing
rsync --progress -a $SP3_PROJECT/sp3/public/lib/sp3.h .
# Remove the build folder and CMakeLists.txt put into SP source folder
rm -r build
rm $SP3_PROJECT/CMakeLists.txt
# Replace the license statement in the header files
{ cat AMD_opensource_license.txt; sed -e '1,/#ifndef/ { /#ifndef/b; d }' sp3.h; } > $LIB_OUTPUT/sp3.h
# Delete the intermediate header files
rm sp3.h
projects/rocr-runtime/tests/kfdtest/sp3/sp3.h
-643
Parādīt failu
@@ -1,643 +0,0 @@
/*
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __SP3_H__
#define __SP3_H__
#ifdef __cplusplus
extern "C" {
#endif
/// @file sp3.h
/// @brief sp3 API
#include <stdint.h>
// Export tags
#define SP3_EXPORT
/// @defgroup sp3main SP3 Main API
///
/// Main API to assemble and disassemble SP3 shaders.
///
/// @{
/// Valid shader stages.
enum sp3_shtype {
SP3_SHTYPE_NONE = -1,
SP3_SHTYPE_PS = 0,
SP3_SHTYPE_VS = 1,
SP3_SHTYPE_GS = 2,
SP3_SHTYPE_ES = 3,
SP3_SHTYPE_HS = 4,
SP3_SHTYPE_LS = 5,
SP3_SHTYPE_CS = 6,
#ifdef NAVI10LITE_BUILD
SP3_SHTYPE_ACV = 7,
#endif
};
/// Assorted constants used by sp3 API.
enum sp3_count {
SP3_NUM_MRT = 8, ///< Maximum number of render targets supported.
SP3_NUM_STRM = 4, ///< Maximum number of streams supported.
};
/// Disassembly flags. Bitwise-OR flags to set options.
enum sp3_flag {
SP3DIS_NO_STATE = 0x01, ///< Do not include state header at top of shader.
SP3DIS_NO_BINARY = 0x02, ///< Do not include comments with raw binary microcode.
SP3DIS_COMMENTS = 0x04, ///< Do not include comments.
SP3DIS_NO_GPR_COUNT = 0x08, ///< Do not include GPR allocation counts.
SP3DIS_FORCEVALID = 0x10, ///< Force all bytes of microcode to be disassembled.
SP3DIS_NO_ASIC = 0x20, ///< Do not emit the asic header at top of shader.
};
/// Shader context. Contains no user-visible fields.
struct sp3_context;
/// Memory object. Contains no user-visible fields.
struct sp3_vma;
/// VM addresses are 64-bit and the address unit is 32 bits
typedef uint64_t sp3_vmaddr;
/// Storage entry for register streams.
struct sp3_reg {
uint32_t index; ///< One of the MM aperture register addresses.
uint32_t value; ///< 32-bit register data.
};
/// Bits for a single instruction.
struct sp3_inst_bits {
uint32_t val[5]; ///< Largest single instruction in any backend is 5 dwords.
};
/// Wrapped shader metadata.
///
/// After generation, shaders are encapsulated in sp3_shader structures.
///
/// Those structures contain the shader binary, its register stream, constants and constant
/// buffers and metadata needed for SC compatibility.
///
struct sp3_shader {
enum sp3_shtype type; ///< One of the SHTYPE_* constants.
uint32_t asic_int; ///< Internal ASIC index. Do not use.
char asic[0x100]; ///< ASIC name as a string ("RV870" etc).
uint32_t size; ///< Size of the compiled shader, in 32-bit words.
uint32_t nsgprs; ///< Number of scalar GPRs used.
uint32_t nvgprs; ///< Number of vector GPRs used.
uint32_t nsvgprs; ///< Number of shared vector GPRs used (only available in certain projects).
uint32_t naccvgprs; ///< Number of accumulator vector GPRs used (only available in certain projects).
uint32_t nsgprs_manual_alloc;
uint32_t nvgprs_manual_alloc;
uint32_t nsvgprs_manual_alloc;
uint32_t naccvgprs_manual_alloc;
uint32_t trap_present;
uint32_t user_sgpr_count;
uint32_t scratch_en;
uint32_t dispatch_draw_en;
uint32_t so_en;
uint32_t so_base0_en;
uint32_t so_base1_en;
uint32_t so_base2_en;
uint32_t so_base3_en;
uint32_t oc_lds_en;
uint32_t tg_size_en;
uint32_t tidig_comp_cnt; ///< Number of components(-1) enabled for thread id in group
uint32_t tgid_x_en;
uint32_t tgid_y_en;
uint32_t tgid_z_en;
uint32_t wave_cnt_en;
uint32_t primgen_en;
uint32_t pc_base_en;
uint32_t sgpr_scratch;
uint32_t sgpr_psvs_state;
uint32_t sgpr_gs2vs_offset;
uint32_t sgpr_so_write_index;
uint32_t sgpr_so_base_offset0;
uint32_t sgpr_so_base_offset1;
uint32_t sgpr_so_base_offset2;
uint32_t sgpr_so_base_offset3;
uint32_t sgpr_offchip_lds;
uint32_t sgpr_is_offchip;
uint32_t sgpr_ring_offset;
uint32_t sgpr_gs_wave_id;
uint32_t sgpr_global_wave_id;
uint32_t sgpr_tg_size;
uint32_t sgpr_tgid_x;
uint32_t sgpr_tgid_y;
uint32_t sgpr_tgid_z;
uint32_t sgpr_tf_base;
uint32_t sgpr_pc_base;
uint32_t sgpr_wave_cnt;
uint32_t wave_size; ///< Number of threads in a wavefront (only certain ASICs; 0 = don't care).
uint32_t pc_exports; ///< Range of parameters exported (if VS).
uint32_t pos_export; ///< Shader executes a position export (if VS).
uint32_t cb_exports; ///< Range of MRTs exported (if PS).
uint32_t mrtz_export_format;///< Export format of the mrtz export.
uint32_t z_export; ///< Shader executes a Z export (if PS).
uint32_t pops_en; ///< Shader is POPS (PS)
uint32_t pops_num_samples; ///< (PS)
uint32_t load_collision_waveid; ///< Shader sets load collision waveid (if PS).
uint32_t load_intrawave_collision; ///< Shader is in intrawave mode (if PS).
uint32_t stencil_test_export; ///< Shader exports stencil (if PS).
uint32_t stencil_op_export; ///< Shader exports stencil (if PS).
uint32_t kill_used; ///< Shader executes ALU KILL operations.
uint32_t cb_masks[SP3_NUM_MRT]; ///< Component masks for each MRT exported (if PS).
uint32_t emit_used; ///< EMIT opcodes used (if GS).
uint32_t covmask_export; ///< Shader exports coverage mask (if PS).
uint32_t mask_export; ///< Shader exports mask (if PS).
uint32_t strm_used[SP3_NUM_STRM]; ///< Streamout operations used (map).
uint32_t scratch_used; ///< Scratch SMX exports used.
uint32_t scratch_itemsize; ///< Scratch ring item size.
uint32_t reduction_used; ///< Reduction SMX exports used.
uint32_t ring_used; ///< ESGS/GSVS ring SMX exports used.
uint32_t ring_itemsize; ///< ESGS/GSVS ring item size (for ES/GS respectively).
uint32_t vertex_size[4]; ///< GSVS ring vertex size (for GS).
uint32_t mem_used; ///< Raw memory SMX exports used.
uint32_t rats_used; ///< Mask of RATs (UAVs) used
uint32_t group_size[3]; ///< Wavefront group size (for ELF files).
uint32_t alloc_lds; ///< Number of LDS bytes allocated for wave group. (translates to lds_size in CS and LS)
uint32_t *data; ///< Shader binary data.
uint32_t nregs; ///< Number of register writes in the stream.
uint64_t crc64; ///< CRC64 of compiled shader, may be used for identification/fingerprinting.
uint32_t crc32; ///< 32-bit CRC of compiled shader (based on crc64), may be used for identification/fingerprinting.
struct sp3_reg *regs; ///< Register writes (index-value pairs).
struct sp3_shader *merged_2nd_shader; ///< Merged es/gs, ls/hs shader, this points to start of the second shader (only certain ASICs).
};
/// Comment callback.
typedef const char *(*sp3_comment_cb)(void *, int);
/// Get version of the sp3 library.
///
/// @return String containing the version number.
///
SP3_EXPORT const char *sp3_version(void);
/// Create a new sp3 context.
///
/// @return A new context for use in assembling and disassembling shaders. Free with sp3_close().
///
SP3_EXPORT struct sp3_context *sp3_new(void);
/// Set option for sp3.
///
/// @param state sp3 context.
/// @param option Option name. Unknown options will raise an error.
/// @param value Option value. NULL is used to represent value-less options.
///
/// Currently supported options:
///
/// stdlib (string) -- absolute path to standard library files. May be a colon-separated list
/// of paths that will be used to search for stdlib files. Used by sp3_parse_library().
///
/// The following options are deprecated because they take integer arguments; you should use
/// sp3_set_option_int() for these settings going forward. They will continue to be accepted by
/// this API to support legacy users.
///
/// Werror (boolean) -- indicates whether warnings should be treated as errors.
///
/// wave_size (integer) -- sets the wave size being used by the draw calls that will be using
/// this shader. Ignored in certain ASICs. You may set this to 32, 64 or the special value 0
/// to indicate no preference on wave size. The shader will be checked to ensure it is
/// compatible with the size specified here.
///
/// omit_version (boolean) -- omit generation of the S_VERSION opcode.
///
/// omit_code_end (boolean) -- omit generation of the S_CODE_END footer.
///
/// allow_raw_bits (boolean) -- allow use of the raw_bits() function in sp3 shaders. This is a
/// dangerous option to allow in general so you must explicitly enable this option, otherwise
/// the raw_bits() function will always error out.
///
SP3_EXPORT void sp3_set_option(
struct sp3_context *state,
const char *option,
const char *value);
/// Set option for sp3.
///
/// @param state sp3 context.
/// @param option Option name. Unknown options will raise an error.
/// @param value Option value.
///
/// Currently supported options:
///
/// Werror (boolean) -- indicates whether warnings should be treated as errors.
///
/// wave_size (integer) -- sets the wave size being used by the draw calls that will be using
/// this shader. Ignored in certain ASICs. You may set this to 32, 64 or the special value 0
/// to indicate no preference on wave size. The shader will be checked to ensure it is
/// compatible with the size specified here.
///
/// omit_version (boolean) -- omit generation of the S_VERSION opcode.
///
/// omit_code_end (boolean) -- omit generation of the S_CODE_END footer.
///
/// allow_raw_bits (boolean) -- allow use of the raw_bits() function in sp3 shaders. This is a
/// dangerous option to allow in general so you must explicitly enable this option, otherwise
/// the raw_bits() function will always error out.
///
/// secure_mode (boolean) -- run in secure mode. Disables macro language features in assembly
/// path including calls to custom functions. Useful if sp3 is used as a backend to a web-based
/// assembly tool.
///
/// debug_encoding (boolean) -- if true, debug encoding selection logic for assembly. Only
/// supported in 10.4+ backends.
///
/// no_vs_export_check (boolean) -- if true, disable VS export sanity check. Only supported in
/// 10.4+ backends.
///
SP3_EXPORT void sp3_set_option_int(
struct sp3_context *state,
const char *option,
int32_t value);
/// Parse a file into a context.
///
/// Use sp3_compile to generate binary microcode after the shader is parsed.
///
/// @param state Context to use for parsing.
/// @param file File to read. If NULL, parse from stdin.
///
SP3_EXPORT void sp3_parse_file(struct sp3_context *state, const char *file);
/// Parse a string into a context.
///
/// Use sp3_compile to generate binary microcode after the shader is parsed.
///
/// @param state Context to use for parsing.
/// @param string String to parse.
///
SP3_EXPORT void sp3_parse_string(struct sp3_context *state, const char *string);
/// Parse a file from the standard library into a context.
///
/// Use sp3_compile to generate binary microcode after the shader is parsed.
///
/// @param state Context to use for parsing.
/// @param name Path to the standard library; files in this directory are parsed.
///
SP3_EXPORT void sp3_parse_library(struct sp3_context *state, const char *name);
/// Call a sp3 function.
///
SP3_EXPORT void sp3_call(struct sp3_context *state, const char *func);
/// Compile a shader program that has been parsed into the context.
///
/// @param state sp3 context.
/// @param cffunc Name of clause to call. By convention, this is "main".
/// @return A compiled and linked shader. Free memory with sp3_free_shader().
///
SP3_EXPORT struct sp3_shader *sp3_compile(
struct sp3_context *state,
const char *cffunc);
/// Free a sp3_shader.
///
/// @param sh Shader object to delete.
///
SP3_EXPORT void sp3_free_shader(struct sp3_shader *sh);
/// Get current ASIC name set for a context.
///
/// @param state Context to query.
/// @return Name of ASIC.
///
SP3_EXPORT const char *sp3_getasic(struct sp3_context *state);
/// Set current ASIC name for a context.
///
/// @param state Context to modify.
/// @param chip Case-insensitive string representing the ASIC to compile or disassemble for.
///
SP3_EXPORT void sp3_setasic(struct sp3_context *state, const char *chip);
/// Set global variable in context to an integer.
///
SP3_EXPORT void sp3_set_param_int(
struct sp3_context *state,
const char *name,
int32_t value);
/// Set global variable in context to an integer vector.
///
SP3_EXPORT void sp3_set_param_intvec(
struct sp3_context *state,
const char *name,
uint32_t size,
const int32_t *value);
/// Set global variable in context to a float.
///
SP3_EXPORT void sp3_set_param_float(
struct sp3_context *state,
const char *name,
float value);
/// Set global variable in context to a float vector.
///
SP3_EXPORT void sp3_set_param_floatvec(
struct sp3_context *state,
const char *name,
uint32_t size,
const float *value);
/// Set error message header.
///
/// @param state Context to modify.
/// @param str Text to include in error message header.
///
SP3_EXPORT void sp3_set_error_header(struct sp3_context *state, const char *str);
/// Get ASIC metrics for the ASIC in current state.
///
/// Used by ELF tools to fill in some CAL fields.
///
/// @param state Context to query.
/// @param name Name of ASIC metric.
/// @return Value of ASIC metric.
///
SP3_EXPORT int sp3_asicinfo(struct sp3_context *state, const char *name);
/// Free a context allocated by sp3_new/open/parse.
///
/// @param state Context to delete.
///
SP3_EXPORT void sp3_close(struct sp3_context *state);
/// Disassemble a shader.
///
/// This call is likely to change to something that will take a filled sp3_shader structure
/// later on.
///
/// @param state sp3 context (use sp3_new to allocate and sp3_setasic to set ASIC).
/// @param bin Memory map with the opcodes (see sp3-vm.h).
/// @param base Start of the shader in the memory map (in VM entries, i.e. 32-bit words).
/// @param name Same to give the disassembled shader.
/// @param shader_type One of the SHTYPE_* constants.
/// @param include Literal text to include in the CF clause (NULL includes nothing).
/// @param max_len Maximum length of CF clause. Matters if SP3DIS_FORCEVALID is set.
/// @param flags A bitmask of SP3DIS_* flags.
///
/// @return Shader disassembly as a string. Free memory with sp3_free().
///
SP3_EXPORT char *sp3_disasm(
struct sp3_context *state,
struct sp3_vma *bin,
sp3_vmaddr base,
const char *name,
enum sp3_shtype shader_type,
const char *include,
uint32_t max_len,
uint32_t flags);
/// Disassemble a single shader instruction.
///
/// This call is likely to change to something that will take a filled sp3_shader structure
/// later on.
///
/// @param state sp3 context (use sp3_new to allocate and sp3_setasic to set ASIC).
/// @param inst Pointer to dwords containing instruction (exact number of dwords required depends on instruction).
/// @param base Start of the shader in the memory map (in VM entries, i.e. 32-bit words).
/// @param addr Address of the instruction being disassembled (in VM entries, i.e. 32-bit words).
/// @param shader_type One of the SHTYPE_* constants.
/// @param flags A mask of SP3DIS_* flags.
///
/// @return Shader disassembly as a string. Free memory with sp3_free().
///
SP3_EXPORT char *sp3_disasm_inst(
struct sp3_context *state,
const struct sp3_inst_bits *inst,
sp3_vmaddr base,
sp3_vmaddr addr,
enum sp3_shtype shader_type,
uint32_t flags);
/// Parse a register stream.
///
/// Can be called before sp3_disasm to preset things like ALU, boolean and loop constants.
///
/// This call is likely to merge with sp3_disasm later on.
///
/// @param state sp3 context to fill with state.
/// @param nregs Number of register entries.
/// @param regs Register stream to parse.
/// @param shader_type One of the SHTYPE_* constants.
///
SP3_EXPORT void sp3_setregs(
struct sp3_context *state,
uint32_t nregs,
const struct sp3_reg *regs,
enum sp3_shtype shader_type);
/// Set shader comments
///
/// @param state sp3 context.
/// @param map Map of comments (0 for no comment, other values will be passed to the callback).
/// @param f_top Callback returning comment to place above the opcode.
/// @param f_right Callback returning comment to place to the right of the opcode.
/// @param ctx Void pointer to pass to comment callbacks.
///
SP3_EXPORT void sp3_setcomments(
struct sp3_context *state,
struct sp3_vma *map,
sp3_comment_cb f_top,
sp3_comment_cb f_right,
void *ctx);
/// Set alternate shader entry points
///
/// Used for disassembly; this marks an additional location in memory
/// (besides the start address) where shader code may be found. Generally
/// required for jump tables and any case where the shader may perform
/// indirect jumps to ensure that disassembly locates all shader
/// instructions.
///
/// @param state sp3 context (use sp3_new to allocate and sp3_setasic to set ASIC).
/// @param addr Address of the instruction being disassembled (in VM entries, i.e. 32-bit words).
///
SP3_EXPORT void sp3_setentrypoint(
struct sp3_context *state,
sp3_vmaddr addr);
/// Clear alternate shader entry points.
///
/// Clear all entry points previously set with sp3_setentrypoint.
///
/// @param state sp3 context (use sp3_new to allocate and sp3_setasic to set ASIC).
///
SP3_EXPORT void sp3_clearentrypoints(struct sp3_context *state);
/// Free memory allocated by sp3.
///
/// Windows DLLs that allocate memory have to free it. This function
/// should be used to free the result of sp3_disasm, sp3_compile etc.
///
SP3_EXPORT void sp3_free(void *ptr);
/// SP3 API to merge two shaders given file names as input.
///
SP3_EXPORT struct sp3_shader* sp3_merge_shaders(
struct sp3_context *pointer,
const char *first_file,
const char *second_file);
/// SP3 API to merge two shaders given shader strings as input.
///
SP3_EXPORT struct sp3_shader* sp3_merge_shader_strings(
struct sp3_context *pointer,
const char *first_string,
const char *second_string);
/// @}
/// @defgroup sp3vm SP3 Memory Objects
///
/// The VM API is used to manage virtual memory maps. Those maps are used for binary storage
/// for disassembly, as they can naturally mirror the GPU's memory map (so no register
/// translation is needed).
///
/// @{
/// Callback function that will fill a VMA on demand
///
/// The VMA to be filled will be specified through the request address.
/// The callback should fill the VMA using sp3_vm_write calls.
///
typedef void (* sp3_vmfill)(struct sp3_vma *vm, sp3_vmaddr addr, void *ctx);
/// Create a new VM that is empty.
///
/// Free the object with sp3_vm_free().
///
/// @return New VM object.
///
SP3_EXPORT
struct sp3_vma *sp3_vm_new(void);
/// Create a new VM that has a sp3_vmfill callback.
///
/// Free the object with sp3_vm_free().
///
/// @param fill Function used to populate data in VM. The function will be pass the new VM object, the address and a context.
/// @param ctx User-specified context. Passed to the fill function and not used by sp3 itself.
/// @return New VM object.
///
SP3_EXPORT
struct sp3_vma *sp3_vm_new_fill(sp3_vmfill fill, void *ctx);
/// Create a new VM from an array of words.
///
/// Free the object with sp3_vm_free().
///
/// @param base VM address to load array at.
/// @param len Number of 32-bit words in the array.
/// @param data Pointer to the array.
/// @return New VM object.
///
SP3_EXPORT
struct sp3_vma *sp3_vm_new_ptr(sp3_vmaddr base, sp3_vmaddr len, const uint32_t *data);
/// Find a VMA, optionally adding it.
///
/// @param vm VM to search in.
/// @param addr Address to search for.
/// @param add Flag indicating whether a failure should result in adding a new VMA.
/// @return VM object matching the specified address.
///
SP3_EXPORT
struct sp3_vma *sp3_vm_find(struct sp3_vma *vm, sp3_vmaddr addr, uint32_t add);
/// Write a word to a VM.
///
/// @param vm VM to write.
/// @param addr Address to write.
/// @param val 32-bits of data to write.
///
SP3_EXPORT
void sp3_vm_write(struct sp3_vma *vm, sp3_vmaddr addr, uint32_t val);
/// Read a word from a VM.
///
/// @param vm VM to read.
/// @param addr Address to read.
/// @return 32-bits of data at specified address.
///
SP3_EXPORT
uint32_t sp3_vm_read(struct sp3_vma *vm, sp3_vmaddr addr);
/// Probe VM for presence.
///
/// @param vm VM to probe.
/// @param addr Address to search for.
/// @return 1 if the specified address is backed in the VM, 0 otherwise.
///
SP3_EXPORT
int sp3_vm_present(struct sp3_vma *vm, sp3_vmaddr addr);
/// Return base address of VM.
///
/// @param vm VM to query.
/// @return Base address.
///
SP3_EXPORT
sp3_vmaddr sp3_vm_base(struct sp3_vma *vm);
/// Return next VM.
///
/// @param vm VM to query.
/// @return Next VM in list.
///
SP3_EXPORT
struct sp3_vma *sp3_vm_next(struct sp3_vma *vm);
/// Free a VM and all its storage.
///
/// Use this function to free memory allocated by sp3_vm_new, sp3_vm_new_fill and
/// sp3_vm_new_ptr.
///
/// @param vm VM to free.
///
SP3_EXPORT
void sp3_vm_free(struct sp3_vma *vm);
/// @}
#ifdef __cplusplus
}
#endif
#endif /* __SP3_H__ */
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator.cpp
-126
Parādīt failu
@@ -1,126 +0,0 @@
/*
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "IsaGenerator.hpp"
#include <algorithm>
#include <string>
#include "IsaGenerator_Gfx72.hpp"
#include "IsaGenerator_Gfx8.hpp"
#include "IsaGenerator_Gfx9.hpp"
#include "IsaGenerator_Gfx10.hpp"
#include "IsaGenerator_Aldebaran.hpp"
#include "GoogleTestExtension.hpp"
#include "sp3.h"
const std::string IsaGenerator::ADDRESS_WATCH_SP3(
"var REG_TRAPSTS_EXCP_MASK = 0x000001ff\n"
"var WAVE_COUNT_OFFSET = 12\n"
"var TMA_CYCLE_OFFSET = 16\n"
"\n"
"/*\n"
" * ttmp[0:1] -- The ISA address that triggered this trap handler\n"
" * ttmp[10:11] -- The TMA user provided, used to store the debug info in this shader\n"
" * v[10:14] ttmp[7:8] -- temp use inside this shader\n"
" * s5 -- store the counts that this trap been triggered\n"
" * Each time when the trap is triggered , this shader will write\n"
" * ttmp[0] : ttmp[1] : Trap_Status : [reserved]\n"
" * to TMA + (trap count * TMA_CYCLE_OFFSET)\n"
" * The TMA + WAVE_COUNT_OFFSET(the first [reserved] address)\n"
" * used to store the total triggered trap count.\n"
" */\n"
"shader main\n"
"\n"
" asic(VI)\n"
"\n"
" type(CS)\n"
" v_mov_b32 v10, ttmp10\n"
" v_mov_b32 v11, ttmp11\n"
" s_mov_b32 ttmp7, s5\n"
" s_mulk_i32 ttmp7, TMA_CYCLE_OFFSET\n"
" s_addk_i32 s5, 1\n"
" v_mov_b32 v12, ttmp0\n"
" v_add_u32 v10, vcc, ttmp7, v10\n"
" flat_store_dword v[10,11], v12 slc glc\n"
" v_mov_b32 v12, ttmp1\n"
" v_add_u32 v10, vcc, 4, v10\n"
" flat_store_dword v[10,11], v12 slc glc\n"
" s_getreg_b32 ttmp8, hwreg(HW_REG_TRAPSTS)\n"
" s_and_b32 ttmp8, ttmp8, REG_TRAPSTS_EXCP_MASK\n"
" v_mov_b32 v12, ttmp8\n"
" v_add_u32 v10, vcc, 4, v10\n"
" flat_store_dword v[10,11], v12 glc\n"
" v_mov_b32 v10, ttmp10\n"
" v_add_u32 v10, vcc, WAVE_COUNT_OFFSET, v10\n"
" v_mov_b32 v13, 1\n"
" flat_atomic_add v14, v[10:11], v13 slc glc\n"
" s_and_b32 ttmp1, ttmp1, 0xffff\n"
" s_rfe_b64 [ttmp0,ttmp1]\n"
"end\n"
);
IsaGenerator* IsaGenerator::Create(unsigned int familyId) {
switch (familyId) {
case FAMILY_CI:
case FAMILY_KV:
return new IsaGenerator_Gfx72;
case FAMILY_VI:
case FAMILY_CZ:
return new IsaGenerator_Gfx8;
case FAMILY_AI:
case FAMILY_RV:
case FAMILY_AR:
return new IsaGenerator_Gfx9;
case FAMILY_AL:
return new IsaGenerator_Aldbrn;
case FAMILY_NV:
return new IsaGenerator_Gfx10;
default:
LOG() << "Error: Invalid ISA" << std::endl;
return NULL;
}
}
void IsaGenerator::GetAwTrapHandler(HsaMemoryBuffer& rBuf) {
CompileShader(ADDRESS_WATCH_SP3.c_str(), "main", rBuf);
}
void IsaGenerator::CompileShader(const char* shaderCode, const char* shaderName, HsaMemoryBuffer& rBuf) {
sp3_context* pSp3 = sp3_new();
sp3_setasic(pSp3, GetAsicName().c_str());
sp3_parse_string(pSp3, shaderCode);
sp3_shader* pShader = sp3_compile(pSp3, shaderName);
std::copy(pShader->data, pShader->data + pShader->size, rBuf.As<unsigned int*>());
sp3_free_shader(pShader);
/** Inside this close function, there is an unknown reason of free memory not used by compiler.
* Comment out this as a workaround. System will do the garbage collection after this
* application is closed.
*/
// sp3_close(pSp3);
}
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator.hpp
-52
Parādīt failu
@@ -1,52 +0,0 @@
/*
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef _ISAGENERATOR_H_
#define _ISAGENERATOR_H_
#include "KFDTestUtil.hpp"
/* isa generation class - interface */
class IsaGenerator {
public:
static IsaGenerator* Create(unsigned int familyId);
virtual ~IsaGenerator() {}
virtual void GetNoopIsa(HsaMemoryBuffer& rBuf) = 0;
virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf) = 0;
virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) = 0;
virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf) = 0;
virtual void GetCwsrTrapHandler(HsaMemoryBuffer& rBuf) {}
virtual void GetAwTrapHandler(HsaMemoryBuffer& rBuf);
void CompileShader(const char* shaderCode, const char* shaderName, HsaMemoryBuffer& rBuf);
protected:
virtual const std::string& GetAsicName() = 0;
private:
static const std::string ADDRESS_WATCH_SP3;
};
#endif // _ISAGENERATOR_H_
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator_Aldebaran.cpp
-113
Parādīt failu
@@ -1,113 +0,0 @@
/*
* Copyright (C) 2020 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "IsaGenerator_Aldebaran.hpp"
#include <algorithm>
#include <string>
const std::string IsaGenerator_Aldbrn::ASIC_NAME = "ALDEBARAN";
/* The binaries are generated from following ISA */
#if 0
/* flat_atomic_inc will not support by some PCIE, use flat_atomic_add instead */
shader atomic_add
asic(ALDEBARAN)
type(CS)
v_mov_b32 v0, s0
v_mov_b32 v1, s1
v_mov_b32 v2, 1
flat_atomic_add v3, v[0:1], v2 slc glc scc
s_waitcnt 0
s_endpgm
end
shader copy_dword
asic(ALDEBARAN)
type(CS)
/* copy the parameters from scalar registers to vector registers */
v_mov_b32 v0, s0
v_mov_b32 v1, s1
v_mov_b32 v2, s2
v_mov_b32 v3, s3
/* copy a dword between the passed addresses */
flat_load_dword v4, v[0:1] slc glc
s_waitcnt 0
flat_store_dword v[2:3], v4 slc glc
s_endpgm
end
shader main
asic(ALDEBARAN)
type(CS)
loop:
s_branch loop
s_endpgm
end
#endif
const uint32_t IsaGenerator_Aldbrn::NOOP_ISA[] = {
0xbf810000
};
const uint32_t IsaGenerator_Aldbrn::COPY_DWORD_ISA[] = {
0x7e000200, 0x7e020201,
0x7e040202, 0x7e060203,
0xdc530000, 0x047f0000,
0xbf8c0000, 0xdc730000,
0x007f0402, 0xbf810000
};
const uint32_t IsaGenerator_Aldbrn::INFINITE_LOOP_ISA[] = {
0xbf82ffff, 0xbf810000
};
const uint32_t IsaGenerator_Aldbrn::ATOMIC_ADD_ISA[] = {
0x7e000200, 0x7e020201,
0x7e040281, 0xdf0b0000,
0x037f0200, 0xbf8c0000,
0xbf810000, 0x00000000
};
void IsaGenerator_Aldbrn::GetNoopIsa(HsaMemoryBuffer& rBuf) {
std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Aldbrn::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Aldbrn::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Aldbrn::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
std::copy(ATOMIC_ADD_ISA, ATOMIC_ADD_ISA+ARRAY_SIZE(ATOMIC_ADD_ISA), rBuf.As<uint32_t*>());
}
const std::string& IsaGenerator_Aldbrn::GetAsicName() {
return ASIC_NAME;
}
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator_Aldebaran.hpp
-49
Parādīt failu
@@ -1,49 +0,0 @@
/*
* Copyright (C) 2020 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef _ISAGENERATOR_ALDEBARAN_H_
#define _ISAGENERATOR_ALDEBARAN_H_
#include <string>
#include "IsaGenerator.hpp"
class IsaGenerator_Aldbrn : public IsaGenerator {
public:
virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
protected:
virtual const std::string& GetAsicName();
private:
static const std::string ASIC_NAME;
static const uint32_t NOOP_ISA[];
static const uint32_t COPY_DWORD_ISA[];
static const uint32_t INFINITE_LOOP_ISA[];
static const uint32_t ATOMIC_ADD_ISA[];
};
#endif // _ISAGENERATOR_ALDEBARAN_H_
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator_Gfx10.cpp
-142
Parādīt failu
@@ -1,142 +0,0 @@
/*
* Copyright (C) 2019 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "IsaGenerator_Gfx10.hpp"
#include <algorithm>
#include <string>
/* The binaries are generated from following ISA */
const std::string IsaGenerator_Gfx10::ASIC_NAME = "GFX10";
#if 0
static const char * atomic_add = \
"\
shader atomic_add \n\
asic(GFX10) \n\
wave_size(32) \n\
type(CS) \n\
v_mov_b32 v0, s0 \n\
v_mov_b32 v1, s1 \n\
v_mov_b32 v2, 1 \n\
flat_atomic_add v3, v[0:1], v2 slc glc \n\
s_waitcnt 0 \n\
s_endpgm \n\
end \n\
";
static const char * copy_dword = \
"\
shader copy_dword \n\
asic(GFX10) \n\
wave_size(32) \n\
type(CS) \n\
v_mov_b32 v0, s0 \n\
v_mov_b32 v1, s1 \n\
v_mov_b32 v2, s2 \n\
v_mov_b32 v3, s3 \n\
flat_load_dword v4, v[0:1] slc glc \n\
s_waitcnt 0 \n\
flat_store_dword v[2:3], v4 slc glc \n\
s_endpgm \n\
end \n\
";
static const char * loop= \
"\
shader loop \n\
asic(GFX10) \n\
type(CS) \n\
wave_size(32) \n\
loop: \n\
s_branch loop \n\
s_endpgm \n\
end \n\
";
static const char * noop= \
"\
shader noop \n\
asic(GFX10) \n\
type(CS) \n\
wave_size(32) \n\
s_endpgm \n\
end \n\
";
#endif
const uint32_t IsaGenerator_Gfx10::NOOP_ISA[] = {
0xb0804004, 0xbf810000,
0xbf9f0000, 0xbf9f0000,
0xbf9f0000, 0xbf9f0000,
0xbf9f0000
};
const uint32_t IsaGenerator_Gfx10::COPY_DWORD_ISA[] = {
0xb0804004, 0x7e000200,
0x7e020201, 0x7e040202,
0x7e060203, 0xdc330000,
0x47d0000, 0xbf8c0000,
0xdc730000, 0x7d0402,
0xbf810000, 0xbf9f0000,
0xbf9f0000, 0xbf9f0000,
0xbf9f0000, 0xbf9f0000
};
const uint32_t IsaGenerator_Gfx10::INFINITE_LOOP_ISA[] = {
0xbf82ffff, 0xb0804004,
0xbf810000, 0xbf9f0000,
0xbf9f0000, 0xbf9f0000,
0xbf9f0000, 0xbf9f0000
};
const uint32_t IsaGenerator_Gfx10::ATOMIC_ADD_ISA[] = {
0xb0804004, 0x7e000200,
0x7e020201, 0x7e040281,
0xdccb0000, 0x37d0200,
0xbf8c0000, 0xbf810000,
0xbf9f0000, 0xbf9f0000,
0xbf9f0000, 0xbf9f0000,
0xbf9f0000
};
void IsaGenerator_Gfx10::GetNoopIsa(HsaMemoryBuffer& rBuf) {
std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx10::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx10::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx10::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
std::copy(ATOMIC_ADD_ISA, ATOMIC_ADD_ISA+ARRAY_SIZE(ATOMIC_ADD_ISA), rBuf.As<uint32_t*>());
}
const std::string& IsaGenerator_Gfx10::GetAsicName() {
return ASIC_NAME;
}
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator_Gfx10.hpp
-49
Parādīt failu
@@ -1,49 +0,0 @@
/*
* Copyright (C) 2019 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef _ISAGENERATOR_GFX10_H_
#define _ISAGENERATOR_GFX10_H_
#include <string>
#include "IsaGenerator.hpp"
class IsaGenerator_Gfx10 : public IsaGenerator {
public:
virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
protected:
virtual const std::string& GetAsicName();
private:
static const std::string ASIC_NAME;
static const uint32_t NOOP_ISA[];
static const uint32_t COPY_DWORD_ISA[];
static const uint32_t INFINITE_LOOP_ISA[];
static const uint32_t ATOMIC_ADD_ISA[];
};
#endif // _ISAGENERATOR_GFX9_H_
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator_Gfx72.cpp
-123
Parādīt failu
@@ -1,123 +0,0 @@
/*
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "IsaGenerator_Gfx72.hpp"
#include <algorithm>
#include <string>
const std::string IsaGenerator_Gfx72::ASIC_NAME = "CI";
const uint32_t IsaGenerator_Gfx72::NOOP_ISA[] = {
0xbf810000 // S_ENDPGM
};
/* The below arrays are filled with hex values in order not to reference
* proprietary header files, but we still leave the code here for future
* reference.
*/
#if 0
const uint32_t IsaGenerator_Gfx72::COPY_DWORD_ISA[] = {
(63u << SQ_VOP1__ENCODING__SHIFT) | (0 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (0 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v0, s0 (VOP1)
(63u << SQ_VOP1__ENCODING__SHIFT) | (1 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (1 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v1, s1 (VOP1)
(63u << SQ_VOP1__ENCODING__SHIFT) | (2 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (2 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v2, s2 (VOP1)
(63u << SQ_VOP1__ENCODING__SHIFT) | (3 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (3 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v3, s3 (VOP1)
(55u << SQ_FLAT_0__ENCODING__SHIFT) | (SQ_FLAT_LOAD_DWORD << SQ_FLAT_0__OP__SHIFT) | (1 << SQ_FLAT_0__SLC__SHIFT) | (1 << SQ_FLAT_0__GLC__SHIFT)/*(3 << 16)*/, // SQ_FLAT_0, flat_load_dword, slc = 1, glc = 1 (FLAT_0)
(4u << SQ_FLAT_1__VDST__SHIFT) | (0 << SQ_FLAT_1__ADDR__SHIFT), // ADDR = V0:V1, VDST = V4 (FLAT_1)
(383u << SQ_SOPP__ENCODING__SHIFT) | (SQ_S_WAITCNT << SQ_SOPP__OP__SHIFT) | (0 << SQ_SOPP__SIMM16__SHIFT), // s_waitcnt 0 (SOPP)
(55u << SQ_FLAT_0__ENCODING__SHIFT) | (SQ_FLAT_STORE_DWORD << SQ_FLAT_0__OP__SHIFT) | (1 << SQ_FLAT_0__SLC__SHIFT) | (1 << SQ_FLAT_0__GLC__SHIFT), // SQ_FLAT_0, flat_store_dword, slc = 1, glc = 1 (FLAT_0)
(4u << SQ_FLAT_1__DATA__SHIFT) | (2 << SQ_FLAT_1__ADDR__SHIFT), // ADDR = V2:V3, DATA = V4 (FLAT_1)
0xBF810000u // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
};
const uint32_t IsaGenerator_Gfx72::INFINITE_LOOP_ISA[] = {
(0x17F << SQ_SOPP__ENCODING__SHIFT) | (SQ_S_BRANCH << SQ_SOPP__OP__SHIFT) | ( (const uint32_t)-1 << SQ_SOPP__SIMM16__SHIFT), // s_branch -1 (PC <- PC + SIMM*4)+4
0xBF810000u // S_ENDPGM
};
const uint32_t IsaGenerator_Gfx72::ATOMIC_INC_ISA[] = {
(63u << SQ_VOP1__ENCODING__SHIFT) | (0 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (0 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v0, s0 (VOP1)
(63u << SQ_VOP1__ENCODING__SHIFT) | (1 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (1 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v1, s1 (VOP1)
(63u << SQ_VOP1__ENCODING__SHIFT) | (2 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (0xC1 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 0xFFFFFFFF, s2 (VOP1)
(55u << SQ_FLAT_0__ENCODING__SHIFT) | (SQ_FLAT_ATOMIC_INC << SQ_FLAT_0__OP__SHIFT) | (1 << SQ_FLAT_0__SLC__SHIFT) | (0 << SQ_FLAT_0__GLC__SHIFT), // SQ_FLAT_0, flat_atomic_inc, slc = 1, glc = 0 (FLAT_0)
(3u << SQ_FLAT_1__VDST__SHIFT) | (2u << SQ_FLAT_1__DATA__SHIFT) | (0 << SQ_FLAT_1__ADDR__SHIFT), // ADDR/dst = V0:V1, VDST/ret = V3, DATA/src=V2 (FLAT_1)
0xBF810000u // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
};
#endif
const uint32_t IsaGenerator_Gfx72::COPY_DWORD_ISA[] = {
0x7e000200, // v_mov_b32 v0, s0 (VOP1)
0x7e020201, // v_mov_b32 v1, s1 (VOP1)
0x7e040202, // v_mov_b32 v2, s2 (VOP1)
0x7e060203, // v_mov_b32 v3, s3 (VOP1)
0xdc330000, // SQ_FLAT_0, flat_load_dword, slc = 1, glc = 1 (FLAT_0)
0x04000000, // ADDR = V0:V1, VDST = V4 (FLAT_1)
0xbf8c0000, // s_waitcnt 0 (SOPP)
0xdc730000, // SQ_FLAT_0, flat_store_dword, slc = 1, glc = 1 (FLAT_0)
0x00000402, // ADDR = V2:V3, DATA = V4 (FLAT_1)
0xbf810000 // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
};
const uint32_t IsaGenerator_Gfx72::INFINITE_LOOP_ISA[] = {
0xbf82ffff, // s_branch -1 (PC <- PC + SIMM*4)+4
0xbf810000 // S_ENDPGM
};
const uint32_t IsaGenerator_Gfx72::ATOMIC_INC_ISA[] = {
0x7e000200, // v_mov_b32 v0, s0 (VOP1)
0x7e020201, // v_mov_b32 v1, s1 (VOP1)
0x7e0402c1, // v_mov_b32 0xFFFFFFFF, s2 (VOP1)
0xdcf20000, // SQ_FLAT_0, flat_atomic_inc, slc = 1, glc = 0 (FLAT_0)
0x03000200, // ADDR/dst = V0:V1, VDST/ret = V3, DATA/src=V2 (FLAT_1)
0xbf810000 // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
};
void IsaGenerator_Gfx72::GetNoopIsa(HsaMemoryBuffer& rBuf) {
std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx72::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx72::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx72::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
std::copy(ATOMIC_INC_ISA, ATOMIC_INC_ISA+ARRAY_SIZE(ATOMIC_INC_ISA), rBuf.As<uint32_t*>());
}
const std::string& IsaGenerator_Gfx72::GetAsicName() {
return ASIC_NAME;
}
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator_Gfx72.hpp
-49
Parādīt failu
@@ -1,49 +0,0 @@
/*
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef _ISAGENERATOR_GFX72_H_
#define _ISAGENERATOR_GFX72_H_
#include <string>
#include "IsaGenerator.hpp"
class IsaGenerator_Gfx72 : public IsaGenerator {
public:
virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
protected:
virtual const std::string& GetAsicName();
private:
static const std::string ASIC_NAME;
static const uint32_t NOOP_ISA[];
static const uint32_t COPY_DWORD_ISA[];
static const uint32_t INFINITE_LOOP_ISA[];
static const uint32_t ATOMIC_INC_ISA[];
};
#endif // _ISAGENERATOR_GFX72_H_
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator_Gfx8.cpp
-128
Parādīt failu
@@ -1,128 +0,0 @@
/*
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "IsaGenerator_Gfx8.hpp"
#include <algorithm>
#include <string>
const std::string IsaGenerator_Gfx8::ASIC_NAME = "VI";
const uint32_t IsaGenerator_Gfx8::NOOP_ISA[] = {
0xbf810000 // S_ENDPGM
};
/** The below arrays are filled with hex values in order not to reference
* proprietary header files, but we still leave the code here for future
* reference.
*/
#if 0
const uint32_t IsaGenerator_Gfx8::COPY_DWORD_ISA[] = {
(63u << SQ_VOP1__ENCODING__SHIFT) | (0 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (0 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v0, s0 (VOP1)
(63u << SQ_VOP1__ENCODING__SHIFT) | (1 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (1 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v1, s1 (VOP1)
(63u << SQ_VOP1__ENCODING__SHIFT) | (2 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (2 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v2, s2 (VOP1)
(63u << SQ_VOP1__ENCODING__SHIFT) | (3 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (3 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v3, s3 (VOP1)
(55u << SQ_FLAT_0__ENCODING__SHIFT) | (SQ_FLAT_LOAD_DWORD << SQ_FLAT_0__OP__SHIFT) | (1 << SQ_FLAT_0__SLC__SHIFT) | (1 << SQ_FLAT_0__GLC__SHIFT)/*(3 << 16)*/, // SQ_FLAT_0, flat_load_dword, slc = 1, glc = 1 (FLAT_0)
(4u << SQ_FLAT_1__VDST__SHIFT) | (0 << SQ_FLAT_1__ADDR__SHIFT), // ADDR = V0:V1, VDST = V4 (FLAT_1)
(383u << SQ_SOPP__ENCODING__SHIFT) | (SQ_S_WAITCNT << SQ_SOPP__OP__SHIFT) | (0 << SQ_SOPP__SIMM16__SHIFT), // s_waitcnt 0 (SOPP)
(55u << SQ_FLAT_0__ENCODING__SHIFT) | (SQ_FLAT_STORE_DWORD << SQ_FLAT_0__OP__SHIFT) | (1 << SQ_FLAT_0__SLC__SHIFT) | (1 << SQ_FLAT_0__GLC__SHIFT), // SQ_FLAT_0, flat_store_dword, slc = 1, glc = 1 (FLAT_0)
(4u << SQ_FLAT_1__DATA__SHIFT) | (2 << SQ_FLAT_1__ADDR__SHIFT), // ADDR = V2:V3, DATA = V4 (FLAT_1)
0xBF810000u // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
};
const uint32_t IsaGenerator_Gfx8::INFINITE_LOOP_ISA[] = {
(0x17F << SQ_SOPP__ENCODING__SHIFT) | (SQ_S_BRANCH << SQ_SOPP__OP__SHIFT) | ( (const uint32_t)-1 << SQ_SOPP__SIMM16__SHIFT), // s_branch -1 (PC <- PC + SIMM*4)+4
0xBF810000u // S_ENDPGM
};
#endif
const uint32_t IsaGenerator_Gfx8::COPY_DWORD_ISA[] = {
0x7e000200, // v_mov_b32 v0, s0 (VOP1)
0x7e020201, // v_mov_b32 v1, s1 (VOP1)
0x7e040202, // v_mov_b32 v2, s2 (VOP1)
0x7e060203, // v_mov_b32 v3, s3 (VOP1)
0xdc530000, // SQ_FLAT_0, flat_load_dword, slc = 1, glc = 1 (FLAT_0)
0x04000000, // ADDR = V0:V1, VDST = V4 (FLAT_1)
0xbf8c0000, // s_waitcnt 0 (SOPP)
0xdc730000, // SQ_FLAT_0, flat_store_dword, slc = 1, glc = 1 (FLAT_0)
0x00000402, // ADDR = V2:V3, DATA = V4 (FLAT_1)
0xbf810000 // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
};
const uint32_t IsaGenerator_Gfx8::INFINITE_LOOP_ISA[] = {
0xbf82ffff, // s_branch -1 (PC <- PC + SIMM*4)+4
0xbf810000 // S_ENDPGM
};
/**
* The atomic_add_isa binary is generated from following ISA
* The original atomic_inc is not support by some PCIE, so use atomic_add instead
*
*/
/*
shader atomic_add
asic(VI)
type(CS)
v_mov_b32 v0, s0
v_mov_b32 v1, s1
v_mov_b32 v2, 1
flat_atomic_add v3, v[0:1], v2 slc glc
s_waitcnt 0
s_endpgm
end
*/
const uint32_t IsaGenerator_Gfx8::ATOMIC_ADD_ISA[] = {
0x7e000200, 0x7e020201,
0x7e040281, 0xdd0b0000,
0x03000200, 0xbf8c0000,
0xbf810000, 0x00000000
};
void IsaGenerator_Gfx8::GetNoopIsa(HsaMemoryBuffer& rBuf) {
std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx8::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx8::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx8::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
std::copy(ATOMIC_ADD_ISA, ATOMIC_ADD_ISA+ARRAY_SIZE(ATOMIC_ADD_ISA), rBuf.As<uint32_t*>());
}
const std::string& IsaGenerator_Gfx8::GetAsicName() {
return ASIC_NAME;
}
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator_Gfx8.hpp
-49
Parādīt failu
@@ -1,49 +0,0 @@
/*
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef _ISAGENERATOR_GFX8_H_
#define _ISAGENERATOR_GFX8_H_
#include <string>
#include "IsaGenerator.hpp"
class IsaGenerator_Gfx8 : public IsaGenerator {
public:
virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
protected:
virtual const std::string& GetAsicName();
private:
static const std::string ASIC_NAME;
static const uint32_t NOOP_ISA[];
static const uint32_t COPY_DWORD_ISA[];
static const uint32_t INFINITE_LOOP_ISA[];
static const uint32_t ATOMIC_ADD_ISA[];
};
#endif // _ISAGENERATOR_GFX72_H_
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator_Gfx9.cpp
-113
Parādīt failu
@@ -1,113 +0,0 @@
/*
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "IsaGenerator_Gfx9.hpp"
#include <algorithm>
#include <string>
const std::string IsaGenerator_Gfx9::ASIC_NAME = "GFX9";
/* The binaries are generated from following ISA */
#if 0
/* flat_atomic_inc will not support by some PCIE, use flat_atomic_add instead */
shader atomic_add
asic(GFX9)
type(CS)
v_mov_b32 v0, s0
v_mov_b32 v1, s1
v_mov_b32 v2, 1
flat_atomic_add v3, v[0:1], v2 slc glc
s_waitcnt 0
s_endpgm
end
shader copy_dword
asic(GFX9)
type(CS)
/* copy the parameters from scalar registers to vector registers */
v_mov_b32 v0, s0
v_mov_b32 v1, s1
v_mov_b32 v2, s2
v_mov_b32 v3, s3
/* copy a dword between the passed addresses */
flat_load_dword v4, v[0:1] slc glc
s_waitcnt 0
flat_store_dword v[2:3], v4 slc glc
s_endpgm
end
shader main
asic(GFX9)
type(CS)
loop:
s_branch loop
s_endpgm
end
#endif
const uint32_t IsaGenerator_Gfx9::NOOP_ISA[] = {
0xbf810000
};
const uint32_t IsaGenerator_Gfx9::COPY_DWORD_ISA[] = {
0x7e000200, 0x7e020201,
0x7e040202, 0x7e060203,
0xdc530000, 0x047f0000,
0xbf8c0000, 0xdc730000,
0x007f0402, 0xbf810000
};
const uint32_t IsaGenerator_Gfx9::INFINITE_LOOP_ISA[] = {
0xbf82ffff, 0xbf810000
};
const uint32_t IsaGenerator_Gfx9::ATOMIC_ADD_ISA[] = {
0x7e000200, 0x7e020201,
0x7e040281, 0xdd0b0000,
0x037f0200, 0xbf8c0000,
0xbf810000, 0x00000000
};
void IsaGenerator_Gfx9::GetNoopIsa(HsaMemoryBuffer& rBuf) {
std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx9::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx9::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
}
void IsaGenerator_Gfx9::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
std::copy(ATOMIC_ADD_ISA, ATOMIC_ADD_ISA+ARRAY_SIZE(ATOMIC_ADD_ISA), rBuf.As<uint32_t*>());
}
const std::string& IsaGenerator_Gfx9::GetAsicName() {
return ASIC_NAME;
}
projects/rocr-runtime/tests/kfdtest/src/IsaGenerator_Gfx9.hpp
-49
Parādīt failu
@@ -1,49 +0,0 @@
/*
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef _ISAGENERATOR_GFX9_H_
#define _ISAGENERATOR_GFX9_H_
#include <string>
#include "IsaGenerator.hpp"
class IsaGenerator_Gfx9 : public IsaGenerator {
public:
virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
protected:
virtual const std::string& GetAsicName();
private:
static const std::string ASIC_NAME;
static const uint32_t NOOP_ISA[];
static const uint32_t COPY_DWORD_ISA[];
static const uint32_t INFINITE_LOOP_ISA[];
static const uint32_t ATOMIC_ADD_ISA[];
};
#endif // _ISAGENERATOR_GFX9_H_