kfdtest: Remove SP3/IsaGen
- Remove SP3 lib directory
- Remove IsaGenerator* files
- Update CMakeLists accordingly
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I280161b0b238839ab318c18d6038cdd64fa66208
[ROCm/ROCR-Runtime commit: e6e498abf3]
This commit is contained in:
Graham Sider
zatwierdzone przez
Harish Kasiviswanathan
Harish Kasiviswanathan
rodzic
d31d1ca19a
commit
36ee679ca3
@@ -1,126 +0,0 @@
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/*
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* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
|
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* copy of this software and associated documentation files (the "Software"),
|
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* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
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* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
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||||
* The above copyright notice and this permission notice shall be included in
|
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* all copies or substantial portions of the Software.
|
||||
*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "IsaGenerator.hpp"
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#include <algorithm>
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#include <string>
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#include "IsaGenerator_Gfx72.hpp"
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#include "IsaGenerator_Gfx8.hpp"
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#include "IsaGenerator_Gfx9.hpp"
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#include "IsaGenerator_Gfx10.hpp"
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#include "IsaGenerator_Aldebaran.hpp"
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#include "GoogleTestExtension.hpp"
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#include "sp3.h"
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const std::string IsaGenerator::ADDRESS_WATCH_SP3(
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"var REG_TRAPSTS_EXCP_MASK = 0x000001ff\n"
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"var WAVE_COUNT_OFFSET = 12\n"
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"var TMA_CYCLE_OFFSET = 16\n"
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"\n"
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"/*\n"
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" * ttmp[0:1] -- The ISA address that triggered this trap handler\n"
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" * ttmp[10:11] -- The TMA user provided, used to store the debug info in this shader\n"
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" * v[10:14] ttmp[7:8] -- temp use inside this shader\n"
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" * s5 -- store the counts that this trap been triggered\n"
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" * Each time when the trap is triggered , this shader will write\n"
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" * ttmp[0] : ttmp[1] : Trap_Status : [reserved]\n"
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" * to TMA + (trap count * TMA_CYCLE_OFFSET)\n"
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" * The TMA + WAVE_COUNT_OFFSET(the first [reserved] address)\n"
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" * used to store the total triggered trap count.\n"
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" */\n"
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"shader main\n"
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"\n"
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" asic(VI)\n"
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"\n"
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" type(CS)\n"
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" v_mov_b32 v10, ttmp10\n"
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" v_mov_b32 v11, ttmp11\n"
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" s_mov_b32 ttmp7, s5\n"
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" s_mulk_i32 ttmp7, TMA_CYCLE_OFFSET\n"
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" s_addk_i32 s5, 1\n"
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" v_mov_b32 v12, ttmp0\n"
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" v_add_u32 v10, vcc, ttmp7, v10\n"
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" flat_store_dword v[10,11], v12 slc glc\n"
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" v_mov_b32 v12, ttmp1\n"
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" v_add_u32 v10, vcc, 4, v10\n"
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" flat_store_dword v[10,11], v12 slc glc\n"
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" s_getreg_b32 ttmp8, hwreg(HW_REG_TRAPSTS)\n"
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" s_and_b32 ttmp8, ttmp8, REG_TRAPSTS_EXCP_MASK\n"
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" v_mov_b32 v12, ttmp8\n"
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" v_add_u32 v10, vcc, 4, v10\n"
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" flat_store_dword v[10,11], v12 glc\n"
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" v_mov_b32 v10, ttmp10\n"
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" v_add_u32 v10, vcc, WAVE_COUNT_OFFSET, v10\n"
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" v_mov_b32 v13, 1\n"
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" flat_atomic_add v14, v[10:11], v13 slc glc\n"
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" s_and_b32 ttmp1, ttmp1, 0xffff\n"
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" s_rfe_b64 [ttmp0,ttmp1]\n"
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"end\n"
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);
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IsaGenerator* IsaGenerator::Create(unsigned int familyId) {
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switch (familyId) {
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case FAMILY_CI:
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case FAMILY_KV:
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return new IsaGenerator_Gfx72;
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case FAMILY_VI:
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case FAMILY_CZ:
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return new IsaGenerator_Gfx8;
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case FAMILY_AI:
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case FAMILY_RV:
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case FAMILY_AR:
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return new IsaGenerator_Gfx9;
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case FAMILY_AL:
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return new IsaGenerator_Aldbrn;
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case FAMILY_NV:
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return new IsaGenerator_Gfx10;
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default:
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LOG() << "Error: Invalid ISA" << std::endl;
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return NULL;
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}
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}
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void IsaGenerator::GetAwTrapHandler(HsaMemoryBuffer& rBuf) {
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CompileShader(ADDRESS_WATCH_SP3.c_str(), "main", rBuf);
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}
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void IsaGenerator::CompileShader(const char* shaderCode, const char* shaderName, HsaMemoryBuffer& rBuf) {
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sp3_context* pSp3 = sp3_new();
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sp3_setasic(pSp3, GetAsicName().c_str());
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sp3_parse_string(pSp3, shaderCode);
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sp3_shader* pShader = sp3_compile(pSp3, shaderName);
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std::copy(pShader->data, pShader->data + pShader->size, rBuf.As<unsigned int*>());
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sp3_free_shader(pShader);
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/** Inside this close function, there is an unknown reason of free memory not used by compiler.
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* Comment out this as a workaround. System will do the garbage collection after this
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* application is closed.
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*/
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// sp3_close(pSp3);
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}
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@@ -1,52 +0,0 @@
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/*
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* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
|
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
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* and/or sell copies of the Software, and to permit persons to whom the
|
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
|
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _ISAGENERATOR_H_
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#define _ISAGENERATOR_H_
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#include "KFDTestUtil.hpp"
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/* isa generation class - interface */
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class IsaGenerator {
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public:
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static IsaGenerator* Create(unsigned int familyId);
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virtual ~IsaGenerator() {}
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virtual void GetNoopIsa(HsaMemoryBuffer& rBuf) = 0;
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virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf) = 0;
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virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) = 0;
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virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf) = 0;
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virtual void GetCwsrTrapHandler(HsaMemoryBuffer& rBuf) {}
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virtual void GetAwTrapHandler(HsaMemoryBuffer& rBuf);
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void CompileShader(const char* shaderCode, const char* shaderName, HsaMemoryBuffer& rBuf);
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protected:
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virtual const std::string& GetAsicName() = 0;
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private:
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static const std::string ADDRESS_WATCH_SP3;
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};
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#endif // _ISAGENERATOR_H_
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@@ -1,113 +0,0 @@
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/*
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* Copyright (C) 2020 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "IsaGenerator_Aldebaran.hpp"
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#include <algorithm>
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#include <string>
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const std::string IsaGenerator_Aldbrn::ASIC_NAME = "ALDEBARAN";
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/* The binaries are generated from following ISA */
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#if 0
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/* flat_atomic_inc will not support by some PCIE, use flat_atomic_add instead */
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shader atomic_add
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asic(ALDEBARAN)
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type(CS)
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v_mov_b32 v0, s0
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v_mov_b32 v1, s1
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v_mov_b32 v2, 1
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flat_atomic_add v3, v[0:1], v2 slc glc scc
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s_waitcnt 0
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s_endpgm
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end
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shader copy_dword
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asic(ALDEBARAN)
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type(CS)
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/* copy the parameters from scalar registers to vector registers */
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v_mov_b32 v0, s0
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v_mov_b32 v1, s1
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v_mov_b32 v2, s2
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v_mov_b32 v3, s3
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/* copy a dword between the passed addresses */
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flat_load_dword v4, v[0:1] slc glc
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s_waitcnt 0
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flat_store_dword v[2:3], v4 slc glc
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s_endpgm
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end
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shader main
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asic(ALDEBARAN)
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type(CS)
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loop:
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s_branch loop
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s_endpgm
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end
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#endif
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const uint32_t IsaGenerator_Aldbrn::NOOP_ISA[] = {
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0xbf810000
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};
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const uint32_t IsaGenerator_Aldbrn::COPY_DWORD_ISA[] = {
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0x7e000200, 0x7e020201,
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0x7e040202, 0x7e060203,
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0xdc530000, 0x047f0000,
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0xbf8c0000, 0xdc730000,
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0x007f0402, 0xbf810000
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};
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const uint32_t IsaGenerator_Aldbrn::INFINITE_LOOP_ISA[] = {
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0xbf82ffff, 0xbf810000
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};
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const uint32_t IsaGenerator_Aldbrn::ATOMIC_ADD_ISA[] = {
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0x7e000200, 0x7e020201,
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0x7e040281, 0xdf0b0000,
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0x037f0200, 0xbf8c0000,
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0xbf810000, 0x00000000
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};
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void IsaGenerator_Aldbrn::GetNoopIsa(HsaMemoryBuffer& rBuf) {
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std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
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}
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void IsaGenerator_Aldbrn::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
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std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
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}
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void IsaGenerator_Aldbrn::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
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std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
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}
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void IsaGenerator_Aldbrn::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
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std::copy(ATOMIC_ADD_ISA, ATOMIC_ADD_ISA+ARRAY_SIZE(ATOMIC_ADD_ISA), rBuf.As<uint32_t*>());
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}
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const std::string& IsaGenerator_Aldbrn::GetAsicName() {
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return ASIC_NAME;
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}
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@@ -1,49 +0,0 @@
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/*
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* Copyright (C) 2020 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _ISAGENERATOR_ALDEBARAN_H_
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#define _ISAGENERATOR_ALDEBARAN_H_
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#include <string>
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#include "IsaGenerator.hpp"
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class IsaGenerator_Aldbrn : public IsaGenerator {
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public:
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virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
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virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
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virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
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virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
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protected:
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virtual const std::string& GetAsicName();
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private:
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static const std::string ASIC_NAME;
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static const uint32_t NOOP_ISA[];
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static const uint32_t COPY_DWORD_ISA[];
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static const uint32_t INFINITE_LOOP_ISA[];
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static const uint32_t ATOMIC_ADD_ISA[];
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};
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#endif // _ISAGENERATOR_ALDEBARAN_H_
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@@ -1,142 +0,0 @@
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/*
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* Copyright (C) 2019 Advanced Micro Devices, Inc. All Rights Reserved.
|
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*
|
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* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
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*/
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#include "IsaGenerator_Gfx10.hpp"
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#include <algorithm>
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#include <string>
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/* The binaries are generated from following ISA */
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const std::string IsaGenerator_Gfx10::ASIC_NAME = "GFX10";
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#if 0
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static const char * atomic_add = \
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"\
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shader atomic_add \n\
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asic(GFX10) \n\
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wave_size(32) \n\
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type(CS) \n\
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v_mov_b32 v0, s0 \n\
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v_mov_b32 v1, s1 \n\
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v_mov_b32 v2, 1 \n\
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flat_atomic_add v3, v[0:1], v2 slc glc \n\
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s_waitcnt 0 \n\
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s_endpgm \n\
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end \n\
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";
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static const char * copy_dword = \
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"\
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shader copy_dword \n\
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asic(GFX10) \n\
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wave_size(32) \n\
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type(CS) \n\
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v_mov_b32 v0, s0 \n\
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v_mov_b32 v1, s1 \n\
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v_mov_b32 v2, s2 \n\
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v_mov_b32 v3, s3 \n\
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flat_load_dword v4, v[0:1] slc glc \n\
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s_waitcnt 0 \n\
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flat_store_dword v[2:3], v4 slc glc \n\
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s_endpgm \n\
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end \n\
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";
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static const char * loop= \
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"\
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shader loop \n\
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asic(GFX10) \n\
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type(CS) \n\
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wave_size(32) \n\
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loop: \n\
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s_branch loop \n\
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s_endpgm \n\
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end \n\
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";
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static const char * noop= \
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"\
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shader noop \n\
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asic(GFX10) \n\
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type(CS) \n\
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wave_size(32) \n\
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s_endpgm \n\
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end \n\
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";
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#endif
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const uint32_t IsaGenerator_Gfx10::NOOP_ISA[] = {
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0xb0804004, 0xbf810000,
|
||||
0xbf9f0000, 0xbf9f0000,
|
||||
0xbf9f0000, 0xbf9f0000,
|
||||
0xbf9f0000
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx10::COPY_DWORD_ISA[] = {
|
||||
0xb0804004, 0x7e000200,
|
||||
0x7e020201, 0x7e040202,
|
||||
0x7e060203, 0xdc330000,
|
||||
0x47d0000, 0xbf8c0000,
|
||||
0xdc730000, 0x7d0402,
|
||||
0xbf810000, 0xbf9f0000,
|
||||
0xbf9f0000, 0xbf9f0000,
|
||||
0xbf9f0000, 0xbf9f0000
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx10::INFINITE_LOOP_ISA[] = {
|
||||
0xbf82ffff, 0xb0804004,
|
||||
0xbf810000, 0xbf9f0000,
|
||||
0xbf9f0000, 0xbf9f0000,
|
||||
0xbf9f0000, 0xbf9f0000
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx10::ATOMIC_ADD_ISA[] = {
|
||||
0xb0804004, 0x7e000200,
|
||||
0x7e020201, 0x7e040281,
|
||||
0xdccb0000, 0x37d0200,
|
||||
0xbf8c0000, 0xbf810000,
|
||||
0xbf9f0000, 0xbf9f0000,
|
||||
0xbf9f0000, 0xbf9f0000,
|
||||
0xbf9f0000
|
||||
};
|
||||
|
||||
|
||||
void IsaGenerator_Gfx10::GetNoopIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx10::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx10::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx10::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(ATOMIC_ADD_ISA, ATOMIC_ADD_ISA+ARRAY_SIZE(ATOMIC_ADD_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
const std::string& IsaGenerator_Gfx10::GetAsicName() {
|
||||
return ASIC_NAME;
|
||||
}
|
||||
|
||||
@@ -1,49 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019 Advanced Micro Devices, Inc. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _ISAGENERATOR_GFX10_H_
|
||||
#define _ISAGENERATOR_GFX10_H_
|
||||
|
||||
#include <string>
|
||||
#include "IsaGenerator.hpp"
|
||||
|
||||
class IsaGenerator_Gfx10 : public IsaGenerator {
|
||||
public:
|
||||
virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
|
||||
|
||||
protected:
|
||||
virtual const std::string& GetAsicName();
|
||||
|
||||
private:
|
||||
static const std::string ASIC_NAME;
|
||||
|
||||
static const uint32_t NOOP_ISA[];
|
||||
static const uint32_t COPY_DWORD_ISA[];
|
||||
static const uint32_t INFINITE_LOOP_ISA[];
|
||||
static const uint32_t ATOMIC_ADD_ISA[];
|
||||
};
|
||||
|
||||
#endif // _ISAGENERATOR_GFX9_H_
|
||||
@@ -1,123 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "IsaGenerator_Gfx72.hpp"
|
||||
|
||||
#include <algorithm>
|
||||
#include <string>
|
||||
|
||||
const std::string IsaGenerator_Gfx72::ASIC_NAME = "CI";
|
||||
|
||||
const uint32_t IsaGenerator_Gfx72::NOOP_ISA[] = {
|
||||
0xbf810000 // S_ENDPGM
|
||||
};
|
||||
|
||||
/* The below arrays are filled with hex values in order not to reference
|
||||
* proprietary header files, but we still leave the code here for future
|
||||
* reference.
|
||||
*/
|
||||
#if 0
|
||||
const uint32_t IsaGenerator_Gfx72::COPY_DWORD_ISA[] = {
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (0 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (0 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v0, s0 (VOP1)
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (1 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (1 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v1, s1 (VOP1)
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (2 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (2 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v2, s2 (VOP1)
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (3 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (3 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v3, s3 (VOP1)
|
||||
|
||||
(55u << SQ_FLAT_0__ENCODING__SHIFT) | (SQ_FLAT_LOAD_DWORD << SQ_FLAT_0__OP__SHIFT) | (1 << SQ_FLAT_0__SLC__SHIFT) | (1 << SQ_FLAT_0__GLC__SHIFT)/*(3 << 16)*/, // SQ_FLAT_0, flat_load_dword, slc = 1, glc = 1 (FLAT_0)
|
||||
(4u << SQ_FLAT_1__VDST__SHIFT) | (0 << SQ_FLAT_1__ADDR__SHIFT), // ADDR = V0:V1, VDST = V4 (FLAT_1)
|
||||
|
||||
(383u << SQ_SOPP__ENCODING__SHIFT) | (SQ_S_WAITCNT << SQ_SOPP__OP__SHIFT) | (0 << SQ_SOPP__SIMM16__SHIFT), // s_waitcnt 0 (SOPP)
|
||||
|
||||
(55u << SQ_FLAT_0__ENCODING__SHIFT) | (SQ_FLAT_STORE_DWORD << SQ_FLAT_0__OP__SHIFT) | (1 << SQ_FLAT_0__SLC__SHIFT) | (1 << SQ_FLAT_0__GLC__SHIFT), // SQ_FLAT_0, flat_store_dword, slc = 1, glc = 1 (FLAT_0)
|
||||
(4u << SQ_FLAT_1__DATA__SHIFT) | (2 << SQ_FLAT_1__ADDR__SHIFT), // ADDR = V2:V3, DATA = V4 (FLAT_1)
|
||||
|
||||
0xBF810000u // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx72::INFINITE_LOOP_ISA[] = {
|
||||
(0x17F << SQ_SOPP__ENCODING__SHIFT) | (SQ_S_BRANCH << SQ_SOPP__OP__SHIFT) | ( (const uint32_t)-1 << SQ_SOPP__SIMM16__SHIFT), // s_branch -1 (PC <- PC + SIMM*4)+4
|
||||
0xBF810000u // S_ENDPGM
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx72::ATOMIC_INC_ISA[] = {
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (0 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (0 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v0, s0 (VOP1)
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (1 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (1 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v1, s1 (VOP1)
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (2 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (0xC1 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 0xFFFFFFFF, s2 (VOP1)
|
||||
|
||||
(55u << SQ_FLAT_0__ENCODING__SHIFT) | (SQ_FLAT_ATOMIC_INC << SQ_FLAT_0__OP__SHIFT) | (1 << SQ_FLAT_0__SLC__SHIFT) | (0 << SQ_FLAT_0__GLC__SHIFT), // SQ_FLAT_0, flat_atomic_inc, slc = 1, glc = 0 (FLAT_0)
|
||||
(3u << SQ_FLAT_1__VDST__SHIFT) | (2u << SQ_FLAT_1__DATA__SHIFT) | (0 << SQ_FLAT_1__ADDR__SHIFT), // ADDR/dst = V0:V1, VDST/ret = V3, DATA/src=V2 (FLAT_1)
|
||||
0xBF810000u // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
|
||||
};
|
||||
#endif
|
||||
|
||||
const uint32_t IsaGenerator_Gfx72::COPY_DWORD_ISA[] = {
|
||||
0x7e000200, // v_mov_b32 v0, s0 (VOP1)
|
||||
0x7e020201, // v_mov_b32 v1, s1 (VOP1)
|
||||
0x7e040202, // v_mov_b32 v2, s2 (VOP1)
|
||||
0x7e060203, // v_mov_b32 v3, s3 (VOP1)
|
||||
|
||||
0xdc330000, // SQ_FLAT_0, flat_load_dword, slc = 1, glc = 1 (FLAT_0)
|
||||
0x04000000, // ADDR = V0:V1, VDST = V4 (FLAT_1)
|
||||
|
||||
0xbf8c0000, // s_waitcnt 0 (SOPP)
|
||||
|
||||
0xdc730000, // SQ_FLAT_0, flat_store_dword, slc = 1, glc = 1 (FLAT_0)
|
||||
0x00000402, // ADDR = V2:V3, DATA = V4 (FLAT_1)
|
||||
|
||||
0xbf810000 // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx72::INFINITE_LOOP_ISA[] = {
|
||||
0xbf82ffff, // s_branch -1 (PC <- PC + SIMM*4)+4
|
||||
0xbf810000 // S_ENDPGM
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx72::ATOMIC_INC_ISA[] = {
|
||||
0x7e000200, // v_mov_b32 v0, s0 (VOP1)
|
||||
0x7e020201, // v_mov_b32 v1, s1 (VOP1)
|
||||
0x7e0402c1, // v_mov_b32 0xFFFFFFFF, s2 (VOP1)
|
||||
|
||||
0xdcf20000, // SQ_FLAT_0, flat_atomic_inc, slc = 1, glc = 0 (FLAT_0)
|
||||
0x03000200, // ADDR/dst = V0:V1, VDST/ret = V3, DATA/src=V2 (FLAT_1)
|
||||
0xbf810000 // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
|
||||
};
|
||||
|
||||
void IsaGenerator_Gfx72::GetNoopIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx72::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx72::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx72::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(ATOMIC_INC_ISA, ATOMIC_INC_ISA+ARRAY_SIZE(ATOMIC_INC_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
const std::string& IsaGenerator_Gfx72::GetAsicName() {
|
||||
return ASIC_NAME;
|
||||
}
|
||||
@@ -1,49 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _ISAGENERATOR_GFX72_H_
|
||||
#define _ISAGENERATOR_GFX72_H_
|
||||
|
||||
#include <string>
|
||||
#include "IsaGenerator.hpp"
|
||||
|
||||
class IsaGenerator_Gfx72 : public IsaGenerator {
|
||||
public:
|
||||
virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
|
||||
|
||||
protected:
|
||||
virtual const std::string& GetAsicName();
|
||||
|
||||
private:
|
||||
static const std::string ASIC_NAME;
|
||||
|
||||
static const uint32_t NOOP_ISA[];
|
||||
static const uint32_t COPY_DWORD_ISA[];
|
||||
static const uint32_t INFINITE_LOOP_ISA[];
|
||||
static const uint32_t ATOMIC_INC_ISA[];
|
||||
};
|
||||
|
||||
#endif // _ISAGENERATOR_GFX72_H_
|
||||
@@ -1,128 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "IsaGenerator_Gfx8.hpp"
|
||||
|
||||
#include <algorithm>
|
||||
#include <string>
|
||||
|
||||
const std::string IsaGenerator_Gfx8::ASIC_NAME = "VI";
|
||||
|
||||
const uint32_t IsaGenerator_Gfx8::NOOP_ISA[] = {
|
||||
0xbf810000 // S_ENDPGM
|
||||
};
|
||||
|
||||
/** The below arrays are filled with hex values in order not to reference
|
||||
* proprietary header files, but we still leave the code here for future
|
||||
* reference.
|
||||
*/
|
||||
#if 0
|
||||
const uint32_t IsaGenerator_Gfx8::COPY_DWORD_ISA[] = {
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (0 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (0 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v0, s0 (VOP1)
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (1 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (1 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v1, s1 (VOP1)
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (2 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (2 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v2, s2 (VOP1)
|
||||
(63u << SQ_VOP1__ENCODING__SHIFT) | (3 << SQ_VOP1__VDST__SHIFT) | (SQ_V_MOV_B32 << SQ_VOP1__OP__SHIFT) | (3 << SQ_VOP1__SRC0__SHIFT), // v_mov_b32 v3, s3 (VOP1)
|
||||
|
||||
(55u << SQ_FLAT_0__ENCODING__SHIFT) | (SQ_FLAT_LOAD_DWORD << SQ_FLAT_0__OP__SHIFT) | (1 << SQ_FLAT_0__SLC__SHIFT) | (1 << SQ_FLAT_0__GLC__SHIFT)/*(3 << 16)*/, // SQ_FLAT_0, flat_load_dword, slc = 1, glc = 1 (FLAT_0)
|
||||
(4u << SQ_FLAT_1__VDST__SHIFT) | (0 << SQ_FLAT_1__ADDR__SHIFT), // ADDR = V0:V1, VDST = V4 (FLAT_1)
|
||||
|
||||
(383u << SQ_SOPP__ENCODING__SHIFT) | (SQ_S_WAITCNT << SQ_SOPP__OP__SHIFT) | (0 << SQ_SOPP__SIMM16__SHIFT), // s_waitcnt 0 (SOPP)
|
||||
|
||||
(55u << SQ_FLAT_0__ENCODING__SHIFT) | (SQ_FLAT_STORE_DWORD << SQ_FLAT_0__OP__SHIFT) | (1 << SQ_FLAT_0__SLC__SHIFT) | (1 << SQ_FLAT_0__GLC__SHIFT), // SQ_FLAT_0, flat_store_dword, slc = 1, glc = 1 (FLAT_0)
|
||||
(4u << SQ_FLAT_1__DATA__SHIFT) | (2 << SQ_FLAT_1__ADDR__SHIFT), // ADDR = V2:V3, DATA = V4 (FLAT_1)
|
||||
|
||||
0xBF810000u // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx8::INFINITE_LOOP_ISA[] = {
|
||||
(0x17F << SQ_SOPP__ENCODING__SHIFT) | (SQ_S_BRANCH << SQ_SOPP__OP__SHIFT) | ( (const uint32_t)-1 << SQ_SOPP__SIMM16__SHIFT), // s_branch -1 (PC <- PC + SIMM*4)+4
|
||||
0xBF810000u // S_ENDPGM
|
||||
};
|
||||
#endif
|
||||
|
||||
const uint32_t IsaGenerator_Gfx8::COPY_DWORD_ISA[] = {
|
||||
0x7e000200, // v_mov_b32 v0, s0 (VOP1)
|
||||
0x7e020201, // v_mov_b32 v1, s1 (VOP1)
|
||||
0x7e040202, // v_mov_b32 v2, s2 (VOP1)
|
||||
0x7e060203, // v_mov_b32 v3, s3 (VOP1)
|
||||
|
||||
0xdc530000, // SQ_FLAT_0, flat_load_dword, slc = 1, glc = 1 (FLAT_0)
|
||||
0x04000000, // ADDR = V0:V1, VDST = V4 (FLAT_1)
|
||||
|
||||
0xbf8c0000, // s_waitcnt 0 (SOPP)
|
||||
|
||||
0xdc730000, // SQ_FLAT_0, flat_store_dword, slc = 1, glc = 1 (FLAT_0)
|
||||
0x00000402, // ADDR = V2:V3, DATA = V4 (FLAT_1)
|
||||
|
||||
0xbf810000 // s_endpgm, note that we rely on the implicit s_waitcnt 0,0,0
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx8::INFINITE_LOOP_ISA[] = {
|
||||
0xbf82ffff, // s_branch -1 (PC <- PC + SIMM*4)+4
|
||||
0xbf810000 // S_ENDPGM
|
||||
};
|
||||
|
||||
/**
|
||||
* The atomic_add_isa binary is generated from following ISA
|
||||
* The original atomic_inc is not support by some PCIE, so use atomic_add instead
|
||||
*
|
||||
*/
|
||||
/*
|
||||
shader atomic_add
|
||||
asic(VI)
|
||||
type(CS)
|
||||
v_mov_b32 v0, s0
|
||||
v_mov_b32 v1, s1
|
||||
v_mov_b32 v2, 1
|
||||
flat_atomic_add v3, v[0:1], v2 slc glc
|
||||
s_waitcnt 0
|
||||
s_endpgm
|
||||
end
|
||||
*/
|
||||
|
||||
const uint32_t IsaGenerator_Gfx8::ATOMIC_ADD_ISA[] = {
|
||||
0x7e000200, 0x7e020201,
|
||||
0x7e040281, 0xdd0b0000,
|
||||
0x03000200, 0xbf8c0000,
|
||||
0xbf810000, 0x00000000
|
||||
};
|
||||
|
||||
void IsaGenerator_Gfx8::GetNoopIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx8::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx8::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx8::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(ATOMIC_ADD_ISA, ATOMIC_ADD_ISA+ARRAY_SIZE(ATOMIC_ADD_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
const std::string& IsaGenerator_Gfx8::GetAsicName() {
|
||||
return ASIC_NAME;
|
||||
}
|
||||
@@ -1,49 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _ISAGENERATOR_GFX8_H_
|
||||
#define _ISAGENERATOR_GFX8_H_
|
||||
|
||||
#include <string>
|
||||
#include "IsaGenerator.hpp"
|
||||
|
||||
class IsaGenerator_Gfx8 : public IsaGenerator {
|
||||
public:
|
||||
virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
|
||||
|
||||
protected:
|
||||
virtual const std::string& GetAsicName();
|
||||
|
||||
private:
|
||||
static const std::string ASIC_NAME;
|
||||
|
||||
static const uint32_t NOOP_ISA[];
|
||||
static const uint32_t COPY_DWORD_ISA[];
|
||||
static const uint32_t INFINITE_LOOP_ISA[];
|
||||
static const uint32_t ATOMIC_ADD_ISA[];
|
||||
};
|
||||
|
||||
#endif // _ISAGENERATOR_GFX72_H_
|
||||
@@ -1,113 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "IsaGenerator_Gfx9.hpp"
|
||||
|
||||
#include <algorithm>
|
||||
#include <string>
|
||||
|
||||
const std::string IsaGenerator_Gfx9::ASIC_NAME = "GFX9";
|
||||
|
||||
/* The binaries are generated from following ISA */
|
||||
#if 0
|
||||
/* flat_atomic_inc will not support by some PCIE, use flat_atomic_add instead */
|
||||
shader atomic_add
|
||||
asic(GFX9)
|
||||
type(CS)
|
||||
v_mov_b32 v0, s0
|
||||
v_mov_b32 v1, s1
|
||||
v_mov_b32 v2, 1
|
||||
flat_atomic_add v3, v[0:1], v2 slc glc
|
||||
s_waitcnt 0
|
||||
s_endpgm
|
||||
end
|
||||
|
||||
shader copy_dword
|
||||
asic(GFX9)
|
||||
type(CS)
|
||||
/* copy the parameters from scalar registers to vector registers */
|
||||
v_mov_b32 v0, s0
|
||||
v_mov_b32 v1, s1
|
||||
v_mov_b32 v2, s2
|
||||
v_mov_b32 v3, s3
|
||||
/* copy a dword between the passed addresses */
|
||||
flat_load_dword v4, v[0:1] slc glc
|
||||
s_waitcnt 0
|
||||
flat_store_dword v[2:3], v4 slc glc
|
||||
s_endpgm
|
||||
end
|
||||
|
||||
shader main
|
||||
asic(GFX9)
|
||||
type(CS)
|
||||
loop:
|
||||
s_branch loop
|
||||
s_endpgm
|
||||
end
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
const uint32_t IsaGenerator_Gfx9::NOOP_ISA[] = {
|
||||
0xbf810000
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx9::COPY_DWORD_ISA[] = {
|
||||
0x7e000200, 0x7e020201,
|
||||
0x7e040202, 0x7e060203,
|
||||
0xdc530000, 0x047f0000,
|
||||
0xbf8c0000, 0xdc730000,
|
||||
0x007f0402, 0xbf810000
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx9::INFINITE_LOOP_ISA[] = {
|
||||
0xbf82ffff, 0xbf810000
|
||||
};
|
||||
|
||||
const uint32_t IsaGenerator_Gfx9::ATOMIC_ADD_ISA[] = {
|
||||
0x7e000200, 0x7e020201,
|
||||
0x7e040281, 0xdd0b0000,
|
||||
0x037f0200, 0xbf8c0000,
|
||||
0xbf810000, 0x00000000
|
||||
};
|
||||
|
||||
void IsaGenerator_Gfx9::GetNoopIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(NOOP_ISA, NOOP_ISA+ARRAY_SIZE(NOOP_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx9::GetCopyDwordIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(COPY_DWORD_ISA, COPY_DWORD_ISA+ARRAY_SIZE(COPY_DWORD_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx9::GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(INFINITE_LOOP_ISA, INFINITE_LOOP_ISA+ARRAY_SIZE(INFINITE_LOOP_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
void IsaGenerator_Gfx9::GetAtomicIncIsa(HsaMemoryBuffer& rBuf) {
|
||||
std::copy(ATOMIC_ADD_ISA, ATOMIC_ADD_ISA+ARRAY_SIZE(ATOMIC_ADD_ISA), rBuf.As<uint32_t*>());
|
||||
}
|
||||
|
||||
const std::string& IsaGenerator_Gfx9::GetAsicName() {
|
||||
return ASIC_NAME;
|
||||
}
|
||||
|
||||
@@ -1,49 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2014-2018 Advanced Micro Devices, Inc. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _ISAGENERATOR_GFX9_H_
|
||||
#define _ISAGENERATOR_GFX9_H_
|
||||
|
||||
#include <string>
|
||||
#include "IsaGenerator.hpp"
|
||||
|
||||
class IsaGenerator_Gfx9 : public IsaGenerator {
|
||||
public:
|
||||
virtual void GetNoopIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetCopyDwordIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetInfiniteLoopIsa(HsaMemoryBuffer& rBuf);
|
||||
virtual void GetAtomicIncIsa(HsaMemoryBuffer& rBuf);
|
||||
|
||||
protected:
|
||||
virtual const std::string& GetAsicName();
|
||||
|
||||
private:
|
||||
static const std::string ASIC_NAME;
|
||||
|
||||
static const uint32_t NOOP_ISA[];
|
||||
static const uint32_t COPY_DWORD_ISA[];
|
||||
static const uint32_t INFINITE_LOOP_ISA[];
|
||||
static const uint32_t ATOMIC_ADD_ISA[];
|
||||
};
|
||||
|
||||
#endif // _ISAGENERATOR_GFX9_H_
|
||||
Reference in New Issue
Block a user