Add HSA_AMD_AGENT_INFO_COOPERATIVE_COMPUTE_UNIT_COUNT.
On gfx90a only a reduced number of CUs must be used for cooperative dispatches due to CWSR and launcher interactions with asymetric harvest. We must use one fewer CUs per SE than the lowest count of CUs on any SE. Also adds env var HSA_COOP_CU_COUNT which enables the cooperative CU count computation. Set to 1 to enable the new computation. This is an opt-in feature that will become enabled by default (opt-out) in a future release. Change-Id: Ifbb75ced3bbc15876eef44922c6a4f6fde8c4c28
Этот коммит содержится в:
@@ -85,7 +85,7 @@ if (ROCM_CCACHE_BUILD)
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endif() # if (ROCM_CCACHE_BUILD)
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## Get version strings
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get_version ( "1.4.0" )
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get_version ( "1.5.0" )
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if ( ${ROCM_PATCH_VERSION} )
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set ( VERSION_PATCH ${ROCM_PATCH_VERSION})
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endif()
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@@ -1010,6 +1010,17 @@ hsa_status_t GpuAgent::GetInfo(hsa_agent_info_t attribute, void* value) const {
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case HSA_AMD_AGENT_INFO_SVM_DIRECT_HOST_ACCESS:
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assert(regions_.size() != 0 && "No device local memory found!");
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*((bool*)value) = properties_.Capability.ui32.CoherentHostAccess == 1;
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case HSA_AMD_AGENT_INFO_COOPERATIVE_COMPUTE_UNIT_COUNT:
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if (core::Runtime::runtime_singleton_->flag().coop_cu_count() &&
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(isa_->GetMajorVersion() == 9) && (isa_->GetMinorVersion() == 0) &&
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(isa_->GetStepping() == 10)) {
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uint32_t count = 0;
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hsa_status_t err = GetInfo((hsa_agent_info_t)HSA_AMD_AGENT_INFO_COMPUTE_UNIT_COUNT, &count);
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assert(err == HSA_STATUS_SUCCESS && "CU count query failed.");
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*((uint32_t*)value) = (count & 0xFFFFFFF8) - 8; // value = floor(count/8)*8-8
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break;
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}
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return GetInfo((hsa_agent_info_t)HSA_AMD_AGENT_INFO_COMPUTE_UNIT_COUNT, value);
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default:
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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break;
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@@ -148,6 +148,11 @@ class Flag {
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var = os::GetEnvVar("HSA_CU_MASK_SKIP_INIT");
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cu_mask_skip_init_ = (var == "1") ? true : false;
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// Temporary opt-in for corrected HSA_AMD_AGENT_INFO_COOPERATIVE_COMPUTE_UNIT_COUNT behavior.
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// Will become opt-out and possibly removed in future releases.
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var = os::GetEnvVar("HSA_COOP_CU_COUNT");
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coop_cu_count_ = (var == "1") ? true : false;
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}
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void parse_masks(uint32_t maxGpu, uint32_t maxCU) {
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@@ -214,6 +219,8 @@ class Flag {
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bool cu_mask_skip_init() const { return cu_mask_skip_init_; }
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bool coop_cu_count() const { return coop_cu_count_; }
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private:
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bool check_flat_scratch_;
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bool enable_vm_fault_message_;
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@@ -233,6 +240,7 @@ class Flag {
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bool check_sramecc_validity_;
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bool debug_;
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bool cu_mask_skip_init_;
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bool coop_cu_count_;
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SDMA_OVERRIDE enable_sdma_;
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@@ -311,7 +311,13 @@ typedef enum hsa_amd_agent_info_s {
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* physically resident in the agent's local memory.
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* The type of this attribute is bool.
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*/
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HSA_AMD_AGENT_INFO_SVM_DIRECT_HOST_ACCESS = 0xA013
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HSA_AMD_AGENT_INFO_SVM_DIRECT_HOST_ACCESS = 0xA013,
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/**
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* Some processors support more CUs than can reliably be used in a cooperative
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* dispatch. This queries the count of CUs which are fully enabled for
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* cooperative dispatch.
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*/
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HSA_AMD_AGENT_INFO_COOPERATIVE_COMPUTE_UNIT_COUNT = 0xA014
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} hsa_amd_agent_info_t;
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typedef struct hsa_amd_hdp_flush_s {
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