Add H/W debug module
Signed-off-by: Yair Shachar <yair.shachar@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@amd.com> Adjust to new ioctl format Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
This commit is contained in:
Yair Shachar
committed by
Oded Gabbay
Oded Gabbay
parent
f7c3c3bd1b
commit
39f693aec0
+198
-4
@@ -24,6 +24,9 @@
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*/
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#include "libhsakmt.h"
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#include "linux/kfd_ioctl.h"
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#include <stdlib.h>
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#include <string.h>
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HSAKMT_STATUS
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HSAKMTAPI
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@@ -31,22 +34,57 @@ hsaKmtDbgRegister(
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HSAuint32 NodeId //IN
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)
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{
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HSAKMT_STATUS result;
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uint32_t gpu_id;
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CHECK_KFD_OPEN();
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return HSAKMT_STATUS_NOT_SUPPORTED;
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result = validate_nodeid(NodeId, &gpu_id);
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if (result != HSAKMT_STATUS_SUCCESS)
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return result;
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struct kfd_ioctl_dbg_register_args args;
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memset(&args, 0, sizeof(args));
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args.gpu_id = gpu_id;
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long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_REGISTER, &args);
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if (err == 0)
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result = HSAKMT_STATUS_SUCCESS;
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else
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result = HSAKMT_STATUS_ERROR;
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return (result);
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}
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/* =============================================================================== */
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HSAKMT_STATUS
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HSAKMTAPI
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hsaKmtDbgUnregister(
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HSAuint32 NodeId //IN
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)
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{
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HSAKMT_STATUS result;
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uint32_t gpu_id;
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CHECK_KFD_OPEN();
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return HSAKMT_STATUS_NOT_SUPPORTED;
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result = validate_nodeid(NodeId, &gpu_id);
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if (result != HSAKMT_STATUS_SUCCESS)
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return result;
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struct kfd_ioctl_dbg_unregister_args args;
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memset(&args, 0, sizeof(args));
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args.gpu_id = gpu_id;
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long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_UNREGISTER, &args);
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if (err == 0)
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result = HSAKMT_STATUS_SUCCESS;
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else
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result = HSAKMT_STATUS_ERROR;
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return (result);
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}
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/* =============================================================================== */
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HSAKMT_STATUS
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HSAKMTAPI
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hsaKmtDbgWavefrontControl(
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@@ -57,11 +95,74 @@ hsaKmtDbgWavefrontControl(
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HsaDbgWaveMessage* DbgWaveMsgRing //IN (? - see thunk API doc!)
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)
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{
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HSAKMT_STATUS result;
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uint32_t gpu_id;
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struct kfd_ioctl_dbg_wave_control_args *args;
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CHECK_KFD_OPEN();
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return HSAKMT_STATUS_NOT_SUPPORTED;
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result = validate_nodeid(NodeId, &gpu_id);
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if (result != HSAKMT_STATUS_SUCCESS)
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return result;
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/* Determine Size of the ioctl buffer */
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uint32_t buff_size = sizeof(Operand)+
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sizeof(Mode) + sizeof(TrapId) +
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sizeof(DbgWaveMsgRing->DbgWaveMsg)+ sizeof(DbgWaveMsgRing->MemoryVA) + sizeof(*args);
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args = (struct kfd_ioctl_dbg_wave_control_args*) malloc(buff_size);
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if (args == NULL)
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{
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return HSAKMT_STATUS_ERROR;
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}
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memset(args, 0, buff_size);
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args->gpu_id = gpu_id;
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args->buf_size_in_bytes = buff_size;
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/* increment pointer to the start of the non fixed part */
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unsigned char* run_ptr = (unsigned char*)args + sizeof(*args);
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/* insert items, and increment pointer accordingly */
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*((HSA_DBG_WAVEOP*)run_ptr) = Operand;
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run_ptr += sizeof(Operand);
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*((HSA_DBG_WAVEMODE*)run_ptr) = Mode;
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run_ptr += sizeof(Mode);
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*((HSAuint32*)run_ptr) = TrapId;
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run_ptr += sizeof(TrapId);
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*((HsaDbgWaveMessageAMD*)run_ptr) = DbgWaveMsgRing->DbgWaveMsg;
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run_ptr += sizeof(DbgWaveMsgRing->DbgWaveMsg);
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*((void**)run_ptr) = DbgWaveMsgRing->MemoryVA;
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run_ptr += sizeof(DbgWaveMsgRing->MemoryVA);
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/* send to kernel */
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long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_WAVE_CONTROL, args);
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free (args);
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if (err == 0)
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return HSAKMT_STATUS_SUCCESS;
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else
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return HSAKMT_STATUS_ERROR;
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}
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/* =============================================================================== */
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HSAKMT_STATUS
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HSAKMTAPI
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hsaKmtDbgAddressWatch(
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@@ -73,7 +174,100 @@ hsaKmtDbgAddressWatch(
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HsaEvent* WatchEvent[] //IN, optional
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)
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{
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HSAKMT_STATUS result;
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uint32_t gpu_id;
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/* determine the size of the watch mask and event buffers
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* the value is NULL if and only if no vector data should be attached
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*
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*/
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uint32_t watch_mask_items = WatchMask[0] > 0 ? NumWatchPoints:1;
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uint32_t watch_event_items = WatchEvent != NULL ? NumWatchPoints:0;
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struct kfd_ioctl_dbg_address_watch_args *args;
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HSAuint32 i = 0;
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CHECK_KFD_OPEN();
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return HSAKMT_STATUS_NOT_SUPPORTED;
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result = validate_nodeid(NodeId, &gpu_id);
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if (result != HSAKMT_STATUS_SUCCESS)
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return result;
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if (NumWatchPoints > MAX_ALLOWED_NUM_POINTS)
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return HSAKMT_STATUS_INVALID_PARAMETER;
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/* Size and structure of the ioctl buffer is dynamic in this case
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* Here we calculate the buff size.
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*/
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uint32_t buff_size =sizeof(NumWatchPoints)+
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( sizeof(WatchMode[0]) +
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sizeof(WatchAddress[0]))*NumWatchPoints +
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watch_mask_items*sizeof(HSAuint64) +
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watch_event_items*sizeof(HsaEvent*)+
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sizeof(*args);
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args = (struct kfd_ioctl_dbg_address_watch_args*) malloc(buff_size);
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if (args == NULL)
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{
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return HSAKMT_STATUS_ERROR;
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}
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memset(args, 0, buff_size);
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args->gpu_id = gpu_id;
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args->buf_size_in_bytes = buff_size;
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/* increment pointer to the start of the non fixed part */
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unsigned char* run_ptr = (unsigned char*)args + sizeof(*args);
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/* insert items, and increment pointer accordingly */
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*((HSAuint32*)run_ptr) = NumWatchPoints;
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run_ptr += sizeof(NumWatchPoints);
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for (i=0; i < NumWatchPoints; i++)
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{
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*((HSA_DBG_WATCH_MODE*)run_ptr) = WatchMode[i];
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run_ptr += sizeof(WatchMode[i]);
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}
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for (i=0; i < NumWatchPoints; i++)
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{
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*((void**)run_ptr) = WatchAddress[i];
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run_ptr += sizeof(WatchAddress[i]);
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}
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for (i=0; i < watch_mask_items; i++)
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{
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*((HSAuint64*)run_ptr) = WatchMask[i];
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run_ptr += sizeof(WatchMask[i]);
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}
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for (i=0; i < watch_event_items; i++)
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{
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*((HsaEvent**)run_ptr) = WatchEvent[i];
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run_ptr += sizeof(WatchEvent[i]);
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}
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/* send to kernel */
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long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_ADDRESS_WATCH, args);
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free (args);
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if (err == 0)
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{
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return HSAKMT_STATUS_SUCCESS;
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}
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else
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{
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return HSAKMT_STATUS_ERROR;
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}
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}
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/* =============================================================================== */
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