P4 to Git Change 2038311 by vsytchen@vsytchen-ocl-win10-2 on 2019/11/28 15:39:44

SWDEV-193973 - Enable Navi21 for mainline builds

	ReviewBoardURL = http://ocltc.amd.com/reviews/r/18326/diff/

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palbedefs#59 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palcounters.cpp#26 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldefs.hpp#66 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldevice.cpp#178 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palresource.cpp#82 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palsettings.cpp#107 edit

rocclr/runtime/device/pal/palcounters.cpp

@@ -138,11 +138,7 @@ bool PalCounterReference::finalize() {
   }
 }
 
-#if !IS_MAINLINE && (PAL_CLIENT_INTERFACE_MAJOR_VERSION >= 543)
 static const std::array<PCIndexSelect, 49> blockIdToIndexSelect = {{
-#else
-static const std::array<PCIndexSelect, 46> blockIdToIndexSelect = {{
-#endif
     PCIndexSelect::None,                     // CPF
     PCIndexSelect::ShaderEngine,             // IA
     PCIndexSelect::ShaderEngine,             // VGT
@@ -189,11 +185,9 @@ static const std::array<PCIndexSelect, 46> blockIdToIndexSelect = {{
     PCIndexSelect::None,                     // GCR
     PCIndexSelect::None,                     // PH
     PCIndexSelect::ShaderArray,              // UTCL1
-#if !IS_MAINLINE && PAL_CLIENT_INTERFACE_MAJOR_VERSION >= 543
     PCIndexSelect::None,                     // GeDist
     PCIndexSelect::ShaderEngine,             // GeSe
     PCIndexSelect::None,                     // Df
-#endif
 }};
 
 static_assert(blockIdToIndexSelect.size() ==  static_cast<size_t>(Pal::GpuBlock::Count), "size of blockIdToIndexSelect does not match GpuBlock::Count");
@@ -680,6 +674,7 @@ void PerfCounter::convertInfo() {
       }
       break;
     case Pal::GfxIpLevel::GfxIp10_1:
+    case Pal::GfxIpLevel::GfxIp10_3:
       if (info_.blockIndex_ < gfx10BlockIdPal.size()) {
         auto p = gfx10BlockIdPal[info_.blockIndex_];
         info_.blockIndex_ = std::get<0>(p);

rocclr/runtime/device/pal/paldevice.cpp

@@ -181,7 +181,7 @@ bool NullDevice::init() {
             ShouldNotReachHere();
             break;
           case 3:
-            ShouldNotReachHere();
+            ipLevel = Pal::GfxIpLevel::GfxIp10_3;
             break;
           case 4:
             ShouldNotReachHere();

rocclr/runtime/device/pal/palresource.cpp

@@ -450,7 +450,6 @@ void Resource::memTypeToHeap(Pal::GpuMemoryCreateInfo* createInfo) {
       break;
   }
 
-#if !IS_MAINLINE
   // Pick the appropriate mall policy based on the mem type
   switch (memoryType()) {
     case Local:
@@ -461,7 +460,6 @@ void Resource::memTypeToHeap(Pal::GpuMemoryCreateInfo* createInfo) {
       createInfo->mallPolicy = Pal::GpuMemMallPolicy::Never;
       break;
   }
-#endif
 }
 
 // ================================================================================================
@@ -1934,7 +1932,8 @@ bool MemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved_va) {
   createInfo.priority = Pal::GpuMemPriority::Normal;
   createInfo.heapCount = 1;
   createInfo.heaps[0] = Pal::GpuHeapInvisible;
-  createInfo.flags.peerWritable = device_->P2PAccessAllowed();.mallPolicy_);)
+  createInfo.flags.peerWritable = device_->P2PAccessAllowed();
+  createInfo.mallPolicy = static_cast<Pal::GpuMemMallPolicy>(device_->settings().mallPolicy_);
   GpuMemoryReference* mem_ref = GpuMemoryReference::Create(*device_, createInfo);
   if (mem_ref != nullptr) {
     return InitAllocator(mem_ref);
@@ -1953,7 +1952,8 @@ bool CoarseMemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved_va) {
   createInfo.pReservedGpuVaOwner = reserved_va;
   createInfo.heapCount = 2;
   createInfo.heaps[0] = Pal::GpuHeapInvisible;
-  createInfo.heaps[1] = Pal::GpuHeapLocal;.mallPolicy_);)
+  createInfo.heaps[1] = Pal::GpuHeapLocal;
+  createInfo.mallPolicy = static_cast<Pal::GpuMemMallPolicy>(device_->settings().mallPolicy_);
   GpuMemoryReference* mem_ref = GpuMemoryReference::Create(*device_, createInfo);
   if (mem_ref != nullptr) {
     return InitAllocator(mem_ref);
@@ -1969,6 +1969,7 @@ bool FineMemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved_va) {
   createInfo.alignment = MaxGpuAlignment;
   createInfo.flags.useReservedGpuVa = (reserved_va != nullptr);
   createInfo.pReservedGpuVaOwner = reserved_va;
+  createInfo.mallPolicy = Pal::GpuMemMallPolicy::Never;
   GpuMemoryReference* mem_ref = GpuMemoryReference::Create(*device_, createInfo);
   if ((mem_ref != nullptr) && InitAllocator(mem_ref)) {
     mem_ref->iMem()->Map(&mem_ref->cpuAddress_);

rocclr/runtime/device/pal/palsettings.cpp

@@ -186,7 +186,7 @@ bool Settings::create(const Pal::DeviceProperties& palProp,
   }
 
   switch (palProp.revision) {
-    case Pal::AsicRevision::Navi14:
+        case Pal::AsicRevision::Navi14:
     case Pal::AsicRevision::Navi12:
     case Pal::AsicRevision::Navi10:
     case Pal::AsicRevision::Navi10_A0:
@@ -476,6 +476,7 @@ bool Settings::create(const Pal::DeviceProperties& palProp,
 
   if (useLightning_) {
     switch (palProp.gfxLevel) {
+      case Pal::GfxIpLevel::GfxIp10_3:
       case Pal::GfxIpLevel::GfxIp10_1:
       case Pal::GfxIpLevel::GfxIp9:
         singleFpDenorm_ = true;