Revise PCI BW numbers on Rome

[ROCm/rccl commit: d2adc61bf6]
This commit is contained in:
Wenkai Du
2020-02-26 13:13:43 -08:00
parent a11aba0bfa
commit 45a7541582
2 changed files with 4 additions and 4 deletions
+3 -3
View File
@@ -21,9 +21,9 @@
#define SKL_CPUPCI_WIDTH 12
#define P9_WIDTH 32
#define NET_WIDTH 12 // 100Gbit
#define ROME_QPI_WIDTH 24
#define ROME_PCI_WIDTH 24
#define ROME_CPUPCI_WIDTH 24
#define ROME_QPI_WIDTH 18
#define ROME_PCI_WIDTH 18
#define ROME_CPUPCI_WIDTH 18
// Intel CPU convert GPU P2P traffic into 64B PCI TLPs, to GPU
// to GPU traffic consumed more PCI bandwidth.
+1 -1
View File
@@ -106,7 +106,7 @@ int main(int argc,char* argv[])
NetDevices nic_2(2, netPciPaths_2, netGuids_2, netPciNumaIds_2);
// CPU, GPU and NIC devices on Rome
CpuDevices rome("Rome", 24, 24, 24);
CpuDevices rome("Rome", 18, 18, 18);
GpuDevices vg20_pcie_rome(8, rome_busIds_8, rome_gpuPciPaths_8, rome_gpuPciNumaIds_8, conn_mat_rome);
NetDevices nic_1_rome(1, rome_netPciPaths_1, rome_netGuids_1, rom_netPciNumaIds_1);
NetDevices nic_2_rome(2, rome_netPciPaths_2, rome_netGuids_2, rom_netPciNumaIds_2);