Align list and cache_info to Host
Signed-off-by: Maisam Arif <maisarif@amd.com>
Change-Id: I4fa55b360b74d5a202d0b9b4eb7aee660b0a1bcf
[ROCm/amdsmi commit: 77710921a4]
This commit is contained in:
committed by
Chiranjeevi Pattigidi
vanhempi
57419ff3cc
commit
4728d05c5f
@@ -152,10 +152,10 @@ class AMDSMICommands():
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# Store values based on format
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if self.logger.is_human_readable_format():
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self.logger.store_output(args.gpu, 'AMDSMI_SPACING_REMOVAL', {'bdf':bdf, 'uuid':uuid})
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self.logger.store_output(args.gpu, 'AMDSMI_SPACING_REMOVAL', {'gpu_bdf':bdf, 'gpu_uuid':uuid})
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else:
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self.logger.store_output(args.gpu, 'bdf', bdf)
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self.logger.store_output(args.gpu, 'uuid', uuid)
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self.logger.store_output(args.gpu, 'gpu_bdf', bdf)
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self.logger.store_output(args.gpu, 'gpu_uuid', uuid)
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if multiple_devices:
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self.logger.store_multiple_device_output()
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@@ -550,21 +550,32 @@ class AMDSMICommands():
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static_dict['vram'] = vram_info
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if args.cache:
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try:
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cache_info = amdsmi_interface.amdsmi_get_gpu_cache_info(args.gpu)
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logging.debug(f"cache_info dictionary = {cache_info}")
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cach_info_list = amdsmi_interface.amdsmi_get_gpu_cache_info(args.gpu)
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logging.debug(f"cache_info dictionary = {cach_info_list}")
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if self.logger.is_human_readable_format():
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for key, cache_values in cache_info.items():
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cache_values['cache_size'] = f"{cache_values['cache_size']} KB"
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cache_info_dict_format = {}
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for cache_dict in cach_info_list:
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cache_index = "cache_" + str(cache_dict["cache"])
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cache_info_dict_format[cache_index] = cache_dict
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# Remove cache index from new dictionary
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cache_info_dict_format[cache_index].pop("cache")
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# Add cache_size unit
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cache_info_dict_format[cache_index]["cache_size"] = f"{cache_info_dict_format[cache_index]['cache_size']} KB"
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# take cache_properties out of list -> display as string, removing brackets
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cache_values['cache_properties'] = ", ".join(cache_values['cache_properties'])
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logging.debug(f"After human_readable | cache_info = {cache_info}")
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cache_info_dict_format[cache_index]["cache_properties"] = ", ".join(cache_info_dict_format[cache_index]["cache_properties"])
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cach_info_list = cache_info_dict_format
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logging.debug(f"After human_readable | cache_info = {cach_info_list}")
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except amdsmi_exception.AmdSmiLibraryException as e:
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cache_info = "N/A"
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cach_info_list = "N/A"
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logging.debug("Failed to get cache info for gpu %s | %s", gpu_id, e.get_error_info())
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static_dict['cache'] = cache_info
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static_dict['cache_info'] = cach_info_list
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if 'ras' in current_platform_args:
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if args.ras:
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ras_dict = {"eeprom_version": "N/A",
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@@ -323,7 +323,7 @@ int main() {
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printf("\tCache Level: %d, Cache Size: %d KB, Cache type: 0x%x\n",
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cache_info.cache[i].cache_level,
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cache_info.cache[i].cache_size,
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cache_info.cache[i].properties);
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cache_info.cache[i].cache_properties);
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printf("\tMax number CU shared: %d, Number of instances: %d\n",
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cache_info.cache[i].max_num_cu_shared,
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cache_info.cache[i].num_cache_instance);
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@@ -541,19 +541,19 @@ typedef struct {
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* @brief cache properties
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*/
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typedef enum {
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CACHE_PROPERTIES_ENABLED = 0x00000001,
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CACHE_PROPERTIES_DATA_CACHE = 0x00000002,
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CACHE_PROPERTIES_INST_CACHE = 0x00000004,
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CACHE_PROPERTIES_CPU_CACHE = 0x00000008,
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CACHE_PROPERTIES_SIMD_CACHE = 0x00000010,
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AMDSMI_CACHE_PROPERTIES_ENABLED = 0x00000001,
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AMDSMI_CACHE_PROPERTIES_DATA_CACHE = 0x00000002,
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AMDSMI_CACHE_PROPERTIES_INST_CACHE = 0x00000004,
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AMDSMI_CACHE_PROPERTIES_CPU_CACHE = 0x00000008,
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AMDSMI_CACHE_PROPERTIES_SIMD_CACHE = 0x00000010,
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} amdsmi_cache_properties_type_t;
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typedef struct {
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uint32_t num_cache_types;
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struct cache_ {
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uint32_t cache_properties; // amdsmi_cache_properties_type_t which is a bitmask
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uint32_t cache_size; /* In KB */
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uint32_t cache_level;
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uint32_t properties; // amdsmi_cache_properties_type_t which is a bitmask
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uint32_t max_num_cu_shared; /* Indicates how many Compute Units share this cache instance */
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uint32_t num_cache_instance; /* total number of instance of this cache type */
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uint32_t reserved[3];
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@@ -465,32 +465,33 @@ except AmdSmiException as e:
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### amdsmi_get_gpu_cache_info
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Description: Returns dictionary of cache information for the given GPU.
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Description: Returns a list of dictionaries containing cache information for the given GPU.
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Input parameters:
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* `processor_handle` device which to query
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Output: Dictionary of Dictionaries containing cache information
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Schema: { cache_index:
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{
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cache_properties:
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{
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"type": "array",
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"items": {
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"type": "string"
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}
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},
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cache_size: {"type" : "number"},
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cache_level: {"type" : "number"},
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max_num_cu_shared: {"type" : "number"},
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num_cache_instance: {"type" : "number"}
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}
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}
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Output: List of Dictionaries containing cache information following the schema below:
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Schema:
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```JSON
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{
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cache: {"type" : "number"},
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cache_properties:
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{
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"type" : "array",
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"items" : {"type" : "string"}
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},
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cache_size: {"type" : "number"},
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cache_level: {"type" : "number"},
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max_num_cu_shared: {"type" : "number"},
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num_cache_instance: {"type" : "number"}
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}
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```
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Field | Description
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---|---
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`cache_index` | cache index is a string of format "cache_#" up to 10 caches will be available
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`cache` | cache index from 0-9
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`cache_properties` | list of up to 4 cache property type strings. Ex. data ("DATA_CACHE"), instruction ("INST_CACHE"), CPU ("CPU_CACHE"), or SIMD ("SIMD_CACHE").
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`cache_size` | size of cache in KB
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`cache_level` | level of cache
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@@ -1652,51 +1652,52 @@ def amdsmi_get_gpu_vram_info(
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def amdsmi_get_gpu_cache_info(
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processor_handle: amdsmi_wrapper.amdsmi_processor_handle,
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) -> Dict[str, Dict[str, Any]]:
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) -> List[Dict[str, Any]]:
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if not isinstance(processor_handle, amdsmi_wrapper.amdsmi_processor_handle):
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raise AmdSmiParameterException(
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processor_handle, amdsmi_wrapper.amdsmi_processor_handle
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)
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cache_info = amdsmi_wrapper.amdsmi_gpu_cache_info_t()
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cache_info_struct = amdsmi_wrapper.amdsmi_gpu_cache_info_t()
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_check_res(
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amdsmi_wrapper.amdsmi_get_gpu_cache_info(
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processor_handle, ctypes.byref(cache_info))
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processor_handle, ctypes.byref(cache_info_struct))
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)
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cache_info_dict = {}
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for cache_index in range(cache_info.num_cache_types):
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cache_info_list = []
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for cache_index in range(cache_info_struct.num_cache_types):
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# Put cache_properties at the start of the dictionary for readability
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cache_dict = {
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"cache_properties": [],
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"cache_size": cache_info.cache[cache_index].cache_size,
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"cache_level": cache_info.cache[cache_index].cache_level,
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"max_num_cu_shared": cache_info.cache[cache_index].max_num_cu_shared,
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"num_cache_instance": cache_info.cache[cache_index].num_cache_instance
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"cache": cache_index,
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"cache_properties": [], # This will be a list of strings
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"cache_size": cache_info_struct.cache[cache_index].cache_size,
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"cache_level": cache_info_struct.cache[cache_index].cache_level,
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"max_num_cu_shared": cache_info_struct.cache[cache_index].max_num_cu_shared,
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"num_cache_instance": cache_info_struct.cache[cache_index].num_cache_instance
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}
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# Check against cache properties bitmask
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cache_properties = cache_info.cache[cache_index].properties
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data_cache = cache_properties & amdsmi_wrapper.CACHE_PROPERTIES_DATA_CACHE
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inst_cache = cache_properties & amdsmi_wrapper.CACHE_PROPERTIES_INST_CACHE
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cpu_cache = cache_properties & amdsmi_wrapper.CACHE_PROPERTIES_CPU_CACHE
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simd_cache = cache_properties & amdsmi_wrapper.CACHE_PROPERTIES_SIMD_CACHE
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cache_properties = cache_info_struct.cache[cache_index].cache_properties
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data_cache = cache_properties & amdsmi_wrapper.AMDSMI_CACHE_PROPERTIES_DATA_CACHE
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inst_cache = cache_properties & amdsmi_wrapper.AMDSMI_CACHE_PROPERTIES_INST_CACHE
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cpu_cache = cache_properties & amdsmi_wrapper.AMDSMI_CACHE_PROPERTIES_CPU_CACHE
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simd_cache = cache_properties & amdsmi_wrapper.AMDSMI_CACHE_PROPERTIES_SIMD_CACHE
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cache_properties_status = [data_cache, inst_cache, cpu_cache, simd_cache]
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cache_property_list = []
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for cache_property in cache_properties_status:
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if cache_property:
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property_name = amdsmi_wrapper.amdsmi_cache_properties_type_t__enumvalues[cache_property]
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property_name = property_name.replace("CACHE_PROPERTIES_", "")
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property_name = property_name.replace("AMDSMI_CACHE_PROPERTIES_", "")
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cache_property_list.append(property_name)
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cache_dict["cache_properties"] = cache_property_list
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cache_info_dict[f"cache_{cache_index}"] = cache_dict
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cache_info_list.append(cache_dict)
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if not cache_info_dict:
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if not cache_info_list:
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raise AmdSmiLibraryException(amdsmi_wrapper.AMDSMI_STATUS_NO_DATA)
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return cache_info_dict
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return cache_info_list
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def amdsmi_get_gpu_vbios_info(
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@@ -815,17 +815,17 @@ amdsmi_vbios_info_t = struct_amdsmi_vbios_info_t
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# values for enumeration 'amdsmi_cache_properties_type_t'
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amdsmi_cache_properties_type_t__enumvalues = {
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1: 'CACHE_PROPERTIES_ENABLED',
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2: 'CACHE_PROPERTIES_DATA_CACHE',
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4: 'CACHE_PROPERTIES_INST_CACHE',
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8: 'CACHE_PROPERTIES_CPU_CACHE',
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16: 'CACHE_PROPERTIES_SIMD_CACHE',
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1: 'AMDSMI_CACHE_PROPERTIES_ENABLED',
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2: 'AMDSMI_CACHE_PROPERTIES_DATA_CACHE',
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4: 'AMDSMI_CACHE_PROPERTIES_INST_CACHE',
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8: 'AMDSMI_CACHE_PROPERTIES_CPU_CACHE',
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16: 'AMDSMI_CACHE_PROPERTIES_SIMD_CACHE',
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}
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CACHE_PROPERTIES_ENABLED = 1
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CACHE_PROPERTIES_DATA_CACHE = 2
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CACHE_PROPERTIES_INST_CACHE = 4
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CACHE_PROPERTIES_CPU_CACHE = 8
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CACHE_PROPERTIES_SIMD_CACHE = 16
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AMDSMI_CACHE_PROPERTIES_ENABLED = 1
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AMDSMI_CACHE_PROPERTIES_DATA_CACHE = 2
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AMDSMI_CACHE_PROPERTIES_INST_CACHE = 4
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AMDSMI_CACHE_PROPERTIES_CPU_CACHE = 8
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AMDSMI_CACHE_PROPERTIES_SIMD_CACHE = 16
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amdsmi_cache_properties_type_t = ctypes.c_uint32 # enum
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class struct_amdsmi_gpu_cache_info_t(Structure):
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pass
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@@ -835,9 +835,9 @@ class struct_cache_(Structure):
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struct_cache_._pack_ = 1 # source:False
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struct_cache_._fields_ = [
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('cache_properties', ctypes.c_uint32),
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('cache_size', ctypes.c_uint32),
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('cache_level', ctypes.c_uint32),
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('properties', ctypes.c_uint32),
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('max_num_cu_shared', ctypes.c_uint32),
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('num_cache_instance', ctypes.c_uint32),
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('reserved', ctypes.c_uint32 * 3),
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@@ -2308,6 +2308,11 @@ amdsmi_get_esmi_err_msg.restype = amdsmi_status_t
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amdsmi_get_esmi_err_msg.argtypes = [amdsmi_status_t, ctypes.POINTER(ctypes.POINTER(ctypes.c_char))]
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__all__ = \
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['AGG_BW0', 'AMDSMI_ARG_PTR_NULL', 'AMDSMI_AVERAGE_POWER',
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'AMDSMI_CACHE_PROPERTIES_CPU_CACHE',
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'AMDSMI_CACHE_PROPERTIES_DATA_CACHE',
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'AMDSMI_CACHE_PROPERTIES_ENABLED',
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'AMDSMI_CACHE_PROPERTIES_INST_CACHE',
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'AMDSMI_CACHE_PROPERTIES_SIMD_CACHE',
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'AMDSMI_CARD_FORM_FACTOR_OAM', 'AMDSMI_CARD_FORM_FACTOR_PCIE',
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'AMDSMI_CARD_FORM_FACTOR_UNKNOWN', 'AMDSMI_CNTR_CMD_START',
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'AMDSMI_CNTR_CMD_STOP', 'AMDSMI_COARSE_GRAIN_GFX_ACTIVITY',
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@@ -2424,29 +2429,27 @@ __all__ = \
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'AMDSMI_VRAM_VENDOR__WINBOND', 'AMDSMI_XGMI_STATUS_ERROR',
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'AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS',
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'AMDSMI_XGMI_STATUS_NO_ERRORS', 'AMD_APU', 'AMD_CPU',
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'AMD_CPU_CORE', 'AMD_GPU', 'CACHE_PROPERTIES_CPU_CACHE',
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'CACHE_PROPERTIES_DATA_CACHE', 'CACHE_PROPERTIES_ENABLED',
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'CACHE_PROPERTIES_INST_CACHE', 'CACHE_PROPERTIES_SIMD_CACHE',
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'CLK_TYPE_DCEF', 'CLK_TYPE_DCLK0', 'CLK_TYPE_DCLK1',
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'CLK_TYPE_DF', 'CLK_TYPE_FIRST', 'CLK_TYPE_GFX', 'CLK_TYPE_MEM',
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'CLK_TYPE_PCIE', 'CLK_TYPE_SOC', 'CLK_TYPE_SYS', 'CLK_TYPE_VCLK0',
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'CLK_TYPE_VCLK1', 'CLK_TYPE__MAX', 'COMPUTE_PARTITION_CPX',
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'COMPUTE_PARTITION_DPX', 'COMPUTE_PARTITION_INVALID',
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'COMPUTE_PARTITION_QPX', 'COMPUTE_PARTITION_SPX',
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'COMPUTE_PARTITION_TPX', 'CONTAINER_DOCKER', 'CONTAINER_LXC',
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'FW_ID_ASD', 'FW_ID_CP_CE', 'FW_ID_CP_ME', 'FW_ID_CP_MEC1',
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'FW_ID_CP_MEC2', 'FW_ID_CP_MEC_JT1', 'FW_ID_CP_MEC_JT2',
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'FW_ID_CP_MES', 'FW_ID_CP_PFP', 'FW_ID_CP_PM4', 'FW_ID_DFC',
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'FW_ID_DMCU', 'FW_ID_DMCU_ERAM', 'FW_ID_DMCU_ISR',
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'FW_ID_DRV_CAP', 'FW_ID_FIRST', 'FW_ID_IMU_DRAM',
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'FW_ID_IMU_IRAM', 'FW_ID_ISP', 'FW_ID_MC', 'FW_ID_MES_KIQ',
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'FW_ID_MES_STACK', 'FW_ID_MES_THREAD1', 'FW_ID_MES_THREAD1_STACK',
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'FW_ID_MMSCH', 'FW_ID_PM', 'FW_ID_PPTABLE', 'FW_ID_PSP_BL',
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'FW_ID_PSP_DBG', 'FW_ID_PSP_INTF', 'FW_ID_PSP_KEYDB',
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'FW_ID_PSP_SOC', 'FW_ID_PSP_SOSDRV', 'FW_ID_PSP_SPL',
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'FW_ID_PSP_SYSDRV', 'FW_ID_PSP_TOC', 'FW_ID_REG_ACCESS_WHITELIST',
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'FW_ID_RLC', 'FW_ID_RLCV_LX7', 'FW_ID_RLC_P',
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'FW_ID_RLC_RESTORE_LIST_CNTL', 'FW_ID_RLC_RESTORE_LIST_GPM_MEM',
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'AMD_CPU_CORE', 'AMD_GPU', 'CLK_TYPE_DCEF', 'CLK_TYPE_DCLK0',
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'CLK_TYPE_DCLK1', 'CLK_TYPE_DF', 'CLK_TYPE_FIRST', 'CLK_TYPE_GFX',
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'CLK_TYPE_MEM', 'CLK_TYPE_PCIE', 'CLK_TYPE_SOC', 'CLK_TYPE_SYS',
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'CLK_TYPE_VCLK0', 'CLK_TYPE_VCLK1', 'CLK_TYPE__MAX',
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'COMPUTE_PARTITION_CPX', 'COMPUTE_PARTITION_DPX',
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'COMPUTE_PARTITION_INVALID', 'COMPUTE_PARTITION_QPX',
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'COMPUTE_PARTITION_SPX', 'COMPUTE_PARTITION_TPX',
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'CONTAINER_DOCKER', 'CONTAINER_LXC', 'FW_ID_ASD', 'FW_ID_CP_CE',
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'FW_ID_CP_ME', 'FW_ID_CP_MEC1', 'FW_ID_CP_MEC2',
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'FW_ID_CP_MEC_JT1', 'FW_ID_CP_MEC_JT2', 'FW_ID_CP_MES',
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'FW_ID_CP_PFP', 'FW_ID_CP_PM4', 'FW_ID_DFC', 'FW_ID_DMCU',
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'FW_ID_DMCU_ERAM', 'FW_ID_DMCU_ISR', 'FW_ID_DRV_CAP',
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'FW_ID_FIRST', 'FW_ID_IMU_DRAM', 'FW_ID_IMU_IRAM', 'FW_ID_ISP',
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'FW_ID_MC', 'FW_ID_MES_KIQ', 'FW_ID_MES_STACK',
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'FW_ID_MES_THREAD1', 'FW_ID_MES_THREAD1_STACK', 'FW_ID_MMSCH',
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'FW_ID_PM', 'FW_ID_PPTABLE', 'FW_ID_PSP_BL', 'FW_ID_PSP_DBG',
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'FW_ID_PSP_INTF', 'FW_ID_PSP_KEYDB', 'FW_ID_PSP_SOC',
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'FW_ID_PSP_SOSDRV', 'FW_ID_PSP_SPL', 'FW_ID_PSP_SYSDRV',
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'FW_ID_PSP_TOC', 'FW_ID_REG_ACCESS_WHITELIST', 'FW_ID_RLC',
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'FW_ID_RLCV_LX7', 'FW_ID_RLC_P', 'FW_ID_RLC_RESTORE_LIST_CNTL',
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'FW_ID_RLC_RESTORE_LIST_GPM_MEM',
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'FW_ID_RLC_RESTORE_LIST_SRM_MEM', 'FW_ID_RLC_SAVE_RESTORE_LIST',
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'FW_ID_RLC_SRLG', 'FW_ID_RLC_SRLS', 'FW_ID_RLC_V', 'FW_ID_RLX6',
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'FW_ID_RLX6_CORE1', 'FW_ID_RLX6_DRAM_BOOT',
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@@ -445,20 +445,21 @@ amdsmi_status_t amdsmi_get_gpu_cache_info(
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info->num_cache_types = rsmi_info.num_cache_types;
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for (unsigned int i =0; i < rsmi_info.num_cache_types; i++) {
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// convert from sysfs type to CRAT type(HSA Cache Affinity type)
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info->cache[i].cache_properties = 0;
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if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_DATA)
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info->cache[i].cache_properties |= AMDSMI_CACHE_PROPERTIES_DATA_CACHE;
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if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_INSTRUCTION)
|
||||
info->cache[i].cache_properties |= AMDSMI_CACHE_PROPERTIES_INST_CACHE;
|
||||
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_CPU)
|
||||
info->cache[i].cache_properties |= AMDSMI_CACHE_PROPERTIES_CPU_CACHE;
|
||||
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_HSACU)
|
||||
info->cache[i].cache_properties |= AMDSMI_CACHE_PROPERTIES_SIMD_CACHE;
|
||||
|
||||
info->cache[i].cache_size = rsmi_info.cache[i].cache_size_kb;
|
||||
info->cache[i].cache_level = rsmi_info.cache[i].cache_level;
|
||||
info->cache[i].max_num_cu_shared = rsmi_info.cache[i].max_num_cu_shared;
|
||||
info->cache[i].num_cache_instance = rsmi_info.cache[i].num_cache_instance;
|
||||
// convert from sysfs type to CRAT type(HSA Cache Affinity type)
|
||||
info->cache[i].properties = 0;
|
||||
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_DATA)
|
||||
info->cache[i].properties |= CACHE_PROPERTIES_DATA_CACHE;
|
||||
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_INSTRUCTION)
|
||||
info->cache[i].properties |= CACHE_PROPERTIES_INST_CACHE;
|
||||
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_CPU)
|
||||
info->cache[i].properties |= CACHE_PROPERTIES_CPU_CACHE;
|
||||
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_HSACU)
|
||||
info->cache[i].properties |= CACHE_PROPERTIES_SIMD_CACHE;
|
||||
}
|
||||
|
||||
return AMDSMI_STATUS_SUCCESS;
|
||||
|
||||
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