Align list and cache_info to Host

Signed-off-by: Maisam Arif <maisarif@amd.com>
Change-Id: I4fa55b360b74d5a202d0b9b4eb7aee660b0a1bcf


[ROCm/amdsmi commit: 77710921a4]
This commit is contained in:
Maisam Arif
2024-02-07 05:55:04 -06:00
committed by Chiranjeevi Pattigidi
vanhempi 57419ff3cc
commit 4728d05c5f
7 muutettua tiedostoa jossa 117 lisäystä ja 100 poistoa
@@ -152,10 +152,10 @@ class AMDSMICommands():
# Store values based on format
if self.logger.is_human_readable_format():
self.logger.store_output(args.gpu, 'AMDSMI_SPACING_REMOVAL', {'bdf':bdf, 'uuid':uuid})
self.logger.store_output(args.gpu, 'AMDSMI_SPACING_REMOVAL', {'gpu_bdf':bdf, 'gpu_uuid':uuid})
else:
self.logger.store_output(args.gpu, 'bdf', bdf)
self.logger.store_output(args.gpu, 'uuid', uuid)
self.logger.store_output(args.gpu, 'gpu_bdf', bdf)
self.logger.store_output(args.gpu, 'gpu_uuid', uuid)
if multiple_devices:
self.logger.store_multiple_device_output()
@@ -550,21 +550,32 @@ class AMDSMICommands():
static_dict['vram'] = vram_info
if args.cache:
try:
cache_info = amdsmi_interface.amdsmi_get_gpu_cache_info(args.gpu)
logging.debug(f"cache_info dictionary = {cache_info}")
cach_info_list = amdsmi_interface.amdsmi_get_gpu_cache_info(args.gpu)
logging.debug(f"cache_info dictionary = {cach_info_list}")
if self.logger.is_human_readable_format():
for key, cache_values in cache_info.items():
cache_values['cache_size'] = f"{cache_values['cache_size']} KB"
cache_info_dict_format = {}
for cache_dict in cach_info_list:
cache_index = "cache_" + str(cache_dict["cache"])
cache_info_dict_format[cache_index] = cache_dict
# Remove cache index from new dictionary
cache_info_dict_format[cache_index].pop("cache")
# Add cache_size unit
cache_info_dict_format[cache_index]["cache_size"] = f"{cache_info_dict_format[cache_index]['cache_size']} KB"
# take cache_properties out of list -> display as string, removing brackets
cache_values['cache_properties'] = ", ".join(cache_values['cache_properties'])
logging.debug(f"After human_readable | cache_info = {cache_info}")
cache_info_dict_format[cache_index]["cache_properties"] = ", ".join(cache_info_dict_format[cache_index]["cache_properties"])
cach_info_list = cache_info_dict_format
logging.debug(f"After human_readable | cache_info = {cach_info_list}")
except amdsmi_exception.AmdSmiLibraryException as e:
cache_info = "N/A"
cach_info_list = "N/A"
logging.debug("Failed to get cache info for gpu %s | %s", gpu_id, e.get_error_info())
static_dict['cache'] = cache_info
static_dict['cache_info'] = cach_info_list
if 'ras' in current_platform_args:
if args.ras:
ras_dict = {"eeprom_version": "N/A",
@@ -323,7 +323,7 @@ int main() {
printf("\tCache Level: %d, Cache Size: %d KB, Cache type: 0x%x\n",
cache_info.cache[i].cache_level,
cache_info.cache[i].cache_size,
cache_info.cache[i].properties);
cache_info.cache[i].cache_properties);
printf("\tMax number CU shared: %d, Number of instances: %d\n",
cache_info.cache[i].max_num_cu_shared,
cache_info.cache[i].num_cache_instance);
@@ -541,19 +541,19 @@ typedef struct {
* @brief cache properties
*/
typedef enum {
CACHE_PROPERTIES_ENABLED = 0x00000001,
CACHE_PROPERTIES_DATA_CACHE = 0x00000002,
CACHE_PROPERTIES_INST_CACHE = 0x00000004,
CACHE_PROPERTIES_CPU_CACHE = 0x00000008,
CACHE_PROPERTIES_SIMD_CACHE = 0x00000010,
AMDSMI_CACHE_PROPERTIES_ENABLED = 0x00000001,
AMDSMI_CACHE_PROPERTIES_DATA_CACHE = 0x00000002,
AMDSMI_CACHE_PROPERTIES_INST_CACHE = 0x00000004,
AMDSMI_CACHE_PROPERTIES_CPU_CACHE = 0x00000008,
AMDSMI_CACHE_PROPERTIES_SIMD_CACHE = 0x00000010,
} amdsmi_cache_properties_type_t;
typedef struct {
uint32_t num_cache_types;
struct cache_ {
uint32_t cache_properties; // amdsmi_cache_properties_type_t which is a bitmask
uint32_t cache_size; /* In KB */
uint32_t cache_level;
uint32_t properties; // amdsmi_cache_properties_type_t which is a bitmask
uint32_t max_num_cu_shared; /* Indicates how many Compute Units share this cache instance */
uint32_t num_cache_instance; /* total number of instance of this cache type */
uint32_t reserved[3];
+19 -18
Näytä tiedosto
@@ -465,32 +465,33 @@ except AmdSmiException as e:
### amdsmi_get_gpu_cache_info
Description: Returns dictionary of cache information for the given GPU.
Description: Returns a list of dictionaries containing cache information for the given GPU.
Input parameters:
* `processor_handle` device which to query
Output: Dictionary of Dictionaries containing cache information
Schema: { cache_index:
{
cache_properties:
{
"type": "array",
"items": {
"type": "string"
}
},
cache_size: {"type" : "number"},
cache_level: {"type" : "number"},
max_num_cu_shared: {"type" : "number"},
num_cache_instance: {"type" : "number"}
}
}
Output: List of Dictionaries containing cache information following the schema below:
Schema:
```JSON
{
cache: {"type" : "number"},
cache_properties:
{
"type" : "array",
"items" : {"type" : "string"}
},
cache_size: {"type" : "number"},
cache_level: {"type" : "number"},
max_num_cu_shared: {"type" : "number"},
num_cache_instance: {"type" : "number"}
}
```
Field | Description
---|---
`cache_index` | cache index is a string of format "cache_#" up to 10 caches will be available
`cache` | cache index from 0-9
`cache_properties` | list of up to 4 cache property type strings. Ex. data ("DATA_CACHE"), instruction ("INST_CACHE"), CPU ("CPU_CACHE"), or SIMD ("SIMD_CACHE").
`cache_size` | size of cache in KB
`cache_level` | level of cache
@@ -1652,51 +1652,52 @@ def amdsmi_get_gpu_vram_info(
def amdsmi_get_gpu_cache_info(
processor_handle: amdsmi_wrapper.amdsmi_processor_handle,
) -> Dict[str, Dict[str, Any]]:
) -> List[Dict[str, Any]]:
if not isinstance(processor_handle, amdsmi_wrapper.amdsmi_processor_handle):
raise AmdSmiParameterException(
processor_handle, amdsmi_wrapper.amdsmi_processor_handle
)
cache_info = amdsmi_wrapper.amdsmi_gpu_cache_info_t()
cache_info_struct = amdsmi_wrapper.amdsmi_gpu_cache_info_t()
_check_res(
amdsmi_wrapper.amdsmi_get_gpu_cache_info(
processor_handle, ctypes.byref(cache_info))
processor_handle, ctypes.byref(cache_info_struct))
)
cache_info_dict = {}
for cache_index in range(cache_info.num_cache_types):
cache_info_list = []
for cache_index in range(cache_info_struct.num_cache_types):
# Put cache_properties at the start of the dictionary for readability
cache_dict = {
"cache_properties": [],
"cache_size": cache_info.cache[cache_index].cache_size,
"cache_level": cache_info.cache[cache_index].cache_level,
"max_num_cu_shared": cache_info.cache[cache_index].max_num_cu_shared,
"num_cache_instance": cache_info.cache[cache_index].num_cache_instance
"cache": cache_index,
"cache_properties": [], # This will be a list of strings
"cache_size": cache_info_struct.cache[cache_index].cache_size,
"cache_level": cache_info_struct.cache[cache_index].cache_level,
"max_num_cu_shared": cache_info_struct.cache[cache_index].max_num_cu_shared,
"num_cache_instance": cache_info_struct.cache[cache_index].num_cache_instance
}
# Check against cache properties bitmask
cache_properties = cache_info.cache[cache_index].properties
data_cache = cache_properties & amdsmi_wrapper.CACHE_PROPERTIES_DATA_CACHE
inst_cache = cache_properties & amdsmi_wrapper.CACHE_PROPERTIES_INST_CACHE
cpu_cache = cache_properties & amdsmi_wrapper.CACHE_PROPERTIES_CPU_CACHE
simd_cache = cache_properties & amdsmi_wrapper.CACHE_PROPERTIES_SIMD_CACHE
cache_properties = cache_info_struct.cache[cache_index].cache_properties
data_cache = cache_properties & amdsmi_wrapper.AMDSMI_CACHE_PROPERTIES_DATA_CACHE
inst_cache = cache_properties & amdsmi_wrapper.AMDSMI_CACHE_PROPERTIES_INST_CACHE
cpu_cache = cache_properties & amdsmi_wrapper.AMDSMI_CACHE_PROPERTIES_CPU_CACHE
simd_cache = cache_properties & amdsmi_wrapper.AMDSMI_CACHE_PROPERTIES_SIMD_CACHE
cache_properties_status = [data_cache, inst_cache, cpu_cache, simd_cache]
cache_property_list = []
for cache_property in cache_properties_status:
if cache_property:
property_name = amdsmi_wrapper.amdsmi_cache_properties_type_t__enumvalues[cache_property]
property_name = property_name.replace("CACHE_PROPERTIES_", "")
property_name = property_name.replace("AMDSMI_CACHE_PROPERTIES_", "")
cache_property_list.append(property_name)
cache_dict["cache_properties"] = cache_property_list
cache_info_dict[f"cache_{cache_index}"] = cache_dict
cache_info_list.append(cache_dict)
if not cache_info_dict:
if not cache_info_list:
raise AmdSmiLibraryException(amdsmi_wrapper.AMDSMI_STATUS_NO_DATA)
return cache_info_dict
return cache_info_list
def amdsmi_get_gpu_vbios_info(
@@ -815,17 +815,17 @@ amdsmi_vbios_info_t = struct_amdsmi_vbios_info_t
# values for enumeration 'amdsmi_cache_properties_type_t'
amdsmi_cache_properties_type_t__enumvalues = {
1: 'CACHE_PROPERTIES_ENABLED',
2: 'CACHE_PROPERTIES_DATA_CACHE',
4: 'CACHE_PROPERTIES_INST_CACHE',
8: 'CACHE_PROPERTIES_CPU_CACHE',
16: 'CACHE_PROPERTIES_SIMD_CACHE',
1: 'AMDSMI_CACHE_PROPERTIES_ENABLED',
2: 'AMDSMI_CACHE_PROPERTIES_DATA_CACHE',
4: 'AMDSMI_CACHE_PROPERTIES_INST_CACHE',
8: 'AMDSMI_CACHE_PROPERTIES_CPU_CACHE',
16: 'AMDSMI_CACHE_PROPERTIES_SIMD_CACHE',
}
CACHE_PROPERTIES_ENABLED = 1
CACHE_PROPERTIES_DATA_CACHE = 2
CACHE_PROPERTIES_INST_CACHE = 4
CACHE_PROPERTIES_CPU_CACHE = 8
CACHE_PROPERTIES_SIMD_CACHE = 16
AMDSMI_CACHE_PROPERTIES_ENABLED = 1
AMDSMI_CACHE_PROPERTIES_DATA_CACHE = 2
AMDSMI_CACHE_PROPERTIES_INST_CACHE = 4
AMDSMI_CACHE_PROPERTIES_CPU_CACHE = 8
AMDSMI_CACHE_PROPERTIES_SIMD_CACHE = 16
amdsmi_cache_properties_type_t = ctypes.c_uint32 # enum
class struct_amdsmi_gpu_cache_info_t(Structure):
pass
@@ -835,9 +835,9 @@ class struct_cache_(Structure):
struct_cache_._pack_ = 1 # source:False
struct_cache_._fields_ = [
('cache_properties', ctypes.c_uint32),
('cache_size', ctypes.c_uint32),
('cache_level', ctypes.c_uint32),
('properties', ctypes.c_uint32),
('max_num_cu_shared', ctypes.c_uint32),
('num_cache_instance', ctypes.c_uint32),
('reserved', ctypes.c_uint32 * 3),
@@ -2308,6 +2308,11 @@ amdsmi_get_esmi_err_msg.restype = amdsmi_status_t
amdsmi_get_esmi_err_msg.argtypes = [amdsmi_status_t, ctypes.POINTER(ctypes.POINTER(ctypes.c_char))]
__all__ = \
['AGG_BW0', 'AMDSMI_ARG_PTR_NULL', 'AMDSMI_AVERAGE_POWER',
'AMDSMI_CACHE_PROPERTIES_CPU_CACHE',
'AMDSMI_CACHE_PROPERTIES_DATA_CACHE',
'AMDSMI_CACHE_PROPERTIES_ENABLED',
'AMDSMI_CACHE_PROPERTIES_INST_CACHE',
'AMDSMI_CACHE_PROPERTIES_SIMD_CACHE',
'AMDSMI_CARD_FORM_FACTOR_OAM', 'AMDSMI_CARD_FORM_FACTOR_PCIE',
'AMDSMI_CARD_FORM_FACTOR_UNKNOWN', 'AMDSMI_CNTR_CMD_START',
'AMDSMI_CNTR_CMD_STOP', 'AMDSMI_COARSE_GRAIN_GFX_ACTIVITY',
@@ -2424,29 +2429,27 @@ __all__ = \
'AMDSMI_VRAM_VENDOR__WINBOND', 'AMDSMI_XGMI_STATUS_ERROR',
'AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS',
'AMDSMI_XGMI_STATUS_NO_ERRORS', 'AMD_APU', 'AMD_CPU',
'AMD_CPU_CORE', 'AMD_GPU', 'CACHE_PROPERTIES_CPU_CACHE',
'CACHE_PROPERTIES_DATA_CACHE', 'CACHE_PROPERTIES_ENABLED',
'CACHE_PROPERTIES_INST_CACHE', 'CACHE_PROPERTIES_SIMD_CACHE',
'CLK_TYPE_DCEF', 'CLK_TYPE_DCLK0', 'CLK_TYPE_DCLK1',
'CLK_TYPE_DF', 'CLK_TYPE_FIRST', 'CLK_TYPE_GFX', 'CLK_TYPE_MEM',
'CLK_TYPE_PCIE', 'CLK_TYPE_SOC', 'CLK_TYPE_SYS', 'CLK_TYPE_VCLK0',
'CLK_TYPE_VCLK1', 'CLK_TYPE__MAX', 'COMPUTE_PARTITION_CPX',
'COMPUTE_PARTITION_DPX', 'COMPUTE_PARTITION_INVALID',
'COMPUTE_PARTITION_QPX', 'COMPUTE_PARTITION_SPX',
'COMPUTE_PARTITION_TPX', 'CONTAINER_DOCKER', 'CONTAINER_LXC',
'FW_ID_ASD', 'FW_ID_CP_CE', 'FW_ID_CP_ME', 'FW_ID_CP_MEC1',
'FW_ID_CP_MEC2', 'FW_ID_CP_MEC_JT1', 'FW_ID_CP_MEC_JT2',
'FW_ID_CP_MES', 'FW_ID_CP_PFP', 'FW_ID_CP_PM4', 'FW_ID_DFC',
'FW_ID_DMCU', 'FW_ID_DMCU_ERAM', 'FW_ID_DMCU_ISR',
'FW_ID_DRV_CAP', 'FW_ID_FIRST', 'FW_ID_IMU_DRAM',
'FW_ID_IMU_IRAM', 'FW_ID_ISP', 'FW_ID_MC', 'FW_ID_MES_KIQ',
'FW_ID_MES_STACK', 'FW_ID_MES_THREAD1', 'FW_ID_MES_THREAD1_STACK',
'FW_ID_MMSCH', 'FW_ID_PM', 'FW_ID_PPTABLE', 'FW_ID_PSP_BL',
'FW_ID_PSP_DBG', 'FW_ID_PSP_INTF', 'FW_ID_PSP_KEYDB',
'FW_ID_PSP_SOC', 'FW_ID_PSP_SOSDRV', 'FW_ID_PSP_SPL',
'FW_ID_PSP_SYSDRV', 'FW_ID_PSP_TOC', 'FW_ID_REG_ACCESS_WHITELIST',
'FW_ID_RLC', 'FW_ID_RLCV_LX7', 'FW_ID_RLC_P',
'FW_ID_RLC_RESTORE_LIST_CNTL', 'FW_ID_RLC_RESTORE_LIST_GPM_MEM',
'AMD_CPU_CORE', 'AMD_GPU', 'CLK_TYPE_DCEF', 'CLK_TYPE_DCLK0',
'CLK_TYPE_DCLK1', 'CLK_TYPE_DF', 'CLK_TYPE_FIRST', 'CLK_TYPE_GFX',
'CLK_TYPE_MEM', 'CLK_TYPE_PCIE', 'CLK_TYPE_SOC', 'CLK_TYPE_SYS',
'CLK_TYPE_VCLK0', 'CLK_TYPE_VCLK1', 'CLK_TYPE__MAX',
'COMPUTE_PARTITION_CPX', 'COMPUTE_PARTITION_DPX',
'COMPUTE_PARTITION_INVALID', 'COMPUTE_PARTITION_QPX',
'COMPUTE_PARTITION_SPX', 'COMPUTE_PARTITION_TPX',
'CONTAINER_DOCKER', 'CONTAINER_LXC', 'FW_ID_ASD', 'FW_ID_CP_CE',
'FW_ID_CP_ME', 'FW_ID_CP_MEC1', 'FW_ID_CP_MEC2',
'FW_ID_CP_MEC_JT1', 'FW_ID_CP_MEC_JT2', 'FW_ID_CP_MES',
'FW_ID_CP_PFP', 'FW_ID_CP_PM4', 'FW_ID_DFC', 'FW_ID_DMCU',
'FW_ID_DMCU_ERAM', 'FW_ID_DMCU_ISR', 'FW_ID_DRV_CAP',
'FW_ID_FIRST', 'FW_ID_IMU_DRAM', 'FW_ID_IMU_IRAM', 'FW_ID_ISP',
'FW_ID_MC', 'FW_ID_MES_KIQ', 'FW_ID_MES_STACK',
'FW_ID_MES_THREAD1', 'FW_ID_MES_THREAD1_STACK', 'FW_ID_MMSCH',
'FW_ID_PM', 'FW_ID_PPTABLE', 'FW_ID_PSP_BL', 'FW_ID_PSP_DBG',
'FW_ID_PSP_INTF', 'FW_ID_PSP_KEYDB', 'FW_ID_PSP_SOC',
'FW_ID_PSP_SOSDRV', 'FW_ID_PSP_SPL', 'FW_ID_PSP_SYSDRV',
'FW_ID_PSP_TOC', 'FW_ID_REG_ACCESS_WHITELIST', 'FW_ID_RLC',
'FW_ID_RLCV_LX7', 'FW_ID_RLC_P', 'FW_ID_RLC_RESTORE_LIST_CNTL',
'FW_ID_RLC_RESTORE_LIST_GPM_MEM',
'FW_ID_RLC_RESTORE_LIST_SRM_MEM', 'FW_ID_RLC_SAVE_RESTORE_LIST',
'FW_ID_RLC_SRLG', 'FW_ID_RLC_SRLS', 'FW_ID_RLC_V', 'FW_ID_RLX6',
'FW_ID_RLX6_CORE1', 'FW_ID_RLX6_DRAM_BOOT',
+11 -10
Näytä tiedosto
@@ -445,20 +445,21 @@ amdsmi_status_t amdsmi_get_gpu_cache_info(
info->num_cache_types = rsmi_info.num_cache_types;
for (unsigned int i =0; i < rsmi_info.num_cache_types; i++) {
// convert from sysfs type to CRAT type(HSA Cache Affinity type)
info->cache[i].cache_properties = 0;
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_DATA)
info->cache[i].cache_properties |= AMDSMI_CACHE_PROPERTIES_DATA_CACHE;
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_INSTRUCTION)
info->cache[i].cache_properties |= AMDSMI_CACHE_PROPERTIES_INST_CACHE;
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_CPU)
info->cache[i].cache_properties |= AMDSMI_CACHE_PROPERTIES_CPU_CACHE;
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_HSACU)
info->cache[i].cache_properties |= AMDSMI_CACHE_PROPERTIES_SIMD_CACHE;
info->cache[i].cache_size = rsmi_info.cache[i].cache_size_kb;
info->cache[i].cache_level = rsmi_info.cache[i].cache_level;
info->cache[i].max_num_cu_shared = rsmi_info.cache[i].max_num_cu_shared;
info->cache[i].num_cache_instance = rsmi_info.cache[i].num_cache_instance;
// convert from sysfs type to CRAT type(HSA Cache Affinity type)
info->cache[i].properties = 0;
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_DATA)
info->cache[i].properties |= CACHE_PROPERTIES_DATA_CACHE;
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_INSTRUCTION)
info->cache[i].properties |= CACHE_PROPERTIES_INST_CACHE;
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_CPU)
info->cache[i].properties |= CACHE_PROPERTIES_CPU_CACHE;
if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_HSACU)
info->cache[i].properties |= CACHE_PROPERTIES_SIMD_CACHE;
}
return AMDSMI_STATUS_SUCCESS;