SWDEV-276827 - Stream Operations: match API with CUDA
Change-Id: Ia79a950561e97df3b2229f76f5512dede2babf98
这个提交包含在:
@@ -1241,11 +1241,12 @@ hipError_t hipStreamAddCallback(hipStream_t stream, hipStreamCallback_t callback
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* @brief Enqueues a wait command to the stream.
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*
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* @param [in] stream - Stream identifier
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* @param [in] ptr - Pointer to memory object allocated using 'hipMallocSignalMemory' flag.
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* @param [in] ptr - Pointer to memory object allocated using 'hipMallocSignalMemory' flag
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* @param [in] value - Value to be used in compare operation
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* @param [in] mask - Mask to be applied on value at memory before it is compared with value
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* @param [in] flags - Defines the compare operation, supported values are hipStreamWaitValueGte
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* hipStreamWaitValueEq, hipStreamWaitValueAnd and hipStreamWaitValueNor.
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* hipStreamWaitValueEq, hipStreamWaitValueAnd and hipStreamWaitValueNor
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* @param [in] mask - Mask to be applied on value at memory before it is compared with value,
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* default value is set to enable every bit
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*
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* @returns #hipSuccess, #hipErrorInvalidValue
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*
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@@ -1266,17 +1267,19 @@ hipError_t hipStreamAddCallback(hipStream_t stream, hipStreamCallback_t callback
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* hipStreamWriteValue32, hipDeviceGetAttribute
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*/
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hipError_t hipStreamWaitValue32(hipStream_t stream, void* ptr, int32_t value, uint32_t mask, unsigned int flags);
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hipError_t hipStreamWaitValue32(hipStream_t stream, void* ptr, int32_t value, unsigned int flags,
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uint32_t mask __dparm(0xFFFFFFFF));
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/**
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* @brief Enqueues a wait command to the stream.
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*
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* @param [in] stream - Stream identifier
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* @param [in] ptr - Pointer to memory object allocated using 'hipMallocSignalMemory' flag.
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* @param [in] ptr - Pointer to memory object allocated using 'hipMallocSignalMemory' flag
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* @param [in] value - Value to be used in compare operation
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* @param [in] mask - Mask to be applied on value at memory before it is compared with value.
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* @param [in] flags - Defines the compare operation, supported values are hipStreamWaitValueGte
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* hipStreamWaitValueEq, hipStreamWaitValueAnd and hipStreamWaitValueNor.
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* @param [in] mask - Mask to be applied on value at memory before it is compared with value
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* default value is set to enable every bit
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*
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* @returns #hipSuccess, #hipErrorInvalidValue
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*
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@@ -1297,14 +1300,16 @@ hipError_t hipStreamWaitValue32(hipStream_t stream, void* ptr, int32_t value, ui
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* hipStreamWriteValue32, hipDeviceGetAttribute
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*/
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hipError_t hipStreamWaitValue64(hipStream_t stream, void* ptr, int64_t value, uint64_t mask, unsigned int flags);
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hipError_t hipStreamWaitValue64(hipStream_t stream, void* ptr, int64_t value, unsigned int flags,
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uint64_t mask __dparm(0xFFFFFFFFFFFFFFFF));
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/**
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* @brief Enqueues a write command to the stream.
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*
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* @param [in] stream - Stream identifier
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* @param [in] ptr - Pointer to a GPU accessible memory object.
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* @param [in] ptr - Pointer to a GPU accessible memory object
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* @param [in] value - Value to be written
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* @param [in] flags - reserved, ignored for now, will be used in future releases
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*
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* @returns #hipSuccess, #hipErrorInvalidValue
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*
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@@ -1314,14 +1319,15 @@ hipError_t hipStreamWaitValue64(hipStream_t stream, void* ptr, int64_t value, ui
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* @see hipExtMallocWithFlags, hipFree, hipStreamWriteValue32, hipStreamWaitValue32,
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* hipStreamWaitValue64
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*/
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hipError_t hipStreamWriteValue32(hipStream_t stream, void* ptr, int32_t value);
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hipError_t hipStreamWriteValue32(hipStream_t stream, void* ptr, int32_t value, unsigned int flags);
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/**
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* @brief Enqueues a write command to the stream.
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*
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* @param [in] stream - Stream identifier
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* @param [in] ptr - Pointer to a GPU accessible memory object.
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* @param [in] ptr - Pointer to a GPU accessible memory object
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* @param [in] value - Value to be written
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* @param [in] flags - reserved, ignored for now, will be used in future releases
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*
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* @returns #hipSuccess, #hipErrorInvalidValue
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*
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@@ -1331,7 +1337,7 @@ hipError_t hipStreamWriteValue32(hipStream_t stream, void* ptr, int32_t value);
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* @see hipExtMallocWithFlags, hipFree, hipStreamWriteValue32, hipStreamWaitValue32,
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* hipStreamWaitValue64
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*/
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hipError_t hipStreamWriteValue64(hipStream_t stream, void* ptr, int64_t value);
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hipError_t hipStreamWriteValue64(hipStream_t stream, void* ptr, int64_t value, unsigned int flags);
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// end doxygen Stream Memory Operations
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@@ -76,8 +76,8 @@ hipError_t ihipStreamOperation(hipStream_t stream, cl_command_type cmdType, void
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return hipSuccess;
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}
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hipError_t hipStreamWaitValue32(hipStream_t stream, void* ptr, int32_t value, uint32_t mask,
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unsigned int flags) {
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hipError_t hipStreamWaitValue32(hipStream_t stream, void* ptr, int32_t value, unsigned int flags,
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uint32_t mask) {
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HIP_INIT_API(hipStreamWaitValue32, stream, ptr, value, mask, flags);
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// NOTE: ptr corresponds to a HSA Signal memeory which is 64 bits.
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// 32 bit value and mask are converted to 64-bit values.
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@@ -91,8 +91,8 @@ hipError_t hipStreamWaitValue32(hipStream_t stream, void* ptr, int32_t value, ui
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0)); // sizeBytes un-used for wait, set it to 0
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}
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hipError_t hipStreamWaitValue64(hipStream_t stream, void* ptr, int64_t value, uint64_t mask,
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unsigned int flags) {
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hipError_t hipStreamWaitValue64(hipStream_t stream, void* ptr, int64_t value, unsigned int flags,
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uint64_t mask) {
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HIP_INIT_API(hipStreamWaitValue64, stream, ptr, value, mask, flags);
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HIP_RETURN_DURATION(ihipStreamOperation(
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stream,
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@@ -104,8 +104,8 @@ hipError_t hipStreamWaitValue64(hipStream_t stream, void* ptr, int64_t value, ui
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0)); // sizeBytes un-used for wait, set it to 0
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}
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hipError_t hipStreamWriteValue32(hipStream_t stream, void* ptr, int32_t value) {
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HIP_INIT_API(hipStreamWriteValue32, stream, ptr, value);
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hipError_t hipStreamWriteValue32(hipStream_t stream, void* ptr, int32_t value, unsigned int flags) {
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HIP_INIT_API(hipStreamWriteValue32, stream, ptr, value, flags);
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HIP_RETURN_DURATION(ihipStreamOperation(
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stream,
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ROCCLR_COMMAND_STREAM_WRITE_VALUE,
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@@ -116,8 +116,8 @@ hipError_t hipStreamWriteValue32(hipStream_t stream, void* ptr, int32_t value) {
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4));
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}
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hipError_t hipStreamWriteValue64(hipStream_t stream, void* ptr, int64_t value) {
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HIP_INIT_API(hipStreamWriteValue64, stream, ptr, value);
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hipError_t hipStreamWriteValue64(hipStream_t stream, void* ptr, int64_t value, unsigned int flags) {
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HIP_INIT_API(hipStreamWriteValue64, stream, ptr, value, flags);
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HIP_RETURN_DURATION(ihipStreamOperation(
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stream,
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ROCCLR_COMMAND_STREAM_WRITE_VALUE,
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@@ -51,6 +51,7 @@ THE SOFTWARE.
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// Random predefiend 32 and 64 bit values
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constexpr int32_t value32 = 0x70F0F0FF;
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constexpr int64_t value64 = 0x7FFF0000FFFF0000;
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constexpr unsigned int writeFlag = 0;
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constexpr float SLEEP_MS = 100;
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void testWrite() {
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@@ -77,8 +78,8 @@ void testWrite() {
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hipHostRegister(host_ptr32, sizeof(int32_t), 0);
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// Test writting registered host pointer
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HIPCHECK(hipStreamWriteValue64(stream, host_ptr64, value64));
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HIPCHECK(hipStreamWriteValue32(stream, host_ptr32, value32));
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HIPCHECK(hipStreamWriteValue64(stream, host_ptr64, value64, writeFlag));
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HIPCHECK(hipStreamWriteValue32(stream, host_ptr32, value32, writeFlag));
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hipStreamSynchronize(stream);
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HIPASSERT(*host_ptr64 == value64);
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@@ -92,15 +93,15 @@ void testWrite() {
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*host_ptr64 = 0x0;
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*host_ptr32 = 0x0;
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HIPCHECK(hipStreamWriteValue64(stream, device_ptr64, value64));
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HIPCHECK(hipStreamWriteValue32(stream, device_ptr32, value32));
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HIPCHECK(hipStreamWriteValue64(stream, device_ptr64, value64, writeFlag));
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HIPCHECK(hipStreamWriteValue32(stream, device_ptr32, value32, writeFlag));
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hipStreamSynchronize(stream);
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HIPASSERT(*host_ptr64 == value64);
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HIPASSERT(*host_ptr32 == value32);
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// Test Writing to Signal Memory
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HIPCHECK(hipStreamWriteValue64(stream, signalPtr, value64));
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HIPCHECK(hipStreamWriteValue64(stream, signalPtr, value64, writeFlag));
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hipStreamSynchronize(stream);
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HIPASSERT(*signalPtr == value64);
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@@ -142,7 +143,6 @@ void testWait() {
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int64_t signalValuePass;
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};
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TEST_WAIT testCases[] = {
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{
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// mask will ignore few MSB bits
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@@ -200,11 +200,82 @@ void testWait() {
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}
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};
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struct TEST_WAIT32_NO_MASK {
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int compareOp;
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int32_t waitValue;
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int32_t signalValueFail;
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int32_t signalValuePass;
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};
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// default mask 0xFFFFFFFF will be used.
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TEST_WAIT32_NO_MASK testCasesNoMask32[] = {
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{
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hipStreamWaitValueGte,
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0x7FFF0001,
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0x7FFF0000,
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0x7FFF0010
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},
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{
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hipStreamWaitValueEq,
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0x7FFFFFFF,
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0x7FFF0000,
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0x7FFFFFFF
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},
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{
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hipStreamWaitValueAnd,
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0x70F0F0F0,
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0x0F0F0F0F,
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0X1F0F0F0F
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},
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{
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hipStreamWaitValueNor,
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0x7AAAAAAA,
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static_cast<int32_t>(0x85555555),
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static_cast<int32_t>(0x9AAAAAAA)
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}
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};
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struct TEST_WAIT64_NO_MASK {
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int compareOp;
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int64_t waitValue;
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int64_t signalValueFail;
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int64_t signalValuePass;
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};
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// default mask 0xFFFFFFFFFFFFFFFF will be used.
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TEST_WAIT64_NO_MASK testCasesNoMask64[] = {
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{
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hipStreamWaitValueGte,
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0x7FFFFFFFFFFF0001,
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0x7FFFFFFFFFFF0000,
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0x7FFFFFFFFFFF0001
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},
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{
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hipStreamWaitValueEq,
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0x7FFFFFFFFFFFFFFF,
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0x7FFFFFFF0FFF0000,
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0x7FFFFFFFFFFFFFFF
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},
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{
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hipStreamWaitValueAnd,
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0x70F0F0F0F0F0F0F0,
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0x0F0F0F0F0F0F0F0F,
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0X1F0F0F0F0F0F0F0F
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},
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{
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hipStreamWaitValueNor,
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0x4724724747247247,
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static_cast<int64_t>(0xbddbddbdbddbddbd),
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static_cast<int64_t>(0xbddbddbdbddbddb3)
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}
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};
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if (!streamWaitValueSupported()) {
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std::cout << " hipStreamWaitValue: not supported on this device , skipping ... \n";
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return;
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}
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std::cout << " hipStreamWaitValue: testing ... \n";
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std::cout << " hipStreamWaitValue32: testing ... \n";
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std::cout << " hipStreamWaitValue64: testing ... \n";
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hipStream_t stream;
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hipStreamCreate(&stream);
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@@ -215,6 +286,7 @@ void testWait() {
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hipHostRegister(dataPtr32, sizeof(int32_t), 0);
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// We run all test cases twice
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// Run-1: streamWait is blocking (wait conditions is false)
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// Run-2: streamWait is non-blocking (wait condition is true)
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for (int run = 0; run < 2; run++) {
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@@ -224,8 +296,8 @@ void testWait() {
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*signalPtr = isBlocking ? tc.signalValueFail : tc.signalValuePass;
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*dataPtr64 = DATA_INIT;
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HIPCHECK(hipStreamWaitValue64(stream, signalPtr, tc.waitValue, tc.mask, tc.compareOp));
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HIPCHECK(hipStreamWriteValue64(stream, dataPtr64, DATA_UPDATE));
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HIPCHECK(hipStreamWaitValue64(stream, signalPtr, tc.waitValue, tc.compareOp, tc.mask));
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HIPCHECK(hipStreamWriteValue64(stream, dataPtr64, DATA_UPDATE, writeFlag));
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if (isBlocking) {
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// Trigger an implict flush and verify stream has pending work.
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@@ -243,8 +315,8 @@ void testWait() {
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*dataPtr32 = DATA_INIT;
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HIPCHECK(hipStreamWaitValue32(stream, signalPtr, static_cast<int32_t>(tc.waitValue),
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static_cast<uint32_t>(tc.mask), tc.compareOp));
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HIPCHECK(hipStreamWriteValue32(stream, dataPtr32, DATA_UPDATE));
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tc.compareOp, static_cast<uint32_t>(tc.mask)));
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HIPCHECK(hipStreamWriteValue32(stream, dataPtr32, DATA_UPDATE, writeFlag));
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if (isBlocking) {
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// For DEBUG only
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@@ -262,6 +334,64 @@ void testWait() {
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}
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}
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std::cout << " hipStreamWaitValue32 with default mask: testing ... \n";
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// Run-1: streamWait is blocking (wait conditions is false)
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// Run-2: streamWait is non-blocking (wait condition is true)
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for (int run = 0; run < 2; run++) {
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bool isBlocking = run == 0;
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for (const auto& tc : testCasesNoMask32) {
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*signalPtr = isBlocking ? tc.signalValueFail : tc.signalValuePass;
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*dataPtr32 = DATA_INIT;
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HIPCHECK(hipStreamWaitValue32(stream, signalPtr, tc.waitValue, tc.compareOp));
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HIPCHECK(hipStreamWriteValue32(stream, dataPtr32, DATA_UPDATE, writeFlag));
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if (isBlocking) {
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// For DEBUG only
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// usleep(500);
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// HIPASSERT(*dataPtr32 == DATA_INIT);
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// Trigger an implict flush and verify stream has pending work.
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HIPASSERT(hipStreamQuery(stream) == hipErrorNotReady);
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// update signal to unblock the wait.
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*signalPtr = tc.signalValuePass;
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}
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hipStreamSynchronize(stream);
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HIPASSERT(*dataPtr32 == DATA_UPDATE);
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}
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}
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std::cout << " hipStreamWaitValue64 with default mask: testing ... \n";
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// Run-1: streamWait is blocking (wait conditions is false)
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// Run-2: streamWait is non-blocking (wait condition is true)
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for (int run = 0; run < 2; run++) {
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bool isBlocking = run == 0;
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for (const auto& tc : testCasesNoMask64) {
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*signalPtr = isBlocking ? tc.signalValueFail : tc.signalValuePass;
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*dataPtr64 = DATA_INIT;
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HIPCHECK(hipStreamWaitValue64(stream, signalPtr, tc.waitValue, tc.compareOp));
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HIPCHECK(hipStreamWriteValue64(stream, dataPtr64, DATA_UPDATE, writeFlag));
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if (isBlocking) {
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// For DEBUG only
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// usleep(500);
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// HIPASSERT(*dataPtr64 == DATA_INIT);
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// Trigger an implict flush and verify stream has pending work.
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HIPASSERT(hipStreamQuery(stream) == hipErrorNotReady);
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// update signal to unblock the wait.
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*signalPtr = tc.signalValuePass;
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}
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hipStreamSynchronize(stream);
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HIPASSERT(*dataPtr64 == DATA_UPDATE);
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}
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}
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// Cleanup
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HIPCHECK(hipFree(signalPtr));
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hipHostUnregister(dataPtr64);
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在新工单中引用
屏蔽一个用户