Add support for GC 11.5.2

Change-Id: Iad8604881dc66108933ac2155fef3b74bca9ac3f
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>


[ROCm/ROCR-Runtime commit: 71494a920b]
This commit is contained in:
Yifan Zhang
2024-06-07 17:22:18 +08:00
committed by Chris Freehill
parent 6f4013e1af
commit 491275f838
6 changed files with 8 additions and 3 deletions
@@ -85,7 +85,7 @@ set (CPACK_RPM_PACKAGE_REQUIRES "rocm-core,hsa-rocr")
set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810"
"gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942"
"gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1200;gfx1201")
"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1152;gfx1200;gfx1201")
#
# Currently support for Windows platform is not present
@@ -349,6 +349,7 @@ constexpr size_t hsa_name_size = 63;
ISAREG_ENTRY_GEN("gfx1103", 11, 0, 3, unsupported, unsupported, 32)
ISAREG_ENTRY_GEN("gfx1150", 11, 5, 0, unsupported, unsupported, 32)
ISAREG_ENTRY_GEN("gfx1151", 11, 5, 1, unsupported, unsupported, 32)
ISAREG_ENTRY_GEN("gfx1152", 11, 5, 2, unsupported, unsupported, 32)
ISAREG_ENTRY_GEN("gfx1200", 12, 0, 0, unsupported, unsupported, 32)
ISAREG_ENTRY_GEN("gfx1201", 12, 0, 1, unsupported, unsupported, 32)
#undef ISAREG_ENTRY_GEN
@@ -105,6 +105,7 @@ extern uint8_t ocl_blit_object_gfx1102[];
extern uint8_t ocl_blit_object_gfx1103[];
extern uint8_t ocl_blit_object_gfx1150[];
extern uint8_t ocl_blit_object_gfx1151[];
extern uint8_t ocl_blit_object_gfx1152[];
extern uint8_t ocl_blit_object_gfx1200[];
extern uint8_t ocl_blit_object_gfx1201[];
@@ -1054,6 +1055,8 @@ hsa_status_t BlitKernel::GetPatchedBlitObject(const char* agent_name,
*blit_code_object = ocl_blit_object_gfx1150;
} else if (sname == "gfx1151") {
*blit_code_object = ocl_blit_object_gfx1151;
} else if (sname == "gfx1152") {
*blit_code_object = ocl_blit_object_gfx1152;
} else if (sname == "gfx1200") {
*blit_code_object = ocl_blit_object_gfx1200;
} else if (sname == "gfx1201") {
@@ -50,7 +50,7 @@ if (NOT DEFINED TARGET_DEVICES)
set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810"
"gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942"
"gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1200;gfx1201")
"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1152;gfx1200;gfx1201")
endif()
set( TARGET_DEVICES ${TARGET_DEVICES} CACHE STRING "Build targets" FORCE )
@@ -142,7 +142,7 @@ enum : unsigned {
EF_AMDGPU_MACH_AMDGCN_GFX10_1_GENERIC = 0x052,
EF_AMDGPU_MACH_AMDGCN_GFX10_3_GENERIC = 0x053,
EF_AMDGPU_MACH_AMDGCN_GFX11_GENERIC = 0x054,
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X55 = 0x055,
EF_AMDGPU_MACH_AMDGCN_GFX1152 = 0x055,
// clang-format on
// First/last AMDGCN-based processors.
@@ -604,6 +604,7 @@ namespace code {
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103: MI.Name = "gfx1103"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1150: MI.Name = "gfx1150"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151: MI.Name = "gfx1151"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1152: MI.Name = "gfx1152"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX9_GENERIC: MI.Name = "gfx9-generic"; MI.XnackSupported = true; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_1_GENERIC: MI.Name = "gfx10-1-generic"; MI.XnackSupported = true; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_3_GENERIC: MI.Name = "gfx10-3-generic"; MI.XnackSupported = false; MI.SrameccSupported = false; break;