P4 to Git Change 1064557 by jgolds@jgolds_MSDNfractal5_opencl2 on 2014/08/08 15:35:44

ECR #304775 - Add new flag GPU_IFH_MODE to allow IFH mode testing without using the inifile.

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp#97 edit
... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#211 edit


[ROCm/clr commit: 22af57a1ec]

projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp

@@ -290,6 +290,10 @@ CALGSLDevice::open(uint32 gpuIndex, bool enableHighPerformanceState, bool report
     m_dcfg.syncObjectMode.value = (GPU_USE_SYNC_OBJECTS) ?
         GSL_CONFIG_SYNCOBJECT_MODE_ON : GSL_CONFIG_SYNCOBJECT_MODE_OFF;
 
+    // Use GPU_IFH_MODE to test with IFH mode enabled
+    m_dcfg.DropFlush.hasValue = true;
+    m_dcfg.DropFlush.value = (GPU_IFH_MODE == 1);
+
     int32 asic_id = 0;
     if (!SetupAdapter(asic_id))
     {

projects/clr/rocclr/runtime/utils/flags.hpp

@@ -163,7 +163,11 @@ release(bool, ENVVAR_HSA_POLL_KERNEL_COMPLETION, false,                       \
 release(bool, HSA_LOCAL_MEMORY_ENABLE, false,                                 \
         "Enable HSA device local memory usage")                               \
 release(bool, HSA_ENABLE_ATOMICS_32B, false,                                  \
-        "1 = Enable SVM atomics in 32 bits (HSA backend-only). Any other value keeps then disabled.")
+        "1 = Enable SVM atomics in 32 bits (HSA backend-only). Any other value keeps then disabled.") \
+release(bool, GPU_IFH_MODE, false,                                  \
+        "1 = Enable GPU IFH (infinitely fast hardware) mode. Any other value keeps setting disabled.") \
+
+
 
 namespace amd {